2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/lockdep.h>
35 /* size of the vlan table */
36 #define AR8X16_MAX_VLANS 128
37 #define AR8X16_PROBE_RETRIES 10
40 struct switch_dev dev;
41 struct phy_device *phy;
42 u32 (*read)(struct ar8216_priv *priv, int reg);
43 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
44 const struct net_device_ops *ndo_old;
45 struct net_device_ops ndo;
46 struct mutex reg_mutex;
54 /* all fields below are cleared on reset */
56 u16 vlan_id[AR8X16_MAX_VLANS];
57 u8 vlan_table[AR8X16_MAX_VLANS];
59 u16 pvid[AR8216_NUM_PORTS];
62 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
65 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
74 *page = regaddr & 0x1ff;
78 ar8216_mii_read(struct ar8216_priv *priv, int reg)
80 struct phy_device *phy = priv->phy;
81 struct mii_bus *bus = phy->bus;
85 split_addr((u32) reg, &r1, &r2, &page);
87 mutex_lock(&bus->mdio_lock);
89 bus->write(bus, 0x18, 0, page);
90 usleep_range(1000, 2000); /* wait for the page switch to propagate */
91 lo = bus->read(bus, 0x10 | r2, r1);
92 hi = bus->read(bus, 0x10 | r2, r1 + 1);
94 mutex_unlock(&bus->mdio_lock);
96 return (hi << 16) | lo;
100 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
102 struct phy_device *phy = priv->phy;
103 struct mii_bus *bus = phy->bus;
107 split_addr((u32) reg, &r1, &r2, &r3);
109 hi = (u16) (val >> 16);
111 mutex_lock(&bus->mdio_lock);
113 bus->write(bus, 0x18, 0, r3);
114 usleep_range(1000, 2000); /* wait for the page switch to propagate */
115 bus->write(bus, 0x10 | r2, r1 + 1, hi);
116 bus->write(bus, 0x10 | r2, r1, lo);
118 mutex_unlock(&bus->mdio_lock);
122 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
123 u16 dbg_addr, u16 dbg_data)
125 struct mii_bus *bus = priv->phy->bus;
127 mutex_lock(&bus->mdio_lock);
128 bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
129 bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
130 mutex_unlock(&bus->mdio_lock);
134 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
138 lockdep_assert_held(&priv->reg_mutex);
140 v = priv->read(priv, reg);
143 priv->write(priv, reg, v);
149 ar8216_read_port_link(struct ar8216_priv *priv, int port,
150 struct switch_port_link *link)
155 memset(link, '\0', sizeof(*link));
157 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
159 link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
161 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
168 link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
169 link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
170 link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
172 speed = (status & AR8216_PORT_STATUS_SPEED) >>
173 AR8216_PORT_STATUS_SPEED_S;
176 case AR8216_PORT_SPEED_10M:
177 link->speed = SWITCH_PORT_SPEED_10;
179 case AR8216_PORT_SPEED_100M:
180 link->speed = SWITCH_PORT_SPEED_100;
182 case AR8216_PORT_SPEED_1000M:
183 link->speed = SWITCH_PORT_SPEED_1000;
186 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
192 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
193 struct switch_val *val)
195 struct ar8216_priv *priv = to_ar8216(dev);
196 priv->vlan = !!val->value.i;
201 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
202 struct switch_val *val)
204 struct ar8216_priv *priv = to_ar8216(dev);
205 val->value.i = priv->vlan;
211 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
213 struct ar8216_priv *priv = to_ar8216(dev);
215 /* make sure no invalid PVIDs get set */
217 if (vlan >= dev->vlans)
220 priv->pvid[port] = vlan;
225 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
227 struct ar8216_priv *priv = to_ar8216(dev);
228 *vlan = priv->pvid[port];
233 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
234 struct switch_val *val)
236 struct ar8216_priv *priv = to_ar8216(dev);
237 priv->vlan_id[val->port_vlan] = val->value.i;
242 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
243 struct switch_val *val)
245 struct ar8216_priv *priv = to_ar8216(dev);
246 val->value.i = priv->vlan_id[val->port_vlan];
251 ar8216_get_port_link(struct switch_dev *dev, int port,
252 struct switch_port_link *link)
254 struct ar8216_priv *priv = to_ar8216(dev);
256 ar8216_read_port_link(priv, port, link);
261 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
263 struct ar8216_priv *priv = dev->phy_ptr;
272 if (unlikely(skb_headroom(skb) < 2)) {
273 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
277 buf = skb_push(skb, 2);
282 return priv->ndo_old->ndo_start_xmit(skb, dev);
285 dev_kfree_skb_any(skb);
290 ar8216_mangle_rx(struct sk_buff *skb, int napi)
292 struct ar8216_priv *priv;
293 struct net_device *dev;
305 /* don't strip the header if vlan mode is disabled */
309 /* strip header, get vlan id */
313 /* check for vlan header presence */
314 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
319 /* no need to fix up packets coming from a tagged source */
320 if (priv->vlan_tagged & (1 << port))
323 /* lookup port vid from local table, the switch passes an invalid vlan id */
324 vlan = priv->vlan_id[priv->pvid[port]];
327 buf[14 + 2] |= vlan >> 8;
328 buf[15 + 2] = vlan & 0xff;
331 skb->protocol = eth_type_trans(skb, skb->dev);
334 return netif_receive_skb(skb);
336 return netif_rx(skb);
339 /* no vlan? eat the packet! */
340 dev_kfree_skb_any(skb);
345 ar8216_netif_rx(struct sk_buff *skb)
347 return ar8216_mangle_rx(skb, 0);
351 ar8216_netif_receive_skb(struct sk_buff *skb)
353 return ar8216_mangle_rx(skb, 1);
357 static struct switch_attr ar8216_globals[] = {
359 .type = SWITCH_TYPE_INT,
360 .name = "enable_vlan",
361 .description = "Enable VLAN mode",
362 .set = ar8216_set_vlan,
363 .get = ar8216_get_vlan,
368 static struct switch_attr ar8216_port[] = {
371 static struct switch_attr ar8216_vlan[] = {
373 .type = SWITCH_TYPE_INT,
375 .description = "VLAN ID (0-4094)",
376 .set = ar8216_set_vid,
377 .get = ar8216_get_vid,
384 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
386 struct ar8216_priv *priv = to_ar8216(dev);
387 u8 ports = priv->vlan_table[val->port_vlan];
391 for (i = 0; i < AR8216_NUM_PORTS; i++) {
392 struct switch_port *p;
394 if (!(ports & (1 << i)))
397 p = &val->value.ports[val->len++];
399 if (priv->vlan_tagged & (1 << i))
400 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
408 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
410 struct ar8216_priv *priv = to_ar8216(dev);
411 u8 *vt = &priv->vlan_table[val->port_vlan];
415 for (i = 0; i < val->len; i++) {
416 struct switch_port *p = &val->value.ports[i];
418 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
419 priv->vlan_tagged |= (1 << p->id);
421 priv->vlan_tagged &= ~(1 << p->id);
422 priv->pvid[p->id] = val->port_vlan;
424 /* make sure that an untagged port does not
425 * appear in other vlans */
426 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
427 if (j == val->port_vlan)
429 priv->vlan_table[j] &= ~(1 << p->id);
439 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
445 t = priv->read(priv, reg);
446 if ((t & mask) == val)
455 pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
456 (unsigned int) reg, t, mask, val);
461 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
463 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
465 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
466 val &= AR8216_VTUDATA_MEMBER;
467 val |= AR8216_VTUDATA_VALID;
468 priv->write(priv, AR8216_REG_VTU_DATA, val);
470 op |= AR8216_VTU_ACTIVE;
471 priv->write(priv, AR8216_REG_VTU, op);
475 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
476 u32 members, u32 pvid)
480 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip == AR8216)
481 header = AR8216_PORT_CTRL_HEADER;
485 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
486 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
487 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
488 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
489 AR8216_PORT_CTRL_LEARN | header |
490 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
491 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
493 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
494 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
495 AR8216_PORT_VLAN_DEFAULT_ID,
496 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
497 (ingress << AR8216_PORT_VLAN_MODE_S) |
498 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
502 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
503 u32 members, u32 pvid)
505 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
506 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
507 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
508 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
509 AR8216_PORT_CTRL_LEARN |
510 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
511 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
513 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
514 AR8236_PORT_VLAN_DEFAULT_ID,
515 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
517 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
518 AR8236_PORT_VLAN2_VLAN_MODE |
519 AR8236_PORT_VLAN2_MEMBER,
520 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
521 (members << AR8236_PORT_VLAN2_MEMBER_S));
525 ar8216_hw_apply(struct switch_dev *dev)
527 struct ar8216_priv *priv = to_ar8216(dev);
528 u8 portmask[AR8216_NUM_PORTS];
531 mutex_lock(&priv->reg_mutex);
532 /* flush all vlan translation unit entries */
533 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
535 memset(portmask, 0, sizeof(portmask));
537 /* calculate the port destination masks and load vlans
538 * into the vlan translation unit */
539 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
540 u8 vp = priv->vlan_table[j];
545 for (i = 0; i < AR8216_NUM_PORTS; i++) {
548 portmask[i] |= vp & ~mask;
553 (priv->vlan_id[j] << AR8216_VTU_VID_S),
554 priv->vlan_table[j]);
558 * isolate all ports, but connect them to the cpu port */
559 for (i = 0; i < AR8216_NUM_PORTS; i++) {
560 if (i == AR8216_PORT_CPU)
563 portmask[i] = 1 << AR8216_PORT_CPU;
564 portmask[AR8216_PORT_CPU] |= (1 << i);
568 /* update the port destination mask registers and tag settings */
569 for (i = 0; i < AR8216_NUM_PORTS; i++) {
574 pvid = priv->vlan_id[priv->pvid[i]];
575 if (priv->vlan_tagged & (1 << i))
576 egress = AR8216_OUT_ADD_VLAN;
578 egress = AR8216_OUT_STRIP_VLAN;
579 ingress = AR8216_IN_SECURE;
582 egress = AR8216_OUT_KEEP;
583 ingress = AR8216_IN_PORT_ONLY;
586 if (priv->chip == AR8236)
587 ar8236_setup_port(priv, i, egress, ingress, portmask[i],
590 ar8216_setup_port(priv, i, egress, ingress, portmask[i],
593 mutex_unlock(&priv->reg_mutex);
598 ar8216_hw_init(struct ar8216_priv *priv)
604 ar8236_hw_init(struct ar8216_priv *priv)
609 if (priv->initialized)
612 /* Initialize the PHYs */
613 bus = priv->phy->bus;
614 for (i = 0; i < 5; i++) {
615 mdiobus_write(bus, i, MII_ADVERTISE,
616 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
617 ADVERTISE_PAUSE_ASYM);
618 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
622 priv->initialized = true;
627 ar8316_hw_init(struct ar8216_priv *priv)
633 val = priv->read(priv, 0x8);
635 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
636 if (priv->port4_phy) {
637 /* value taken from Ubiquiti RouterStation Pro */
639 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
642 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
644 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
645 /* value taken from AVM Fritz!Box 7390 sources */
648 /* no known value for phy interface */
649 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
650 priv->phy->interface);
657 priv->write(priv, 0x8, newval);
659 /* Initialize the ports */
660 bus = priv->phy->bus;
661 for (i = 0; i < 5; i++) {
662 if ((i == 4) && priv->port4_phy &&
663 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
664 /* work around for phy4 rgmii mode */
665 ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
667 ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
669 ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
673 /* initialize the port itself */
674 mdiobus_write(bus, i, MII_ADVERTISE,
675 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
676 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
677 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
682 priv->initialized = true;
687 ar8216_init_globals(struct ar8216_priv *priv)
689 switch (priv->chip) {
691 /* standard atheros magic */
692 priv->write(priv, 0x38, 0xc000050e);
694 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
695 AR8216_GCTRL_MTU, 1518 + 8 + 2);
698 /* standard atheros magic */
699 priv->write(priv, 0x38, 0xc000050e);
701 /* enable cpu port to receive multicast and broadcast frames */
702 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
706 /* enable jumbo frames */
707 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
708 AR8316_GCTRL_MTU, 9018 + 8 + 2);
714 ar8216_init_port(struct ar8216_priv *priv, int port)
716 /* Enable port learning and tx */
717 priv->write(priv, AR8216_REG_PORT_CTRL(port),
718 AR8216_PORT_CTRL_LEARN |
719 (4 << AR8216_PORT_CTRL_STATE_S));
721 priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
723 if (port == AR8216_PORT_CPU) {
724 priv->write(priv, AR8216_REG_PORT_STATUS(port),
725 AR8216_PORT_STATUS_LINK_UP |
726 ((priv->chip == AR8316) ?
727 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
728 AR8216_PORT_STATUS_TXMAC |
729 AR8216_PORT_STATUS_RXMAC |
730 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
731 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
732 AR8216_PORT_STATUS_DUPLEX);
734 priv->write(priv, AR8216_REG_PORT_STATUS(port),
735 AR8216_PORT_STATUS_LINK_AUTO);
740 ar8216_reset_switch(struct switch_dev *dev)
742 struct ar8216_priv *priv = to_ar8216(dev);
745 mutex_lock(&priv->reg_mutex);
746 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
747 offsetof(struct ar8216_priv, vlan));
749 for (i = 0; i < AR8X16_MAX_VLANS; i++)
750 priv->vlan_id[i] = i;
752 /* Configure all ports */
753 for (i = 0; i < AR8216_NUM_PORTS; i++)
754 ar8216_init_port(priv, i);
756 ar8216_init_globals(priv);
757 mutex_unlock(&priv->reg_mutex);
759 return ar8216_hw_apply(dev);
762 static const struct switch_dev_ops ar8216_sw_ops = {
764 .attr = ar8216_globals,
765 .n_attr = ARRAY_SIZE(ar8216_globals),
769 .n_attr = ARRAY_SIZE(ar8216_port),
773 .n_attr = ARRAY_SIZE(ar8216_vlan),
775 .get_port_pvid = ar8216_get_pvid,
776 .set_port_pvid = ar8216_set_pvid,
777 .get_vlan_ports = ar8216_get_ports,
778 .set_vlan_ports = ar8216_set_ports,
779 .apply_config = ar8216_hw_apply,
780 .reset_switch = ar8216_reset_switch,
781 .get_port_link = ar8216_get_port_link,
785 ar8216_id_chip(struct ar8216_priv *priv)
791 priv->chip = UNKNOWN;
793 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
797 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
798 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
801 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
805 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
823 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
824 (int)(id >> AR8216_CTRL_VERSION_S),
825 (int)(id & AR8216_CTRL_REVISION),
826 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
827 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
836 ar8216_config_init(struct phy_device *pdev)
838 struct ar8216_priv *priv = pdev->priv;
839 struct net_device *dev = pdev->attached_dev;
840 struct switch_dev *swdev;
844 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
851 ret = ar8216_id_chip(priv);
855 if (pdev->addr != 0) {
856 if (priv->chip == AR8316) {
857 pdev->supported |= SUPPORTED_1000baseT_Full;
858 pdev->advertising |= ADVERTISED_1000baseT_Full;
860 /* check if we're attaching to the switch twice */
861 pdev = pdev->bus->phy_map[0];
867 /* switch device has not been initialized, reuse priv */
869 priv->port4_phy = true;
876 /* switch device has been initialized, reinit */
878 priv->dev.ports = (AR8216_NUM_PORTS - 1);
879 priv->initialized = false;
880 priv->port4_phy = true;
881 ar8316_hw_init(priv);
889 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
890 pdev->attached_dev->name, priv->chip);
892 pdev->supported = priv->chip == AR8316 ?
893 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
894 pdev->advertising = pdev->supported;
896 mutex_init(&priv->reg_mutex);
897 priv->read = ar8216_mii_read;
898 priv->write = ar8216_mii_write;
903 swdev->cpu_port = AR8216_PORT_CPU;
904 swdev->ops = &ar8216_sw_ops;
905 swdev->ports = AR8216_NUM_PORTS;
907 if (priv->chip == AR8316) {
908 swdev->name = "Atheros AR8316";
909 swdev->vlans = AR8X16_MAX_VLANS;
911 if (priv->port4_phy) {
912 /* port 5 connected to the other mac, therefore unusable */
913 swdev->ports = (AR8216_NUM_PORTS - 1);
915 } else if (priv->chip == AR8236) {
916 swdev->name = "Atheros AR8236";
917 swdev->vlans = AR8216_NUM_VLANS;
918 swdev->ports = AR8216_NUM_PORTS;
920 swdev->name = "Atheros AR8216";
921 swdev->vlans = AR8216_NUM_VLANS;
924 ret = register_switch(&priv->dev, pdev->attached_dev);
931 if (priv->chip == AR8216)
932 ret = ar8216_hw_init(priv);
933 else if (priv->chip == AR8236)
934 ret = ar8236_hw_init(priv);
935 else if (priv->chip == AR8316)
936 ret = ar8316_hw_init(priv);
941 ret = ar8216_reset_switch(&priv->dev);
947 /* VID fixup only needed on ar8216 */
948 if (pdev->addr == 0 && priv->chip == AR8216) {
950 pdev->netif_receive_skb = ar8216_netif_receive_skb;
951 pdev->netif_rx = ar8216_netif_rx;
952 priv->ndo_old = dev->netdev_ops;
953 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
954 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
955 dev->netdev_ops = &priv->ndo;
968 ar8216_read_status(struct phy_device *phydev)
970 struct ar8216_priv *priv = phydev->priv;
971 struct switch_port_link link;
974 if (phydev->addr != 0)
975 return genphy_read_status(phydev);
977 ar8216_read_port_link(priv, phydev->addr, &link);
978 phydev->link = !!link.link;
982 switch (link.speed) {
983 case SWITCH_PORT_SPEED_10:
984 phydev->speed = SPEED_10;
986 case SWITCH_PORT_SPEED_100:
987 phydev->speed = SPEED_100;
989 case SWITCH_PORT_SPEED_1000:
990 phydev->speed = SPEED_1000;
995 phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
997 /* flush the address translation unit */
998 mutex_lock(&priv->reg_mutex);
999 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
1001 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
1002 mutex_unlock(&priv->reg_mutex);
1004 phydev->state = PHY_RUNNING;
1005 netif_carrier_on(phydev->attached_dev);
1006 phydev->adjust_link(phydev->attached_dev);
1012 ar8216_config_aneg(struct phy_device *phydev)
1014 if (phydev->addr == 0)
1017 return genphy_config_aneg(phydev);
1021 ar8216_probe(struct phy_device *pdev)
1023 struct ar8216_priv priv;
1026 return ar8216_id_chip(&priv);
1030 ar8216_remove(struct phy_device *pdev)
1032 struct ar8216_priv *priv = pdev->priv;
1033 struct net_device *dev = pdev->attached_dev;
1038 if (priv->ndo_old && dev)
1039 dev->netdev_ops = priv->ndo_old;
1040 if (pdev->addr == 0)
1041 unregister_switch(&priv->dev);
1045 static struct phy_driver ar8216_driver = {
1046 .phy_id = 0x004d0000,
1047 .name = "Atheros AR8216/AR8236/AR8316",
1048 .phy_id_mask = 0xffff0000,
1049 .features = PHY_BASIC_FEATURES,
1050 .probe = ar8216_probe,
1051 .remove = ar8216_remove,
1052 .config_init = &ar8216_config_init,
1053 .config_aneg = &ar8216_config_aneg,
1054 .read_status = &ar8216_read_status,
1055 .driver = { .owner = THIS_MODULE },
1061 return phy_driver_register(&ar8216_driver);
1067 phy_driver_unregister(&ar8216_driver);
1070 module_init(ar8216_init);
1071 module_exit(ar8216_exit);
1072 MODULE_LICENSE("GPL");