2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
34 /* size of the vlan table */
35 #define AR8X16_MAX_VLANS 128
36 #define AR8X16_PROBE_RETRIES 10
39 struct switch_dev dev;
40 struct phy_device *phy;
41 u32 (*read)(struct ar8216_priv *priv, int reg);
42 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
43 const struct net_device_ops *ndo_old;
44 struct net_device_ops ndo;
45 struct mutex reg_mutex;
53 /* all fields below are cleared on reset */
55 u16 vlan_id[AR8X16_MAX_VLANS];
56 u8 vlan_table[AR8X16_MAX_VLANS];
58 u16 pvid[AR8216_NUM_PORTS];
61 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
64 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
73 *page = regaddr & 0x1ff;
77 ar8216_mii_read(struct ar8216_priv *priv, int reg)
79 struct phy_device *phy = priv->phy;
80 struct mii_bus *bus = phy->bus;
84 split_addr((u32) reg, &r1, &r2, &page);
86 mutex_lock(&bus->mdio_lock);
88 bus->write(bus, 0x18, 0, page);
89 msleep(1); /* wait for the page switch to propagate */
90 lo = bus->read(bus, 0x10 | r2, r1);
91 hi = bus->read(bus, 0x10 | r2, r1 + 1);
93 mutex_unlock(&bus->mdio_lock);
95 return (hi << 16) | lo;
99 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
101 struct phy_device *phy = priv->phy;
102 struct mii_bus *bus = phy->bus;
106 split_addr((u32) reg, &r1, &r2, &r3);
108 hi = (u16) (val >> 16);
110 mutex_lock(&bus->mdio_lock);
112 bus->write(bus, 0x18, 0, r3);
113 msleep(1); /* wait for the page switch to propagate */
114 bus->write(bus, 0x10 | r2, r1 + 1, hi);
115 bus->write(bus, 0x10 | r2, r1, lo);
117 mutex_unlock(&bus->mdio_lock);
121 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
125 v = priv->read(priv, reg);
128 priv->write(priv, reg, v);
134 ar8216_id_chip(struct ar8216_priv *priv)
140 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
144 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
145 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
148 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
152 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
167 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
168 (int)(id >> AR8216_CTRL_VERSION_S),
169 (int)(id & AR8216_CTRL_REVISION),
170 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
171 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
178 ar8216_read_port_link(struct ar8216_priv *priv, int port,
179 struct switch_port_link *link)
184 memset(link, '\0', sizeof(*link));
186 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
188 link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
190 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
197 link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
198 link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
199 link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
201 speed = (status & AR8216_PORT_STATUS_SPEED) >>
202 AR8216_PORT_STATUS_SPEED_S;
205 case AR8216_PORT_SPEED_10M:
206 link->speed = SWITCH_PORT_SPEED_10;
208 case AR8216_PORT_SPEED_100M:
209 link->speed = SWITCH_PORT_SPEED_100;
211 case AR8216_PORT_SPEED_1000M:
212 link->speed = SWITCH_PORT_SPEED_1000;
215 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
221 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
222 struct switch_val *val)
224 struct ar8216_priv *priv = to_ar8216(dev);
225 priv->vlan = !!val->value.i;
230 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
231 struct switch_val *val)
233 struct ar8216_priv *priv = to_ar8216(dev);
234 val->value.i = priv->vlan;
240 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
242 struct ar8216_priv *priv = to_ar8216(dev);
244 /* make sure no invalid PVIDs get set */
246 if (vlan >= dev->vlans)
249 priv->pvid[port] = vlan;
254 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
256 struct ar8216_priv *priv = to_ar8216(dev);
257 *vlan = priv->pvid[port];
262 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
263 struct switch_val *val)
265 struct ar8216_priv *priv = to_ar8216(dev);
266 priv->vlan_id[val->port_vlan] = val->value.i;
271 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
272 struct switch_val *val)
274 struct ar8216_priv *priv = to_ar8216(dev);
275 val->value.i = priv->vlan_id[val->port_vlan];
280 ar8216_get_port_link(struct switch_dev *dev, int port,
281 struct switch_port_link *link)
283 struct ar8216_priv *priv = to_ar8216(dev);
285 ar8216_read_port_link(priv, port, link);
290 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
292 struct ar8216_priv *priv = dev->phy_ptr;
301 if (unlikely(skb_headroom(skb) < 2)) {
302 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
306 buf = skb_push(skb, 2);
311 return priv->ndo_old->ndo_start_xmit(skb, dev);
314 dev_kfree_skb_any(skb);
319 ar8216_mangle_rx(struct sk_buff *skb, int napi)
321 struct ar8216_priv *priv;
322 struct net_device *dev;
334 /* don't strip the header if vlan mode is disabled */
338 /* strip header, get vlan id */
342 /* check for vlan header presence */
343 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
348 /* no need to fix up packets coming from a tagged source */
349 if (priv->vlan_tagged & (1 << port))
352 /* lookup port vid from local table, the switch passes an invalid vlan id */
353 vlan = priv->vlan_id[priv->pvid[port]];
356 buf[14 + 2] |= vlan >> 8;
357 buf[15 + 2] = vlan & 0xff;
360 skb->protocol = eth_type_trans(skb, skb->dev);
363 return netif_receive_skb(skb);
365 return netif_rx(skb);
368 /* no vlan? eat the packet! */
369 dev_kfree_skb_any(skb);
374 ar8216_netif_rx(struct sk_buff *skb)
376 return ar8216_mangle_rx(skb, 0);
380 ar8216_netif_receive_skb(struct sk_buff *skb)
382 return ar8216_mangle_rx(skb, 1);
386 static struct switch_attr ar8216_globals[] = {
388 .type = SWITCH_TYPE_INT,
389 .name = "enable_vlan",
390 .description = "Enable VLAN mode",
391 .set = ar8216_set_vlan,
392 .get = ar8216_get_vlan,
397 static struct switch_attr ar8216_port[] = {
400 static struct switch_attr ar8216_vlan[] = {
402 .type = SWITCH_TYPE_INT,
404 .description = "VLAN ID (0-4094)",
405 .set = ar8216_set_vid,
406 .get = ar8216_get_vid,
413 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
415 struct ar8216_priv *priv = to_ar8216(dev);
416 u8 ports = priv->vlan_table[val->port_vlan];
420 for (i = 0; i < AR8216_NUM_PORTS; i++) {
421 struct switch_port *p;
423 if (!(ports & (1 << i)))
426 p = &val->value.ports[val->len++];
428 if (priv->vlan_tagged & (1 << i))
429 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
437 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
439 struct ar8216_priv *priv = to_ar8216(dev);
440 u8 *vt = &priv->vlan_table[val->port_vlan];
444 for (i = 0; i < val->len; i++) {
445 struct switch_port *p = &val->value.ports[i];
447 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
448 priv->vlan_tagged |= (1 << p->id);
450 priv->vlan_tagged &= ~(1 << p->id);
451 priv->pvid[p->id] = val->port_vlan;
453 /* make sure that an untagged port does not
454 * appear in other vlans */
455 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
456 if (j == val->port_vlan)
458 priv->vlan_table[j] &= ~(1 << p->id);
468 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
474 t = priv->read(priv, reg);
475 if ((t & mask) == val)
484 pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
485 (unsigned int) reg, t, mask, val);
490 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
492 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
494 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
495 val &= AR8216_VTUDATA_MEMBER;
496 val |= AR8216_VTUDATA_VALID;
497 priv->write(priv, AR8216_REG_VTU_DATA, val);
499 op |= AR8216_VTU_ACTIVE;
500 priv->write(priv, AR8216_REG_VTU, op);
504 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
505 u32 members, u32 pvid)
509 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip == AR8216)
510 header = AR8216_PORT_CTRL_HEADER;
514 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
515 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
516 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
517 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
518 AR8216_PORT_CTRL_LEARN | header |
519 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
520 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
522 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
523 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
524 AR8216_PORT_VLAN_DEFAULT_ID,
525 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
526 (ingress << AR8216_PORT_VLAN_MODE_S) |
527 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
531 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
532 u32 members, u32 pvid)
534 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
535 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
536 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
537 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
538 AR8216_PORT_CTRL_LEARN |
539 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
540 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
542 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
543 AR8236_PORT_VLAN_DEFAULT_ID,
544 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
546 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
547 AR8236_PORT_VLAN2_VLAN_MODE |
548 AR8236_PORT_VLAN2_MEMBER,
549 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
550 (members << AR8236_PORT_VLAN2_MEMBER_S));
554 ar8216_hw_apply(struct switch_dev *dev)
556 struct ar8216_priv *priv = to_ar8216(dev);
557 u8 portmask[AR8216_NUM_PORTS];
560 mutex_lock(&priv->reg_mutex);
561 /* flush all vlan translation unit entries */
562 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
564 memset(portmask, 0, sizeof(portmask));
566 /* calculate the port destination masks and load vlans
567 * into the vlan translation unit */
568 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
569 u8 vp = priv->vlan_table[j];
574 for (i = 0; i < AR8216_NUM_PORTS; i++) {
577 portmask[i] |= vp & ~mask;
582 (priv->vlan_id[j] << AR8216_VTU_VID_S),
583 priv->vlan_table[j]);
587 * isolate all ports, but connect them to the cpu port */
588 for (i = 0; i < AR8216_NUM_PORTS; i++) {
589 if (i == AR8216_PORT_CPU)
592 portmask[i] = 1 << AR8216_PORT_CPU;
593 portmask[AR8216_PORT_CPU] |= (1 << i);
597 /* update the port destination mask registers and tag settings */
598 for (i = 0; i < AR8216_NUM_PORTS; i++) {
603 pvid = priv->vlan_id[priv->pvid[i]];
609 if (priv->vlan_tagged & (1 << i))
610 egress = AR8216_OUT_ADD_VLAN;
612 egress = AR8216_OUT_STRIP_VLAN;
614 egress = AR8216_OUT_KEEP;
617 ingress = AR8216_IN_SECURE;
619 ingress = AR8216_IN_PORT_ONLY;
622 if (priv->chip == AR8236)
623 ar8236_setup_port(priv, i, egress, ingress, portmask[i],
626 ar8216_setup_port(priv, i, egress, ingress, portmask[i],
629 mutex_unlock(&priv->reg_mutex);
634 ar8236_hw_init(struct ar8216_priv *priv) {
635 static int initialized;
642 /* Initialize the PHYs */
643 bus = priv->phy->bus;
644 for (i = 0; i < 5; i++) {
645 mdiobus_write(bus, i, MII_ADVERTISE,
646 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
647 ADVERTISE_PAUSE_ASYM);
648 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
657 ar8316_hw_init(struct ar8216_priv *priv) {
662 val = priv->read(priv, 0x8);
664 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
665 if (priv->port4_phy) {
666 /* value taken from Ubiquiti RouterStation Pro */
668 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
671 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
673 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
674 /* value taken from AVM Fritz!Box 7390 sources */
677 /* no known value for phy interface */
678 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
679 priv->phy->interface);
686 priv->write(priv, 0x8, newval);
688 /* standard atheros magic */
689 priv->write(priv, 0x38, 0xc000050e);
691 /* Initialize the ports */
692 bus = priv->phy->bus;
693 for (i = 0; i < 5; i++) {
694 if ((i == 4) && priv->port4_phy &&
695 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
696 /* work around for phy4 rgmii mode */
697 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x12);
698 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x480c);
700 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x0);
701 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x824e);
703 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x5);
704 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
708 /* initialize the port itself */
709 mdiobus_write(bus, i, MII_ADVERTISE,
710 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
711 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
712 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
717 priv->initialized = true;
722 ar8216_init_port(struct ar8216_priv *priv, int port)
724 /* Enable port learning and tx */
725 priv->write(priv, AR8216_REG_PORT_CTRL(port),
726 AR8216_PORT_CTRL_LEARN |
727 (4 << AR8216_PORT_CTRL_STATE_S));
729 priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
731 if (port == AR8216_PORT_CPU) {
732 priv->write(priv, AR8216_REG_PORT_STATUS(port),
733 AR8216_PORT_STATUS_LINK_UP |
734 ((priv->chip == AR8316) ?
735 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
736 AR8216_PORT_STATUS_TXMAC |
737 AR8216_PORT_STATUS_RXMAC |
738 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
739 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
740 AR8216_PORT_STATUS_DUPLEX);
742 priv->write(priv, AR8216_REG_PORT_STATUS(port),
743 AR8216_PORT_STATUS_LINK_AUTO);
748 ar8216_reset_switch(struct switch_dev *dev)
750 struct ar8216_priv *priv = to_ar8216(dev);
753 mutex_lock(&priv->reg_mutex);
754 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
755 offsetof(struct ar8216_priv, vlan));
756 for (i = 0; i < AR8X16_MAX_VLANS; i++) {
757 priv->vlan_id[i] = i;
760 /* Configure all ports */
761 for (i = 0; i < AR8216_NUM_PORTS; i++)
762 ar8216_init_port(priv, i);
764 /* XXX: undocumented magic from atheros, required! */
765 priv->write(priv, 0x38, 0xc000050e);
767 if (priv->chip == AR8216) {
768 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
769 AR8216_GCTRL_MTU, 1518 + 8 + 2);
770 } else if (priv->chip == AR8316 ||
771 priv->chip == AR8236) {
772 /* enable jumbo frames */
773 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
774 AR8316_GCTRL_MTU, 9018 + 8 + 2);
777 if (priv->chip == AR8316) {
778 /* enable cpu port to receive multicast and broadcast frames */
779 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
781 mutex_unlock(&priv->reg_mutex);
782 return ar8216_hw_apply(dev);
786 static const struct switch_dev_ops ar8216_ops = {
788 .attr = ar8216_globals,
789 .n_attr = ARRAY_SIZE(ar8216_globals),
793 .n_attr = ARRAY_SIZE(ar8216_port),
797 .n_attr = ARRAY_SIZE(ar8216_vlan),
799 .get_port_pvid = ar8216_get_pvid,
800 .set_port_pvid = ar8216_set_pvid,
801 .get_vlan_ports = ar8216_get_ports,
802 .set_vlan_ports = ar8216_set_ports,
803 .apply_config = ar8216_hw_apply,
804 .reset_switch = ar8216_reset_switch,
805 .get_port_link = ar8216_get_port_link,
809 ar8216_config_init(struct phy_device *pdev)
811 struct ar8216_priv *priv = pdev->priv;
812 struct net_device *dev = pdev->attached_dev;
813 struct switch_dev *swdev;
817 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
824 priv->chip = ar8216_id_chip(priv);
826 if (pdev->addr != 0) {
827 if (priv->chip == AR8316) {
828 pdev->supported |= SUPPORTED_1000baseT_Full;
829 pdev->advertising |= ADVERTISED_1000baseT_Full;
831 /* check if we're attaching to the switch twice */
832 pdev = pdev->bus->phy_map[0];
838 /* switch device has not been initialized, reuse priv */
840 priv->port4_phy = true;
847 /* switch device has been initialized, reinit */
849 priv->dev.ports = (AR8216_NUM_PORTS - 1);
850 priv->initialized = false;
851 priv->port4_phy = true;
852 ar8316_hw_init(priv);
860 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
861 pdev->attached_dev->name, priv->chip);
863 pdev->supported = priv->chip == AR8316 ?
864 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
865 pdev->advertising = pdev->supported;
867 mutex_init(&priv->reg_mutex);
868 priv->read = ar8216_mii_read;
869 priv->write = ar8216_mii_write;
874 swdev->cpu_port = AR8216_PORT_CPU;
875 swdev->ops = &ar8216_ops;
876 swdev->ports = AR8216_NUM_PORTS;
878 if (priv->chip == AR8316) {
879 swdev->name = "Atheros AR8316";
880 swdev->vlans = AR8X16_MAX_VLANS;
882 if (priv->port4_phy) {
883 /* port 5 connected to the other mac, therefore unusable */
884 swdev->ports = (AR8216_NUM_PORTS - 1);
886 } else if (priv->chip == AR8236) {
887 swdev->name = "Atheros AR8236";
888 swdev->vlans = AR8216_NUM_VLANS;
889 swdev->ports = AR8216_NUM_PORTS;
891 swdev->name = "Atheros AR8216";
892 swdev->vlans = AR8216_NUM_VLANS;
895 if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
902 if (priv->chip == AR8316) {
903 ret = ar8316_hw_init(priv);
910 if (priv->chip == AR8236) {
911 ret = ar8236_hw_init(priv);
918 ret = ar8216_reset_switch(&priv->dev);
926 /* VID fixup only needed on ar8216 */
927 if (pdev->addr == 0 && priv->chip == AR8216) {
929 pdev->netif_receive_skb = ar8216_netif_receive_skb;
930 pdev->netif_rx = ar8216_netif_rx;
931 priv->ndo_old = dev->netdev_ops;
932 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
933 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
934 dev->netdev_ops = &priv->ndo;
944 ar8216_read_status(struct phy_device *phydev)
946 struct ar8216_priv *priv = phydev->priv;
947 struct switch_port_link link;
949 if (phydev->addr != 0) {
950 return genphy_read_status(phydev);
953 ar8216_read_port_link(priv, phydev->addr, &link);
954 phydev->link = !!link.link;
958 switch (link.speed) {
959 case SWITCH_PORT_SPEED_10:
960 phydev->speed = SPEED_10;
962 case SWITCH_PORT_SPEED_100:
963 phydev->speed = SPEED_100;
965 case SWITCH_PORT_SPEED_1000:
966 phydev->speed = SPEED_1000;
971 phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
973 /* flush the address translation unit */
974 mutex_lock(&priv->reg_mutex);
975 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
977 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
978 mutex_unlock(&priv->reg_mutex);
980 phydev->state = PHY_RUNNING;
981 netif_carrier_on(phydev->attached_dev);
982 phydev->adjust_link(phydev->attached_dev);
988 ar8216_config_aneg(struct phy_device *phydev)
990 if (phydev->addr == 0)
993 return genphy_config_aneg(phydev);
997 ar8216_probe(struct phy_device *pdev)
999 struct ar8216_priv priv;
1003 chip = ar8216_id_chip(&priv);
1004 if (chip == UNKNOWN)
1011 ar8216_remove(struct phy_device *pdev)
1013 struct ar8216_priv *priv = pdev->priv;
1014 struct net_device *dev = pdev->attached_dev;
1019 if (priv->ndo_old && dev)
1020 dev->netdev_ops = priv->ndo_old;
1021 if (pdev->addr == 0)
1022 unregister_switch(&priv->dev);
1026 static struct phy_driver ar8216_driver = {
1027 .phy_id = 0x004d0000,
1028 .name = "Atheros AR8216/AR8236/AR8316",
1029 .phy_id_mask = 0xffff0000,
1030 .features = PHY_BASIC_FEATURES,
1031 .probe = ar8216_probe,
1032 .remove = ar8216_remove,
1033 .config_init = &ar8216_config_init,
1034 .config_aneg = &ar8216_config_aneg,
1035 .read_status = &ar8216_read_status,
1036 .driver = { .owner = THIS_MODULE },
1042 return phy_driver_register(&ar8216_driver);
1048 phy_driver_unregister(&ar8216_driver);
1051 module_init(ar8216_init);
1052 module_exit(ar8216_exit);
1053 MODULE_LICENSE("GPL");