2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/lockdep.h>
35 /* size of the vlan table */
36 #define AR8X16_MAX_VLANS 128
37 #define AR8X16_PROBE_RETRIES 10
42 int (*hw_init)(struct ar8216_priv *priv);
43 void (*init_port)(struct ar8216_priv *priv, int port);
44 void (*setup_port)(struct ar8216_priv *priv, int port, u32 egress,
45 u32 ingress, u32 members, u32 pvid);
46 int (*atu_flush)(struct ar8216_priv *priv);
47 void (*vtu_flush)(struct ar8216_priv *priv);
48 void (*vtu_load_vlan)(struct ar8216_priv *priv, u32 vid, u32 port_mask);
52 struct switch_dev dev;
53 struct phy_device *phy;
54 u32 (*read)(struct ar8216_priv *priv, int reg);
55 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
56 const struct net_device_ops *ndo_old;
57 struct net_device_ops ndo;
58 struct mutex reg_mutex;
60 const struct ar8xxx_chip *chip;
67 /* all fields below are cleared on reset */
69 u16 vlan_id[AR8X16_MAX_VLANS];
70 u8 vlan_table[AR8X16_MAX_VLANS];
72 u16 pvid[AR8216_NUM_PORTS];
75 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
78 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
87 *page = regaddr & 0x1ff;
91 ar8216_mii_read(struct ar8216_priv *priv, int reg)
93 struct phy_device *phy = priv->phy;
94 struct mii_bus *bus = phy->bus;
98 split_addr((u32) reg, &r1, &r2, &page);
100 mutex_lock(&bus->mdio_lock);
102 bus->write(bus, 0x18, 0, page);
103 usleep_range(1000, 2000); /* wait for the page switch to propagate */
104 lo = bus->read(bus, 0x10 | r2, r1);
105 hi = bus->read(bus, 0x10 | r2, r1 + 1);
107 mutex_unlock(&bus->mdio_lock);
109 return (hi << 16) | lo;
113 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
115 struct phy_device *phy = priv->phy;
116 struct mii_bus *bus = phy->bus;
120 split_addr((u32) reg, &r1, &r2, &r3);
122 hi = (u16) (val >> 16);
124 mutex_lock(&bus->mdio_lock);
126 bus->write(bus, 0x18, 0, r3);
127 usleep_range(1000, 2000); /* wait for the page switch to propagate */
128 bus->write(bus, 0x10 | r2, r1 + 1, hi);
129 bus->write(bus, 0x10 | r2, r1, lo);
131 mutex_unlock(&bus->mdio_lock);
135 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
136 u16 dbg_addr, u16 dbg_data)
138 struct mii_bus *bus = priv->phy->bus;
140 mutex_lock(&bus->mdio_lock);
141 bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
142 bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
143 mutex_unlock(&bus->mdio_lock);
147 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
151 lockdep_assert_held(&priv->reg_mutex);
153 v = priv->read(priv, reg);
156 priv->write(priv, reg, v);
162 ar8216_read_port_link(struct ar8216_priv *priv, int port,
163 struct switch_port_link *link)
168 memset(link, '\0', sizeof(*link));
170 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
172 link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
174 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
181 link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
182 link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
183 link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
185 speed = (status & AR8216_PORT_STATUS_SPEED) >>
186 AR8216_PORT_STATUS_SPEED_S;
189 case AR8216_PORT_SPEED_10M:
190 link->speed = SWITCH_PORT_SPEED_10;
192 case AR8216_PORT_SPEED_100M:
193 link->speed = SWITCH_PORT_SPEED_100;
195 case AR8216_PORT_SPEED_1000M:
196 link->speed = SWITCH_PORT_SPEED_1000;
199 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
205 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
206 struct switch_val *val)
208 struct ar8216_priv *priv = to_ar8216(dev);
209 priv->vlan = !!val->value.i;
214 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
215 struct switch_val *val)
217 struct ar8216_priv *priv = to_ar8216(dev);
218 val->value.i = priv->vlan;
224 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
226 struct ar8216_priv *priv = to_ar8216(dev);
228 /* make sure no invalid PVIDs get set */
230 if (vlan >= dev->vlans)
233 priv->pvid[port] = vlan;
238 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
240 struct ar8216_priv *priv = to_ar8216(dev);
241 *vlan = priv->pvid[port];
246 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
247 struct switch_val *val)
249 struct ar8216_priv *priv = to_ar8216(dev);
250 priv->vlan_id[val->port_vlan] = val->value.i;
255 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
256 struct switch_val *val)
258 struct ar8216_priv *priv = to_ar8216(dev);
259 val->value.i = priv->vlan_id[val->port_vlan];
264 ar8216_get_port_link(struct switch_dev *dev, int port,
265 struct switch_port_link *link)
267 struct ar8216_priv *priv = to_ar8216(dev);
269 ar8216_read_port_link(priv, port, link);
274 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
276 struct ar8216_priv *priv = dev->phy_ptr;
285 if (unlikely(skb_headroom(skb) < 2)) {
286 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
290 buf = skb_push(skb, 2);
295 return priv->ndo_old->ndo_start_xmit(skb, dev);
298 dev_kfree_skb_any(skb);
303 ar8216_mangle_rx(struct sk_buff *skb, int napi)
305 struct ar8216_priv *priv;
306 struct net_device *dev;
318 /* don't strip the header if vlan mode is disabled */
322 /* strip header, get vlan id */
326 /* check for vlan header presence */
327 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
332 /* no need to fix up packets coming from a tagged source */
333 if (priv->vlan_tagged & (1 << port))
336 /* lookup port vid from local table, the switch passes an invalid vlan id */
337 vlan = priv->vlan_id[priv->pvid[port]];
340 buf[14 + 2] |= vlan >> 8;
341 buf[15 + 2] = vlan & 0xff;
344 skb->protocol = eth_type_trans(skb, skb->dev);
347 return netif_receive_skb(skb);
349 return netif_rx(skb);
352 /* no vlan? eat the packet! */
353 dev_kfree_skb_any(skb);
358 ar8216_netif_rx(struct sk_buff *skb)
360 return ar8216_mangle_rx(skb, 0);
364 ar8216_netif_receive_skb(struct sk_buff *skb)
366 return ar8216_mangle_rx(skb, 1);
370 static struct switch_attr ar8216_globals[] = {
372 .type = SWITCH_TYPE_INT,
373 .name = "enable_vlan",
374 .description = "Enable VLAN mode",
375 .set = ar8216_set_vlan,
376 .get = ar8216_get_vlan,
381 static struct switch_attr ar8216_port[] = {
384 static struct switch_attr ar8216_vlan[] = {
386 .type = SWITCH_TYPE_INT,
388 .description = "VLAN ID (0-4094)",
389 .set = ar8216_set_vid,
390 .get = ar8216_get_vid,
397 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
399 struct ar8216_priv *priv = to_ar8216(dev);
400 u8 ports = priv->vlan_table[val->port_vlan];
404 for (i = 0; i < AR8216_NUM_PORTS; i++) {
405 struct switch_port *p;
407 if (!(ports & (1 << i)))
410 p = &val->value.ports[val->len++];
412 if (priv->vlan_tagged & (1 << i))
413 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
421 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
423 struct ar8216_priv *priv = to_ar8216(dev);
424 u8 *vt = &priv->vlan_table[val->port_vlan];
428 for (i = 0; i < val->len; i++) {
429 struct switch_port *p = &val->value.ports[i];
431 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
432 priv->vlan_tagged |= (1 << p->id);
434 priv->vlan_tagged &= ~(1 << p->id);
435 priv->pvid[p->id] = val->port_vlan;
437 /* make sure that an untagged port does not
438 * appear in other vlans */
439 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
440 if (j == val->port_vlan)
442 priv->vlan_table[j] &= ~(1 << p->id);
452 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
458 t = priv->read(priv, reg);
459 if ((t & mask) == val)
468 pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
469 (unsigned int) reg, t, mask, val);
474 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
476 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
478 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
479 val &= AR8216_VTUDATA_MEMBER;
480 val |= AR8216_VTUDATA_VALID;
481 priv->write(priv, AR8216_REG_VTU_DATA, val);
483 op |= AR8216_VTU_ACTIVE;
484 priv->write(priv, AR8216_REG_VTU, op);
488 ar8216_vtu_flush(struct ar8216_priv *priv)
490 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
494 ar8216_vtu_load_vlan(struct ar8216_priv *priv, u32 vid, u32 port_mask)
498 op = AR8216_VTU_OP_LOAD | (vid << AR8216_VTU_VID_S);
499 ar8216_vtu_op(priv, op, port_mask);
503 ar8216_atu_flush(struct ar8216_priv *priv)
507 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
509 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
515 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
516 u32 members, u32 pvid)
520 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip_type == AR8216)
521 header = AR8216_PORT_CTRL_HEADER;
525 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
526 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
527 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
528 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
529 AR8216_PORT_CTRL_LEARN | header |
530 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
531 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
533 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
534 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
535 AR8216_PORT_VLAN_DEFAULT_ID,
536 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
537 (ingress << AR8216_PORT_VLAN_MODE_S) |
538 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
542 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
543 u32 members, u32 pvid)
545 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
546 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
547 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
548 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
549 AR8216_PORT_CTRL_LEARN |
550 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
551 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
553 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
554 AR8236_PORT_VLAN_DEFAULT_ID,
555 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
557 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
558 AR8236_PORT_VLAN2_VLAN_MODE |
559 AR8236_PORT_VLAN2_MEMBER,
560 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
561 (members << AR8236_PORT_VLAN2_MEMBER_S));
565 ar8216_hw_apply(struct switch_dev *dev)
567 struct ar8216_priv *priv = to_ar8216(dev);
568 u8 portmask[AR8216_NUM_PORTS];
571 mutex_lock(&priv->reg_mutex);
572 /* flush all vlan translation unit entries */
573 priv->chip->vtu_flush(priv);
575 memset(portmask, 0, sizeof(portmask));
577 /* calculate the port destination masks and load vlans
578 * into the vlan translation unit */
579 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
580 u8 vp = priv->vlan_table[j];
585 for (i = 0; i < AR8216_NUM_PORTS; i++) {
588 portmask[i] |= vp & ~mask;
591 priv->chip->vtu_load_vlan(priv, priv->vlan_id[j],
592 priv->vlan_table[j]);
596 * isolate all ports, but connect them to the cpu port */
597 for (i = 0; i < AR8216_NUM_PORTS; i++) {
598 if (i == AR8216_PORT_CPU)
601 portmask[i] = 1 << AR8216_PORT_CPU;
602 portmask[AR8216_PORT_CPU] |= (1 << i);
606 /* update the port destination mask registers and tag settings */
607 for (i = 0; i < AR8216_NUM_PORTS; i++) {
612 pvid = priv->vlan_id[priv->pvid[i]];
613 if (priv->vlan_tagged & (1 << i))
614 egress = AR8216_OUT_ADD_VLAN;
616 egress = AR8216_OUT_STRIP_VLAN;
617 ingress = AR8216_IN_SECURE;
620 egress = AR8216_OUT_KEEP;
621 ingress = AR8216_IN_PORT_ONLY;
624 priv->chip->setup_port(priv, i, egress, ingress, portmask[i],
627 mutex_unlock(&priv->reg_mutex);
632 ar8216_hw_init(struct ar8216_priv *priv)
638 ar8236_hw_init(struct ar8216_priv *priv)
643 if (priv->initialized)
646 /* Initialize the PHYs */
647 bus = priv->phy->bus;
648 for (i = 0; i < 5; i++) {
649 mdiobus_write(bus, i, MII_ADVERTISE,
650 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
651 ADVERTISE_PAUSE_ASYM);
652 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
656 priv->initialized = true;
661 ar8316_hw_init(struct ar8216_priv *priv)
667 val = priv->read(priv, 0x8);
669 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
670 if (priv->port4_phy) {
671 /* value taken from Ubiquiti RouterStation Pro */
673 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
676 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
678 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
679 /* value taken from AVM Fritz!Box 7390 sources */
682 /* no known value for phy interface */
683 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
684 priv->phy->interface);
691 priv->write(priv, 0x8, newval);
693 /* Initialize the ports */
694 bus = priv->phy->bus;
695 for (i = 0; i < 5; i++) {
696 if ((i == 4) && priv->port4_phy &&
697 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
698 /* work around for phy4 rgmii mode */
699 ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
701 ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
703 ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
707 /* initialize the port itself */
708 mdiobus_write(bus, i, MII_ADVERTISE,
709 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
710 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
711 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
716 priv->initialized = true;
721 ar8216_init_globals(struct ar8216_priv *priv)
723 switch (priv->chip_type) {
725 /* standard atheros magic */
726 priv->write(priv, 0x38, 0xc000050e);
728 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
729 AR8216_GCTRL_MTU, 1518 + 8 + 2);
732 /* standard atheros magic */
733 priv->write(priv, 0x38, 0xc000050e);
735 /* enable cpu port to receive multicast and broadcast frames */
736 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
740 /* enable jumbo frames */
741 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
742 AR8316_GCTRL_MTU, 9018 + 8 + 2);
748 ar8216_init_port(struct ar8216_priv *priv, int port)
750 /* Enable port learning and tx */
751 priv->write(priv, AR8216_REG_PORT_CTRL(port),
752 AR8216_PORT_CTRL_LEARN |
753 (4 << AR8216_PORT_CTRL_STATE_S));
755 priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
757 if (port == AR8216_PORT_CPU) {
758 priv->write(priv, AR8216_REG_PORT_STATUS(port),
759 AR8216_PORT_STATUS_LINK_UP |
760 ((priv->chip_type == AR8316) ?
761 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
762 AR8216_PORT_STATUS_TXMAC |
763 AR8216_PORT_STATUS_RXMAC |
764 ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
765 ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
766 AR8216_PORT_STATUS_DUPLEX);
768 priv->write(priv, AR8216_REG_PORT_STATUS(port),
769 AR8216_PORT_STATUS_LINK_AUTO);
773 static const struct ar8xxx_chip ar8216_chip = {
774 .hw_init = ar8216_hw_init,
775 .init_port = ar8216_init_port,
776 .setup_port = ar8216_setup_port,
777 .atu_flush = ar8216_atu_flush,
778 .vtu_flush = ar8216_vtu_flush,
779 .vtu_load_vlan = ar8216_vtu_load_vlan,
782 static const struct ar8xxx_chip ar8236_chip = {
783 .hw_init = ar8236_hw_init,
784 .init_port = ar8216_init_port,
785 .setup_port = ar8236_setup_port,
786 .atu_flush = ar8216_atu_flush,
787 .vtu_flush = ar8216_vtu_flush,
788 .vtu_load_vlan = ar8216_vtu_load_vlan,
791 static const struct ar8xxx_chip ar8316_chip = {
792 .hw_init = ar8316_hw_init,
793 .init_port = ar8216_init_port,
794 .setup_port = ar8216_setup_port,
795 .atu_flush = ar8216_atu_flush,
796 .vtu_flush = ar8216_vtu_flush,
797 .vtu_load_vlan = ar8216_vtu_load_vlan,
801 ar8216_reset_switch(struct switch_dev *dev)
803 struct ar8216_priv *priv = to_ar8216(dev);
806 mutex_lock(&priv->reg_mutex);
807 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
808 offsetof(struct ar8216_priv, vlan));
810 for (i = 0; i < AR8X16_MAX_VLANS; i++)
811 priv->vlan_id[i] = i;
813 /* Configure all ports */
814 for (i = 0; i < AR8216_NUM_PORTS; i++)
815 priv->chip->init_port(priv, i);
817 ar8216_init_globals(priv);
818 mutex_unlock(&priv->reg_mutex);
820 return ar8216_hw_apply(dev);
823 static const struct switch_dev_ops ar8216_sw_ops = {
825 .attr = ar8216_globals,
826 .n_attr = ARRAY_SIZE(ar8216_globals),
830 .n_attr = ARRAY_SIZE(ar8216_port),
834 .n_attr = ARRAY_SIZE(ar8216_vlan),
836 .get_port_pvid = ar8216_get_pvid,
837 .set_port_pvid = ar8216_set_pvid,
838 .get_vlan_ports = ar8216_get_ports,
839 .set_vlan_ports = ar8216_set_ports,
840 .apply_config = ar8216_hw_apply,
841 .reset_switch = ar8216_reset_switch,
842 .get_port_link = ar8216_get_port_link,
846 ar8216_id_chip(struct ar8216_priv *priv)
852 priv->chip_type = UNKNOWN;
854 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
858 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
859 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
862 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
866 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
873 priv->chip_type = AR8216;
874 priv->chip = &ar8216_chip;
877 priv->chip_type = AR8236;
878 priv->chip = &ar8236_chip;
882 priv->chip_type = AR8316;
883 priv->chip = &ar8316_chip;
887 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
888 (int)(id >> AR8216_CTRL_VERSION_S),
889 (int)(id & AR8216_CTRL_REVISION),
890 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
891 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
900 ar8216_config_init(struct phy_device *pdev)
902 struct ar8216_priv *priv = pdev->priv;
903 struct net_device *dev = pdev->attached_dev;
904 struct switch_dev *swdev;
908 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
915 ret = ar8216_id_chip(priv);
919 if (pdev->addr != 0) {
920 if (priv->chip_type == AR8316) {
921 pdev->supported |= SUPPORTED_1000baseT_Full;
922 pdev->advertising |= ADVERTISED_1000baseT_Full;
924 /* check if we're attaching to the switch twice */
925 pdev = pdev->bus->phy_map[0];
931 /* switch device has not been initialized, reuse priv */
933 priv->port4_phy = true;
940 /* switch device has been initialized, reinit */
942 priv->dev.ports = (AR8216_NUM_PORTS - 1);
943 priv->initialized = false;
944 priv->port4_phy = true;
945 ar8316_hw_init(priv);
953 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
954 pdev->attached_dev->name, priv->chip_type);
956 pdev->supported = priv->chip_type == AR8316 ?
957 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
958 pdev->advertising = pdev->supported;
960 mutex_init(&priv->reg_mutex);
961 priv->read = ar8216_mii_read;
962 priv->write = ar8216_mii_write;
967 swdev->cpu_port = AR8216_PORT_CPU;
968 swdev->ops = &ar8216_sw_ops;
969 swdev->ports = AR8216_NUM_PORTS;
971 if (priv->chip_type == AR8316) {
972 swdev->name = "Atheros AR8316";
973 swdev->vlans = AR8X16_MAX_VLANS;
975 if (priv->port4_phy) {
976 /* port 5 connected to the other mac, therefore unusable */
977 swdev->ports = (AR8216_NUM_PORTS - 1);
979 } else if (priv->chip_type == AR8236) {
980 swdev->name = "Atheros AR8236";
981 swdev->vlans = AR8216_NUM_VLANS;
982 swdev->ports = AR8216_NUM_PORTS;
984 swdev->name = "Atheros AR8216";
985 swdev->vlans = AR8216_NUM_VLANS;
988 ret = register_switch(&priv->dev, pdev->attached_dev);
994 ret = priv->chip->hw_init(priv);
998 ret = ar8216_reset_switch(&priv->dev);
1002 dev->phy_ptr = priv;
1004 /* VID fixup only needed on ar8216 */
1005 if (pdev->addr == 0 && priv->chip_type == AR8216) {
1006 pdev->pkt_align = 2;
1007 pdev->netif_receive_skb = ar8216_netif_receive_skb;
1008 pdev->netif_rx = ar8216_netif_rx;
1009 priv->ndo_old = dev->netdev_ops;
1010 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
1011 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
1012 dev->netdev_ops = &priv->ndo;
1025 ar8216_read_status(struct phy_device *phydev)
1027 struct ar8216_priv *priv = phydev->priv;
1028 struct switch_port_link link;
1031 if (phydev->addr != 0)
1032 return genphy_read_status(phydev);
1034 ar8216_read_port_link(priv, phydev->addr, &link);
1035 phydev->link = !!link.link;
1039 switch (link.speed) {
1040 case SWITCH_PORT_SPEED_10:
1041 phydev->speed = SPEED_10;
1043 case SWITCH_PORT_SPEED_100:
1044 phydev->speed = SPEED_100;
1046 case SWITCH_PORT_SPEED_1000:
1047 phydev->speed = SPEED_1000;
1052 phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
1054 /* flush the address translation unit */
1055 mutex_lock(&priv->reg_mutex);
1056 ret = priv->chip->atu_flush(priv);
1057 mutex_unlock(&priv->reg_mutex);
1059 phydev->state = PHY_RUNNING;
1060 netif_carrier_on(phydev->attached_dev);
1061 phydev->adjust_link(phydev->attached_dev);
1067 ar8216_config_aneg(struct phy_device *phydev)
1069 if (phydev->addr == 0)
1072 return genphy_config_aneg(phydev);
1076 ar8216_probe(struct phy_device *pdev)
1078 struct ar8216_priv priv;
1081 return ar8216_id_chip(&priv);
1085 ar8216_remove(struct phy_device *pdev)
1087 struct ar8216_priv *priv = pdev->priv;
1088 struct net_device *dev = pdev->attached_dev;
1093 if (priv->ndo_old && dev)
1094 dev->netdev_ops = priv->ndo_old;
1095 if (pdev->addr == 0)
1096 unregister_switch(&priv->dev);
1100 static struct phy_driver ar8216_driver = {
1101 .phy_id = 0x004d0000,
1102 .name = "Atheros AR8216/AR8236/AR8316",
1103 .phy_id_mask = 0xffff0000,
1104 .features = PHY_BASIC_FEATURES,
1105 .probe = ar8216_probe,
1106 .remove = ar8216_remove,
1107 .config_init = &ar8216_config_init,
1108 .config_aneg = &ar8216_config_aneg,
1109 .read_status = &ar8216_read_status,
1110 .driver = { .owner = THIS_MODULE },
1116 return phy_driver_register(&ar8216_driver);
1122 phy_driver_unregister(&ar8216_driver);
1125 module_init(ar8216_init);
1126 module_exit(ar8216_exit);
1127 MODULE_LICENSE("GPL");