2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/lockdep.h>
35 /* size of the vlan table */
36 #define AR8X16_MAX_VLANS 128
37 #define AR8X16_PROBE_RETRIES 10
41 #define AR8XXX_CAP_GIGE BIT(0)
46 int (*hw_init)(struct ar8216_priv *priv);
47 void (*init_port)(struct ar8216_priv *priv, int port);
48 void (*setup_port)(struct ar8216_priv *priv, int port, u32 egress,
49 u32 ingress, u32 members, u32 pvid);
50 int (*atu_flush)(struct ar8216_priv *priv);
51 void (*vtu_flush)(struct ar8216_priv *priv);
52 void (*vtu_load_vlan)(struct ar8216_priv *priv, u32 vid, u32 port_mask);
56 struct switch_dev dev;
57 struct phy_device *phy;
58 u32 (*read)(struct ar8216_priv *priv, int reg);
59 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
60 const struct net_device_ops *ndo_old;
61 struct net_device_ops ndo;
62 struct mutex reg_mutex;
64 const struct ar8xxx_chip *chip;
71 /* all fields below are cleared on reset */
73 u16 vlan_id[AR8X16_MAX_VLANS];
74 u8 vlan_table[AR8X16_MAX_VLANS];
76 u16 pvid[AR8216_NUM_PORTS];
79 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
81 static inline bool ar8xxx_has_gige(struct ar8216_priv *priv)
83 return priv->chip->caps & AR8XXX_CAP_GIGE;
87 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
96 *page = regaddr & 0x1ff;
100 ar8216_mii_read(struct ar8216_priv *priv, int reg)
102 struct phy_device *phy = priv->phy;
103 struct mii_bus *bus = phy->bus;
107 split_addr((u32) reg, &r1, &r2, &page);
109 mutex_lock(&bus->mdio_lock);
111 bus->write(bus, 0x18, 0, page);
112 usleep_range(1000, 2000); /* wait for the page switch to propagate */
113 lo = bus->read(bus, 0x10 | r2, r1);
114 hi = bus->read(bus, 0x10 | r2, r1 + 1);
116 mutex_unlock(&bus->mdio_lock);
118 return (hi << 16) | lo;
122 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
124 struct phy_device *phy = priv->phy;
125 struct mii_bus *bus = phy->bus;
129 split_addr((u32) reg, &r1, &r2, &r3);
131 hi = (u16) (val >> 16);
133 mutex_lock(&bus->mdio_lock);
135 bus->write(bus, 0x18, 0, r3);
136 usleep_range(1000, 2000); /* wait for the page switch to propagate */
137 bus->write(bus, 0x10 | r2, r1 + 1, hi);
138 bus->write(bus, 0x10 | r2, r1, lo);
140 mutex_unlock(&bus->mdio_lock);
144 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
145 u16 dbg_addr, u16 dbg_data)
147 struct mii_bus *bus = priv->phy->bus;
149 mutex_lock(&bus->mdio_lock);
150 bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
151 bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
152 mutex_unlock(&bus->mdio_lock);
156 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
160 lockdep_assert_held(&priv->reg_mutex);
162 v = priv->read(priv, reg);
165 priv->write(priv, reg, v);
171 ar8216_read_port_link(struct ar8216_priv *priv, int port,
172 struct switch_port_link *link)
177 memset(link, '\0', sizeof(*link));
179 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
181 link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
183 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
190 link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
191 link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
192 link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
194 speed = (status & AR8216_PORT_STATUS_SPEED) >>
195 AR8216_PORT_STATUS_SPEED_S;
198 case AR8216_PORT_SPEED_10M:
199 link->speed = SWITCH_PORT_SPEED_10;
201 case AR8216_PORT_SPEED_100M:
202 link->speed = SWITCH_PORT_SPEED_100;
204 case AR8216_PORT_SPEED_1000M:
205 link->speed = SWITCH_PORT_SPEED_1000;
208 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
214 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
215 struct switch_val *val)
217 struct ar8216_priv *priv = to_ar8216(dev);
218 priv->vlan = !!val->value.i;
223 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
224 struct switch_val *val)
226 struct ar8216_priv *priv = to_ar8216(dev);
227 val->value.i = priv->vlan;
233 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
235 struct ar8216_priv *priv = to_ar8216(dev);
237 /* make sure no invalid PVIDs get set */
239 if (vlan >= dev->vlans)
242 priv->pvid[port] = vlan;
247 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
249 struct ar8216_priv *priv = to_ar8216(dev);
250 *vlan = priv->pvid[port];
255 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
256 struct switch_val *val)
258 struct ar8216_priv *priv = to_ar8216(dev);
259 priv->vlan_id[val->port_vlan] = val->value.i;
264 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
265 struct switch_val *val)
267 struct ar8216_priv *priv = to_ar8216(dev);
268 val->value.i = priv->vlan_id[val->port_vlan];
273 ar8216_get_port_link(struct switch_dev *dev, int port,
274 struct switch_port_link *link)
276 struct ar8216_priv *priv = to_ar8216(dev);
278 ar8216_read_port_link(priv, port, link);
283 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
285 struct ar8216_priv *priv = dev->phy_ptr;
294 if (unlikely(skb_headroom(skb) < 2)) {
295 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
299 buf = skb_push(skb, 2);
304 return priv->ndo_old->ndo_start_xmit(skb, dev);
307 dev_kfree_skb_any(skb);
312 ar8216_mangle_rx(struct sk_buff *skb, int napi)
314 struct ar8216_priv *priv;
315 struct net_device *dev;
327 /* don't strip the header if vlan mode is disabled */
331 /* strip header, get vlan id */
335 /* check for vlan header presence */
336 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
341 /* no need to fix up packets coming from a tagged source */
342 if (priv->vlan_tagged & (1 << port))
345 /* lookup port vid from local table, the switch passes an invalid vlan id */
346 vlan = priv->vlan_id[priv->pvid[port]];
349 buf[14 + 2] |= vlan >> 8;
350 buf[15 + 2] = vlan & 0xff;
353 skb->protocol = eth_type_trans(skb, skb->dev);
356 return netif_receive_skb(skb);
358 return netif_rx(skb);
361 /* no vlan? eat the packet! */
362 dev_kfree_skb_any(skb);
367 ar8216_netif_rx(struct sk_buff *skb)
369 return ar8216_mangle_rx(skb, 0);
373 ar8216_netif_receive_skb(struct sk_buff *skb)
375 return ar8216_mangle_rx(skb, 1);
379 static struct switch_attr ar8216_globals[] = {
381 .type = SWITCH_TYPE_INT,
382 .name = "enable_vlan",
383 .description = "Enable VLAN mode",
384 .set = ar8216_set_vlan,
385 .get = ar8216_get_vlan,
390 static struct switch_attr ar8216_port[] = {
393 static struct switch_attr ar8216_vlan[] = {
395 .type = SWITCH_TYPE_INT,
397 .description = "VLAN ID (0-4094)",
398 .set = ar8216_set_vid,
399 .get = ar8216_get_vid,
406 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
408 struct ar8216_priv *priv = to_ar8216(dev);
409 u8 ports = priv->vlan_table[val->port_vlan];
413 for (i = 0; i < AR8216_NUM_PORTS; i++) {
414 struct switch_port *p;
416 if (!(ports & (1 << i)))
419 p = &val->value.ports[val->len++];
421 if (priv->vlan_tagged & (1 << i))
422 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
430 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
432 struct ar8216_priv *priv = to_ar8216(dev);
433 u8 *vt = &priv->vlan_table[val->port_vlan];
437 for (i = 0; i < val->len; i++) {
438 struct switch_port *p = &val->value.ports[i];
440 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
441 priv->vlan_tagged |= (1 << p->id);
443 priv->vlan_tagged &= ~(1 << p->id);
444 priv->pvid[p->id] = val->port_vlan;
446 /* make sure that an untagged port does not
447 * appear in other vlans */
448 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
449 if (j == val->port_vlan)
451 priv->vlan_table[j] &= ~(1 << p->id);
461 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
467 t = priv->read(priv, reg);
468 if ((t & mask) == val)
477 pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
478 (unsigned int) reg, t, mask, val);
483 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
485 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
487 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
488 val &= AR8216_VTUDATA_MEMBER;
489 val |= AR8216_VTUDATA_VALID;
490 priv->write(priv, AR8216_REG_VTU_DATA, val);
492 op |= AR8216_VTU_ACTIVE;
493 priv->write(priv, AR8216_REG_VTU, op);
497 ar8216_vtu_flush(struct ar8216_priv *priv)
499 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
503 ar8216_vtu_load_vlan(struct ar8216_priv *priv, u32 vid, u32 port_mask)
507 op = AR8216_VTU_OP_LOAD | (vid << AR8216_VTU_VID_S);
508 ar8216_vtu_op(priv, op, port_mask);
512 ar8216_atu_flush(struct ar8216_priv *priv)
516 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
518 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
524 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
525 u32 members, u32 pvid)
529 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip_type == AR8216)
530 header = AR8216_PORT_CTRL_HEADER;
534 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
535 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
536 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
537 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
538 AR8216_PORT_CTRL_LEARN | header |
539 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
540 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
542 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
543 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
544 AR8216_PORT_VLAN_DEFAULT_ID,
545 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
546 (ingress << AR8216_PORT_VLAN_MODE_S) |
547 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
551 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
552 u32 members, u32 pvid)
554 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
555 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
556 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
557 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
558 AR8216_PORT_CTRL_LEARN |
559 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
560 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
562 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
563 AR8236_PORT_VLAN_DEFAULT_ID,
564 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
566 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
567 AR8236_PORT_VLAN2_VLAN_MODE |
568 AR8236_PORT_VLAN2_MEMBER,
569 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
570 (members << AR8236_PORT_VLAN2_MEMBER_S));
574 ar8216_hw_apply(struct switch_dev *dev)
576 struct ar8216_priv *priv = to_ar8216(dev);
577 u8 portmask[AR8216_NUM_PORTS];
580 mutex_lock(&priv->reg_mutex);
581 /* flush all vlan translation unit entries */
582 priv->chip->vtu_flush(priv);
584 memset(portmask, 0, sizeof(portmask));
586 /* calculate the port destination masks and load vlans
587 * into the vlan translation unit */
588 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
589 u8 vp = priv->vlan_table[j];
594 for (i = 0; i < AR8216_NUM_PORTS; i++) {
597 portmask[i] |= vp & ~mask;
600 priv->chip->vtu_load_vlan(priv, priv->vlan_id[j],
601 priv->vlan_table[j]);
605 * isolate all ports, but connect them to the cpu port */
606 for (i = 0; i < AR8216_NUM_PORTS; i++) {
607 if (i == AR8216_PORT_CPU)
610 portmask[i] = 1 << AR8216_PORT_CPU;
611 portmask[AR8216_PORT_CPU] |= (1 << i);
615 /* update the port destination mask registers and tag settings */
616 for (i = 0; i < AR8216_NUM_PORTS; i++) {
621 pvid = priv->vlan_id[priv->pvid[i]];
622 if (priv->vlan_tagged & (1 << i))
623 egress = AR8216_OUT_ADD_VLAN;
625 egress = AR8216_OUT_STRIP_VLAN;
626 ingress = AR8216_IN_SECURE;
629 egress = AR8216_OUT_KEEP;
630 ingress = AR8216_IN_PORT_ONLY;
633 priv->chip->setup_port(priv, i, egress, ingress, portmask[i],
636 mutex_unlock(&priv->reg_mutex);
641 ar8216_hw_init(struct ar8216_priv *priv)
647 ar8236_hw_init(struct ar8216_priv *priv)
652 if (priv->initialized)
655 /* Initialize the PHYs */
656 bus = priv->phy->bus;
657 for (i = 0; i < 5; i++) {
658 mdiobus_write(bus, i, MII_ADVERTISE,
659 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
660 ADVERTISE_PAUSE_ASYM);
661 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
665 priv->initialized = true;
670 ar8316_hw_init(struct ar8216_priv *priv)
676 val = priv->read(priv, 0x8);
678 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
679 if (priv->port4_phy) {
680 /* value taken from Ubiquiti RouterStation Pro */
682 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
685 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
687 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
688 /* value taken from AVM Fritz!Box 7390 sources */
691 /* no known value for phy interface */
692 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
693 priv->phy->interface);
700 priv->write(priv, 0x8, newval);
702 /* Initialize the ports */
703 bus = priv->phy->bus;
704 for (i = 0; i < 5; i++) {
705 if ((i == 4) && priv->port4_phy &&
706 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
707 /* work around for phy4 rgmii mode */
708 ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
710 ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
712 ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
716 /* initialize the port itself */
717 mdiobus_write(bus, i, MII_ADVERTISE,
718 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
719 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
720 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
725 priv->initialized = true;
730 ar8216_init_globals(struct ar8216_priv *priv)
732 switch (priv->chip_type) {
734 /* standard atheros magic */
735 priv->write(priv, 0x38, 0xc000050e);
737 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
738 AR8216_GCTRL_MTU, 1518 + 8 + 2);
741 /* standard atheros magic */
742 priv->write(priv, 0x38, 0xc000050e);
744 /* enable cpu port to receive multicast and broadcast frames */
745 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
749 /* enable jumbo frames */
750 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
751 AR8316_GCTRL_MTU, 9018 + 8 + 2);
757 ar8216_init_port(struct ar8216_priv *priv, int port)
759 /* Enable port learning and tx */
760 priv->write(priv, AR8216_REG_PORT_CTRL(port),
761 AR8216_PORT_CTRL_LEARN |
762 (4 << AR8216_PORT_CTRL_STATE_S));
764 priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
766 if (port == AR8216_PORT_CPU) {
767 priv->write(priv, AR8216_REG_PORT_STATUS(port),
768 AR8216_PORT_STATUS_LINK_UP |
769 ar8xxx_has_gige(priv) ? AR8216_PORT_SPEED_1000M :
770 AR8216_PORT_SPEED_100M |
771 AR8216_PORT_STATUS_TXMAC |
772 AR8216_PORT_STATUS_RXMAC |
773 ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
774 ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
775 AR8216_PORT_STATUS_DUPLEX);
777 priv->write(priv, AR8216_REG_PORT_STATUS(port),
778 AR8216_PORT_STATUS_LINK_AUTO);
782 static const struct ar8xxx_chip ar8216_chip = {
783 .hw_init = ar8216_hw_init,
784 .init_port = ar8216_init_port,
785 .setup_port = ar8216_setup_port,
786 .atu_flush = ar8216_atu_flush,
787 .vtu_flush = ar8216_vtu_flush,
788 .vtu_load_vlan = ar8216_vtu_load_vlan,
791 static const struct ar8xxx_chip ar8236_chip = {
792 .hw_init = ar8236_hw_init,
793 .init_port = ar8216_init_port,
794 .setup_port = ar8236_setup_port,
795 .atu_flush = ar8216_atu_flush,
796 .vtu_flush = ar8216_vtu_flush,
797 .vtu_load_vlan = ar8216_vtu_load_vlan,
800 static const struct ar8xxx_chip ar8316_chip = {
801 .caps = AR8XXX_CAP_GIGE,
802 .hw_init = ar8316_hw_init,
803 .init_port = ar8216_init_port,
804 .setup_port = ar8216_setup_port,
805 .atu_flush = ar8216_atu_flush,
806 .vtu_flush = ar8216_vtu_flush,
807 .vtu_load_vlan = ar8216_vtu_load_vlan,
811 ar8216_reset_switch(struct switch_dev *dev)
813 struct ar8216_priv *priv = to_ar8216(dev);
816 mutex_lock(&priv->reg_mutex);
817 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
818 offsetof(struct ar8216_priv, vlan));
820 for (i = 0; i < AR8X16_MAX_VLANS; i++)
821 priv->vlan_id[i] = i;
823 /* Configure all ports */
824 for (i = 0; i < AR8216_NUM_PORTS; i++)
825 priv->chip->init_port(priv, i);
827 ar8216_init_globals(priv);
828 mutex_unlock(&priv->reg_mutex);
830 return ar8216_hw_apply(dev);
833 static const struct switch_dev_ops ar8216_sw_ops = {
835 .attr = ar8216_globals,
836 .n_attr = ARRAY_SIZE(ar8216_globals),
840 .n_attr = ARRAY_SIZE(ar8216_port),
844 .n_attr = ARRAY_SIZE(ar8216_vlan),
846 .get_port_pvid = ar8216_get_pvid,
847 .set_port_pvid = ar8216_set_pvid,
848 .get_vlan_ports = ar8216_get_ports,
849 .set_vlan_ports = ar8216_set_ports,
850 .apply_config = ar8216_hw_apply,
851 .reset_switch = ar8216_reset_switch,
852 .get_port_link = ar8216_get_port_link,
856 ar8216_id_chip(struct ar8216_priv *priv)
862 priv->chip_type = UNKNOWN;
864 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
868 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
869 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
872 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
876 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
883 priv->chip_type = AR8216;
884 priv->chip = &ar8216_chip;
887 priv->chip_type = AR8236;
888 priv->chip = &ar8236_chip;
892 priv->chip_type = AR8316;
893 priv->chip = &ar8316_chip;
897 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
898 (int)(id >> AR8216_CTRL_VERSION_S),
899 (int)(id & AR8216_CTRL_REVISION),
900 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
901 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
910 ar8216_config_init(struct phy_device *pdev)
912 struct ar8216_priv *priv = pdev->priv;
913 struct net_device *dev = pdev->attached_dev;
914 struct switch_dev *swdev;
918 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
925 ret = ar8216_id_chip(priv);
929 if (pdev->addr != 0) {
930 if (ar8xxx_has_gige(priv)) {
931 pdev->supported |= SUPPORTED_1000baseT_Full;
932 pdev->advertising |= ADVERTISED_1000baseT_Full;
935 if (priv->chip_type == AR8316) {
936 /* check if we're attaching to the switch twice */
937 pdev = pdev->bus->phy_map[0];
943 /* switch device has not been initialized, reuse priv */
945 priv->port4_phy = true;
952 /* switch device has been initialized, reinit */
954 priv->dev.ports = (AR8216_NUM_PORTS - 1);
955 priv->initialized = false;
956 priv->port4_phy = true;
957 ar8316_hw_init(priv);
965 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
966 pdev->attached_dev->name, priv->chip_type);
968 if (ar8xxx_has_gige(priv))
969 pdev->supported = SUPPORTED_1000baseT_Full;
971 pdev->supported = SUPPORTED_100baseT_Full;
972 pdev->advertising = pdev->supported;
974 mutex_init(&priv->reg_mutex);
975 priv->read = ar8216_mii_read;
976 priv->write = ar8216_mii_write;
981 swdev->cpu_port = AR8216_PORT_CPU;
982 swdev->ops = &ar8216_sw_ops;
983 swdev->ports = AR8216_NUM_PORTS;
985 if (priv->chip_type == AR8316) {
986 swdev->name = "Atheros AR8316";
987 swdev->vlans = AR8X16_MAX_VLANS;
989 if (priv->port4_phy) {
990 /* port 5 connected to the other mac, therefore unusable */
991 swdev->ports = (AR8216_NUM_PORTS - 1);
993 } else if (priv->chip_type == AR8236) {
994 swdev->name = "Atheros AR8236";
995 swdev->vlans = AR8216_NUM_VLANS;
996 swdev->ports = AR8216_NUM_PORTS;
998 swdev->name = "Atheros AR8216";
999 swdev->vlans = AR8216_NUM_VLANS;
1002 ret = register_switch(&priv->dev, pdev->attached_dev);
1008 ret = priv->chip->hw_init(priv);
1012 ret = ar8216_reset_switch(&priv->dev);
1016 dev->phy_ptr = priv;
1018 /* VID fixup only needed on ar8216 */
1019 if (pdev->addr == 0 && priv->chip_type == AR8216) {
1020 pdev->pkt_align = 2;
1021 pdev->netif_receive_skb = ar8216_netif_receive_skb;
1022 pdev->netif_rx = ar8216_netif_rx;
1023 priv->ndo_old = dev->netdev_ops;
1024 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
1025 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
1026 dev->netdev_ops = &priv->ndo;
1039 ar8216_read_status(struct phy_device *phydev)
1041 struct ar8216_priv *priv = phydev->priv;
1042 struct switch_port_link link;
1045 if (phydev->addr != 0)
1046 return genphy_read_status(phydev);
1048 ar8216_read_port_link(priv, phydev->addr, &link);
1049 phydev->link = !!link.link;
1053 switch (link.speed) {
1054 case SWITCH_PORT_SPEED_10:
1055 phydev->speed = SPEED_10;
1057 case SWITCH_PORT_SPEED_100:
1058 phydev->speed = SPEED_100;
1060 case SWITCH_PORT_SPEED_1000:
1061 phydev->speed = SPEED_1000;
1066 phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
1068 /* flush the address translation unit */
1069 mutex_lock(&priv->reg_mutex);
1070 ret = priv->chip->atu_flush(priv);
1071 mutex_unlock(&priv->reg_mutex);
1073 phydev->state = PHY_RUNNING;
1074 netif_carrier_on(phydev->attached_dev);
1075 phydev->adjust_link(phydev->attached_dev);
1081 ar8216_config_aneg(struct phy_device *phydev)
1083 if (phydev->addr == 0)
1086 return genphy_config_aneg(phydev);
1090 ar8216_probe(struct phy_device *pdev)
1092 struct ar8216_priv priv;
1095 return ar8216_id_chip(&priv);
1099 ar8216_remove(struct phy_device *pdev)
1101 struct ar8216_priv *priv = pdev->priv;
1102 struct net_device *dev = pdev->attached_dev;
1107 if (priv->ndo_old && dev)
1108 dev->netdev_ops = priv->ndo_old;
1109 if (pdev->addr == 0)
1110 unregister_switch(&priv->dev);
1114 static struct phy_driver ar8216_driver = {
1115 .phy_id = 0x004d0000,
1116 .name = "Atheros AR8216/AR8236/AR8316",
1117 .phy_id_mask = 0xffff0000,
1118 .features = PHY_BASIC_FEATURES,
1119 .probe = ar8216_probe,
1120 .remove = ar8216_remove,
1121 .config_init = &ar8216_config_init,
1122 .config_aneg = &ar8216_config_aneg,
1123 .read_status = &ar8216_read_status,
1124 .driver = { .owner = THIS_MODULE },
1130 return phy_driver_register(&ar8216_driver);
1136 phy_driver_unregister(&ar8216_driver);
1139 module_init(ar8216_init);
1140 module_exit(ar8216_exit);
1141 MODULE_LICENSE("GPL");