2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/lockdep.h>
35 /* size of the vlan table */
36 #define AR8X16_MAX_VLANS 128
37 #define AR8X16_PROBE_RETRIES 10
42 int (*hw_init)(struct ar8216_priv *priv);
46 struct switch_dev dev;
47 struct phy_device *phy;
48 u32 (*read)(struct ar8216_priv *priv, int reg);
49 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
50 const struct net_device_ops *ndo_old;
51 struct net_device_ops ndo;
52 struct mutex reg_mutex;
54 const struct ar8xxx_chip *chip;
61 /* all fields below are cleared on reset */
63 u16 vlan_id[AR8X16_MAX_VLANS];
64 u8 vlan_table[AR8X16_MAX_VLANS];
66 u16 pvid[AR8216_NUM_PORTS];
69 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
72 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
81 *page = regaddr & 0x1ff;
85 ar8216_mii_read(struct ar8216_priv *priv, int reg)
87 struct phy_device *phy = priv->phy;
88 struct mii_bus *bus = phy->bus;
92 split_addr((u32) reg, &r1, &r2, &page);
94 mutex_lock(&bus->mdio_lock);
96 bus->write(bus, 0x18, 0, page);
97 usleep_range(1000, 2000); /* wait for the page switch to propagate */
98 lo = bus->read(bus, 0x10 | r2, r1);
99 hi = bus->read(bus, 0x10 | r2, r1 + 1);
101 mutex_unlock(&bus->mdio_lock);
103 return (hi << 16) | lo;
107 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
109 struct phy_device *phy = priv->phy;
110 struct mii_bus *bus = phy->bus;
114 split_addr((u32) reg, &r1, &r2, &r3);
116 hi = (u16) (val >> 16);
118 mutex_lock(&bus->mdio_lock);
120 bus->write(bus, 0x18, 0, r3);
121 usleep_range(1000, 2000); /* wait for the page switch to propagate */
122 bus->write(bus, 0x10 | r2, r1 + 1, hi);
123 bus->write(bus, 0x10 | r2, r1, lo);
125 mutex_unlock(&bus->mdio_lock);
129 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
130 u16 dbg_addr, u16 dbg_data)
132 struct mii_bus *bus = priv->phy->bus;
134 mutex_lock(&bus->mdio_lock);
135 bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
136 bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
137 mutex_unlock(&bus->mdio_lock);
141 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
145 lockdep_assert_held(&priv->reg_mutex);
147 v = priv->read(priv, reg);
150 priv->write(priv, reg, v);
156 ar8216_read_port_link(struct ar8216_priv *priv, int port,
157 struct switch_port_link *link)
162 memset(link, '\0', sizeof(*link));
164 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
166 link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
168 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
175 link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
176 link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
177 link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
179 speed = (status & AR8216_PORT_STATUS_SPEED) >>
180 AR8216_PORT_STATUS_SPEED_S;
183 case AR8216_PORT_SPEED_10M:
184 link->speed = SWITCH_PORT_SPEED_10;
186 case AR8216_PORT_SPEED_100M:
187 link->speed = SWITCH_PORT_SPEED_100;
189 case AR8216_PORT_SPEED_1000M:
190 link->speed = SWITCH_PORT_SPEED_1000;
193 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
199 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
200 struct switch_val *val)
202 struct ar8216_priv *priv = to_ar8216(dev);
203 priv->vlan = !!val->value.i;
208 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
209 struct switch_val *val)
211 struct ar8216_priv *priv = to_ar8216(dev);
212 val->value.i = priv->vlan;
218 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
220 struct ar8216_priv *priv = to_ar8216(dev);
222 /* make sure no invalid PVIDs get set */
224 if (vlan >= dev->vlans)
227 priv->pvid[port] = vlan;
232 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
234 struct ar8216_priv *priv = to_ar8216(dev);
235 *vlan = priv->pvid[port];
240 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
241 struct switch_val *val)
243 struct ar8216_priv *priv = to_ar8216(dev);
244 priv->vlan_id[val->port_vlan] = val->value.i;
249 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
250 struct switch_val *val)
252 struct ar8216_priv *priv = to_ar8216(dev);
253 val->value.i = priv->vlan_id[val->port_vlan];
258 ar8216_get_port_link(struct switch_dev *dev, int port,
259 struct switch_port_link *link)
261 struct ar8216_priv *priv = to_ar8216(dev);
263 ar8216_read_port_link(priv, port, link);
268 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
270 struct ar8216_priv *priv = dev->phy_ptr;
279 if (unlikely(skb_headroom(skb) < 2)) {
280 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
284 buf = skb_push(skb, 2);
289 return priv->ndo_old->ndo_start_xmit(skb, dev);
292 dev_kfree_skb_any(skb);
297 ar8216_mangle_rx(struct sk_buff *skb, int napi)
299 struct ar8216_priv *priv;
300 struct net_device *dev;
312 /* don't strip the header if vlan mode is disabled */
316 /* strip header, get vlan id */
320 /* check for vlan header presence */
321 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
326 /* no need to fix up packets coming from a tagged source */
327 if (priv->vlan_tagged & (1 << port))
330 /* lookup port vid from local table, the switch passes an invalid vlan id */
331 vlan = priv->vlan_id[priv->pvid[port]];
334 buf[14 + 2] |= vlan >> 8;
335 buf[15 + 2] = vlan & 0xff;
338 skb->protocol = eth_type_trans(skb, skb->dev);
341 return netif_receive_skb(skb);
343 return netif_rx(skb);
346 /* no vlan? eat the packet! */
347 dev_kfree_skb_any(skb);
352 ar8216_netif_rx(struct sk_buff *skb)
354 return ar8216_mangle_rx(skb, 0);
358 ar8216_netif_receive_skb(struct sk_buff *skb)
360 return ar8216_mangle_rx(skb, 1);
364 static struct switch_attr ar8216_globals[] = {
366 .type = SWITCH_TYPE_INT,
367 .name = "enable_vlan",
368 .description = "Enable VLAN mode",
369 .set = ar8216_set_vlan,
370 .get = ar8216_get_vlan,
375 static struct switch_attr ar8216_port[] = {
378 static struct switch_attr ar8216_vlan[] = {
380 .type = SWITCH_TYPE_INT,
382 .description = "VLAN ID (0-4094)",
383 .set = ar8216_set_vid,
384 .get = ar8216_get_vid,
391 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
393 struct ar8216_priv *priv = to_ar8216(dev);
394 u8 ports = priv->vlan_table[val->port_vlan];
398 for (i = 0; i < AR8216_NUM_PORTS; i++) {
399 struct switch_port *p;
401 if (!(ports & (1 << i)))
404 p = &val->value.ports[val->len++];
406 if (priv->vlan_tagged & (1 << i))
407 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
415 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
417 struct ar8216_priv *priv = to_ar8216(dev);
418 u8 *vt = &priv->vlan_table[val->port_vlan];
422 for (i = 0; i < val->len; i++) {
423 struct switch_port *p = &val->value.ports[i];
425 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
426 priv->vlan_tagged |= (1 << p->id);
428 priv->vlan_tagged &= ~(1 << p->id);
429 priv->pvid[p->id] = val->port_vlan;
431 /* make sure that an untagged port does not
432 * appear in other vlans */
433 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
434 if (j == val->port_vlan)
436 priv->vlan_table[j] &= ~(1 << p->id);
446 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
452 t = priv->read(priv, reg);
453 if ((t & mask) == val)
462 pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
463 (unsigned int) reg, t, mask, val);
468 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
470 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
472 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
473 val &= AR8216_VTUDATA_MEMBER;
474 val |= AR8216_VTUDATA_VALID;
475 priv->write(priv, AR8216_REG_VTU_DATA, val);
477 op |= AR8216_VTU_ACTIVE;
478 priv->write(priv, AR8216_REG_VTU, op);
482 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
483 u32 members, u32 pvid)
487 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip_type == AR8216)
488 header = AR8216_PORT_CTRL_HEADER;
492 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
493 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
494 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
495 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
496 AR8216_PORT_CTRL_LEARN | header |
497 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
498 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
500 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
501 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
502 AR8216_PORT_VLAN_DEFAULT_ID,
503 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
504 (ingress << AR8216_PORT_VLAN_MODE_S) |
505 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
509 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
510 u32 members, u32 pvid)
512 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
513 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
514 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
515 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
516 AR8216_PORT_CTRL_LEARN |
517 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
518 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
520 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
521 AR8236_PORT_VLAN_DEFAULT_ID,
522 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
524 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
525 AR8236_PORT_VLAN2_VLAN_MODE |
526 AR8236_PORT_VLAN2_MEMBER,
527 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
528 (members << AR8236_PORT_VLAN2_MEMBER_S));
532 ar8216_hw_apply(struct switch_dev *dev)
534 struct ar8216_priv *priv = to_ar8216(dev);
535 u8 portmask[AR8216_NUM_PORTS];
538 mutex_lock(&priv->reg_mutex);
539 /* flush all vlan translation unit entries */
540 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
542 memset(portmask, 0, sizeof(portmask));
544 /* calculate the port destination masks and load vlans
545 * into the vlan translation unit */
546 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
547 u8 vp = priv->vlan_table[j];
552 for (i = 0; i < AR8216_NUM_PORTS; i++) {
555 portmask[i] |= vp & ~mask;
560 (priv->vlan_id[j] << AR8216_VTU_VID_S),
561 priv->vlan_table[j]);
565 * isolate all ports, but connect them to the cpu port */
566 for (i = 0; i < AR8216_NUM_PORTS; i++) {
567 if (i == AR8216_PORT_CPU)
570 portmask[i] = 1 << AR8216_PORT_CPU;
571 portmask[AR8216_PORT_CPU] |= (1 << i);
575 /* update the port destination mask registers and tag settings */
576 for (i = 0; i < AR8216_NUM_PORTS; i++) {
581 pvid = priv->vlan_id[priv->pvid[i]];
582 if (priv->vlan_tagged & (1 << i))
583 egress = AR8216_OUT_ADD_VLAN;
585 egress = AR8216_OUT_STRIP_VLAN;
586 ingress = AR8216_IN_SECURE;
589 egress = AR8216_OUT_KEEP;
590 ingress = AR8216_IN_PORT_ONLY;
593 if (priv->chip_type == AR8236)
594 ar8236_setup_port(priv, i, egress, ingress, portmask[i],
597 ar8216_setup_port(priv, i, egress, ingress, portmask[i],
600 mutex_unlock(&priv->reg_mutex);
605 ar8216_hw_init(struct ar8216_priv *priv)
611 ar8236_hw_init(struct ar8216_priv *priv)
616 if (priv->initialized)
619 /* Initialize the PHYs */
620 bus = priv->phy->bus;
621 for (i = 0; i < 5; i++) {
622 mdiobus_write(bus, i, MII_ADVERTISE,
623 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
624 ADVERTISE_PAUSE_ASYM);
625 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
629 priv->initialized = true;
634 ar8316_hw_init(struct ar8216_priv *priv)
640 val = priv->read(priv, 0x8);
642 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
643 if (priv->port4_phy) {
644 /* value taken from Ubiquiti RouterStation Pro */
646 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
649 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
651 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
652 /* value taken from AVM Fritz!Box 7390 sources */
655 /* no known value for phy interface */
656 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
657 priv->phy->interface);
664 priv->write(priv, 0x8, newval);
666 /* Initialize the ports */
667 bus = priv->phy->bus;
668 for (i = 0; i < 5; i++) {
669 if ((i == 4) && priv->port4_phy &&
670 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
671 /* work around for phy4 rgmii mode */
672 ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
674 ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
676 ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
680 /* initialize the port itself */
681 mdiobus_write(bus, i, MII_ADVERTISE,
682 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
683 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
684 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
689 priv->initialized = true;
694 ar8216_init_globals(struct ar8216_priv *priv)
696 switch (priv->chip_type) {
698 /* standard atheros magic */
699 priv->write(priv, 0x38, 0xc000050e);
701 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
702 AR8216_GCTRL_MTU, 1518 + 8 + 2);
705 /* standard atheros magic */
706 priv->write(priv, 0x38, 0xc000050e);
708 /* enable cpu port to receive multicast and broadcast frames */
709 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
713 /* enable jumbo frames */
714 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
715 AR8316_GCTRL_MTU, 9018 + 8 + 2);
721 ar8216_init_port(struct ar8216_priv *priv, int port)
723 /* Enable port learning and tx */
724 priv->write(priv, AR8216_REG_PORT_CTRL(port),
725 AR8216_PORT_CTRL_LEARN |
726 (4 << AR8216_PORT_CTRL_STATE_S));
728 priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
730 if (port == AR8216_PORT_CPU) {
731 priv->write(priv, AR8216_REG_PORT_STATUS(port),
732 AR8216_PORT_STATUS_LINK_UP |
733 ((priv->chip_type == AR8316) ?
734 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
735 AR8216_PORT_STATUS_TXMAC |
736 AR8216_PORT_STATUS_RXMAC |
737 ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
738 ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
739 AR8216_PORT_STATUS_DUPLEX);
741 priv->write(priv, AR8216_REG_PORT_STATUS(port),
742 AR8216_PORT_STATUS_LINK_AUTO);
746 static const struct ar8xxx_chip ar8216_chip = {
747 .hw_init = ar8216_hw_init,
750 static const struct ar8xxx_chip ar8236_chip = {
751 .hw_init = ar8236_hw_init,
754 static const struct ar8xxx_chip ar8316_chip = {
755 .hw_init = ar8316_hw_init,
759 ar8216_reset_switch(struct switch_dev *dev)
761 struct ar8216_priv *priv = to_ar8216(dev);
764 mutex_lock(&priv->reg_mutex);
765 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
766 offsetof(struct ar8216_priv, vlan));
768 for (i = 0; i < AR8X16_MAX_VLANS; i++)
769 priv->vlan_id[i] = i;
771 /* Configure all ports */
772 for (i = 0; i < AR8216_NUM_PORTS; i++)
773 ar8216_init_port(priv, i);
775 ar8216_init_globals(priv);
776 mutex_unlock(&priv->reg_mutex);
778 return ar8216_hw_apply(dev);
781 static const struct switch_dev_ops ar8216_sw_ops = {
783 .attr = ar8216_globals,
784 .n_attr = ARRAY_SIZE(ar8216_globals),
788 .n_attr = ARRAY_SIZE(ar8216_port),
792 .n_attr = ARRAY_SIZE(ar8216_vlan),
794 .get_port_pvid = ar8216_get_pvid,
795 .set_port_pvid = ar8216_set_pvid,
796 .get_vlan_ports = ar8216_get_ports,
797 .set_vlan_ports = ar8216_set_ports,
798 .apply_config = ar8216_hw_apply,
799 .reset_switch = ar8216_reset_switch,
800 .get_port_link = ar8216_get_port_link,
804 ar8216_id_chip(struct ar8216_priv *priv)
810 priv->chip_type = UNKNOWN;
812 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
816 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
817 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
820 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
824 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
831 priv->chip_type = AR8216;
832 priv->chip = &ar8216_chip;
835 priv->chip_type = AR8236;
836 priv->chip = &ar8236_chip;
840 priv->chip_type = AR8316;
841 priv->chip = &ar8316_chip;
845 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
846 (int)(id >> AR8216_CTRL_VERSION_S),
847 (int)(id & AR8216_CTRL_REVISION),
848 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
849 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
858 ar8216_config_init(struct phy_device *pdev)
860 struct ar8216_priv *priv = pdev->priv;
861 struct net_device *dev = pdev->attached_dev;
862 struct switch_dev *swdev;
866 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
873 ret = ar8216_id_chip(priv);
877 if (pdev->addr != 0) {
878 if (priv->chip_type == AR8316) {
879 pdev->supported |= SUPPORTED_1000baseT_Full;
880 pdev->advertising |= ADVERTISED_1000baseT_Full;
882 /* check if we're attaching to the switch twice */
883 pdev = pdev->bus->phy_map[0];
889 /* switch device has not been initialized, reuse priv */
891 priv->port4_phy = true;
898 /* switch device has been initialized, reinit */
900 priv->dev.ports = (AR8216_NUM_PORTS - 1);
901 priv->initialized = false;
902 priv->port4_phy = true;
903 ar8316_hw_init(priv);
911 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
912 pdev->attached_dev->name, priv->chip_type);
914 pdev->supported = priv->chip_type == AR8316 ?
915 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
916 pdev->advertising = pdev->supported;
918 mutex_init(&priv->reg_mutex);
919 priv->read = ar8216_mii_read;
920 priv->write = ar8216_mii_write;
925 swdev->cpu_port = AR8216_PORT_CPU;
926 swdev->ops = &ar8216_sw_ops;
927 swdev->ports = AR8216_NUM_PORTS;
929 if (priv->chip_type == AR8316) {
930 swdev->name = "Atheros AR8316";
931 swdev->vlans = AR8X16_MAX_VLANS;
933 if (priv->port4_phy) {
934 /* port 5 connected to the other mac, therefore unusable */
935 swdev->ports = (AR8216_NUM_PORTS - 1);
937 } else if (priv->chip_type == AR8236) {
938 swdev->name = "Atheros AR8236";
939 swdev->vlans = AR8216_NUM_VLANS;
940 swdev->ports = AR8216_NUM_PORTS;
942 swdev->name = "Atheros AR8216";
943 swdev->vlans = AR8216_NUM_VLANS;
946 ret = register_switch(&priv->dev, pdev->attached_dev);
952 ret = priv->chip->hw_init(priv);
956 ret = ar8216_reset_switch(&priv->dev);
962 /* VID fixup only needed on ar8216 */
963 if (pdev->addr == 0 && priv->chip_type == AR8216) {
965 pdev->netif_receive_skb = ar8216_netif_receive_skb;
966 pdev->netif_rx = ar8216_netif_rx;
967 priv->ndo_old = dev->netdev_ops;
968 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
969 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
970 dev->netdev_ops = &priv->ndo;
983 ar8216_read_status(struct phy_device *phydev)
985 struct ar8216_priv *priv = phydev->priv;
986 struct switch_port_link link;
989 if (phydev->addr != 0)
990 return genphy_read_status(phydev);
992 ar8216_read_port_link(priv, phydev->addr, &link);
993 phydev->link = !!link.link;
997 switch (link.speed) {
998 case SWITCH_PORT_SPEED_10:
999 phydev->speed = SPEED_10;
1001 case SWITCH_PORT_SPEED_100:
1002 phydev->speed = SPEED_100;
1004 case SWITCH_PORT_SPEED_1000:
1005 phydev->speed = SPEED_1000;
1010 phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
1012 /* flush the address translation unit */
1013 mutex_lock(&priv->reg_mutex);
1014 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
1016 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
1017 mutex_unlock(&priv->reg_mutex);
1019 phydev->state = PHY_RUNNING;
1020 netif_carrier_on(phydev->attached_dev);
1021 phydev->adjust_link(phydev->attached_dev);
1027 ar8216_config_aneg(struct phy_device *phydev)
1029 if (phydev->addr == 0)
1032 return genphy_config_aneg(phydev);
1036 ar8216_probe(struct phy_device *pdev)
1038 struct ar8216_priv priv;
1041 return ar8216_id_chip(&priv);
1045 ar8216_remove(struct phy_device *pdev)
1047 struct ar8216_priv *priv = pdev->priv;
1048 struct net_device *dev = pdev->attached_dev;
1053 if (priv->ndo_old && dev)
1054 dev->netdev_ops = priv->ndo_old;
1055 if (pdev->addr == 0)
1056 unregister_switch(&priv->dev);
1060 static struct phy_driver ar8216_driver = {
1061 .phy_id = 0x004d0000,
1062 .name = "Atheros AR8216/AR8236/AR8316",
1063 .phy_id_mask = 0xffff0000,
1064 .features = PHY_BASIC_FEATURES,
1065 .probe = ar8216_probe,
1066 .remove = ar8216_remove,
1067 .config_init = &ar8216_config_init,
1068 .config_aneg = &ar8216_config_aneg,
1069 .read_status = &ar8216_read_status,
1070 .driver = { .owner = THIS_MODULE },
1076 return phy_driver_register(&ar8216_driver);
1082 phy_driver_unregister(&ar8216_driver);
1085 module_init(ar8216_init);
1086 module_exit(ar8216_exit);
1087 MODULE_LICENSE("GPL");