1 --- a/arch/arm/mach-cns3xxx/Makefile
2 +++ b/arch/arm/mach-cns3xxx/Makefile
4 -obj-$(CONFIG_ARCH_CNS3XXX) += core.o pm.o devices.o
5 +obj-$(CONFIG_ARCH_CNS3XXX) += core.o gpio.o pm.o devices.o
6 obj-$(CONFIG_PCI) += pcie.o
7 obj-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o
8 obj-$(CONFIG_MACH_GW2388) += laguna.o
9 --- a/arch/arm/mach-cns3xxx/cns3420vb.c
10 +++ b/arch/arm/mach-cns3xxx/cns3420vb.c
11 @@ -198,6 +198,10 @@ static void __init cns3420_init(void)
15 + cns3xxx_gpio_init( 0, 32, CNS3XXX_GPIOA_BASE_VIRT, IRQ_CNS3XXX_GPIOA,
17 + cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT, IRQ_CNS3XXX_GPIOB,
18 + NR_IRQS_CNS3XXX + 32);
20 pm_power_off = cns3xxx_power_off;
22 --- a/arch/arm/mach-cns3xxx/core.c
23 +++ b/arch/arm/mach-cns3xxx/core.c
25 #include <asm/hardware/gic.h>
26 #include <asm/smp_twd.h>
27 #include <asm/hardware/cache-l2x0.h>
28 -#include <asm/gpio.h>
29 #include <mach/cns3xxx.h>
32 @@ -83,73 +82,12 @@ static struct map_desc cns3xxx_io_desc[]
36 -static inline void gpio_line_config(u8 line, u32 direction)
41 - reg = __raw_readl(CNS3XXX_GPIOA_BASE_VIRT + CNS3XXX_GPIO_DIR);
43 - __raw_writel(reg, CNS3XXX_GPIOA_BASE_VIRT + CNS3XXX_GPIO_DIR);
45 - reg = __raw_readl(CNS3XXX_GPIOB_BASE_VIRT + CNS3XXX_GPIO_DIR);
46 - reg |= (1 << (line - 32));
47 - __raw_writel(reg, CNS3XXX_GPIOB_BASE_VIRT + CNS3XXX_GPIO_DIR);
51 - reg = __raw_readl(CNS3XXX_GPIOA_BASE_VIRT + CNS3XXX_GPIO_DIR);
52 - reg &= ~(1 << line);
53 - __raw_writel(reg, CNS3XXX_GPIOA_BASE_VIRT + CNS3XXX_GPIO_DIR);
55 - reg = __raw_readl(CNS3XXX_GPIOB_BASE_VIRT + CNS3XXX_GPIO_DIR);
56 - reg &= ~(1 << (line - 32));
57 - __raw_writel(reg, CNS3XXX_GPIOB_BASE_VIRT + CNS3XXX_GPIO_DIR);
62 -static int cns3xxx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
64 - gpio_line_config(gpio, CNS3XXX_GPIO_IN);
68 -static int cns3xxx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
70 - gpio_line_set(gpio, level);
71 - gpio_line_config(gpio, CNS3XXX_GPIO_OUT);
75 -static int cns3xxx_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
77 - return gpio_get_value(gpio);
80 -static void cns3xxx_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
82 - gpio_set_value(gpio, value);
85 -static struct gpio_chip cns3xxx_gpio_chip = {
86 - .label = "CNS3XXX_GPIO_CHIP",
87 - .direction_input = cns3xxx_gpio_direction_input,
88 - .direction_output = cns3xxx_gpio_direction_output,
89 - .get = cns3xxx_gpio_get_value,
90 - .set = cns3xxx_gpio_set_value,
95 void __init cns3xxx_common_init(void)
97 #ifdef CONFIG_LOCAL_TIMERS
98 twd_base = (void __iomem *) CNS3XXX_TC11MP_TWD_BASE_VIRT;
100 iotable_init(cns3xxx_io_desc, ARRAY_SIZE(cns3xxx_io_desc));
102 - gpiochip_add(&cns3xxx_gpio_chip);
105 /* used by entry-macro.S */
106 --- a/arch/arm/Kconfig
107 +++ b/arch/arm/Kconfig
108 @@ -366,7 +366,8 @@ config ARCH_CLPS711X
110 bool "Cavium Networks CNS3XXX family"
112 - select ARCH_WANT_OPTIONAL_GPIOLIB
113 + select ARCH_REQUIRE_GPIOLIB
114 + select GENERIC_IRQ_CHIP
115 select GENERIC_CLOCKEVENTS
118 --- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
119 +++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
120 @@ -627,7 +627,7 @@ int cns3xxx_cpu_clock(void);
122 #if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_CNS3XXX)
124 -#define NR_IRQS NR_IRQS_CNS3XXX
125 +#define NR_IRQS (NR_IRQS_CNS3XXX + 64)
128 #endif /* __MACH_BOARD_CNS3XXX_H */