2 * Gateworks Corporation Laguna Platform
4 * Copyright 2000 Deep Blue Solutions Ltd
5 * Copyright 2008 ARM Limited
6 * Copyright 2008 Cavium Networks
8 * Copyright 2010 MontaVista Software, LLC.
9 * Anton Vorontsov <avorontsov@mvista.com>
10 * Copyright 2011 Gateworks Corporation
11 * Chris Lang <clang@gateworks.com>
12 * Copyright 2012 Gateworks Corporation
13 * Tim Harvey <tharvey@gateworks.com>
15 * This file is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License, Version 2, as
17 * published by the Free Software Foundation.
20 #include <linux/init.h>
21 #include <linux/kernel.h>
22 #include <linux/compiler.h>
24 #include <linux/gpio.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/serial_core.h>
27 #include <linux/serial_8250.h>
28 #include <linux/platform_device.h>
29 #include <linux/mtd/mtd.h>
30 #include <linux/mtd/physmap.h>
31 #include <linux/mtd/partitions.h>
32 #include <linux/leds.h>
33 #include <linux/i2c.h>
34 #include <linux/i2c/at24.h>
35 #include <linux/i2c/pca953x.h>
36 #include <linux/spi/spi.h>
37 #include <linux/spi/flash.h>
38 #include <linux/if_ether.h>
39 #include <linux/pps-gpio.h>
40 #include <asm/setup.h>
41 #include <asm/mach-types.h>
42 #include <asm/mach/arch.h>
43 #include <asm/mach/map.h>
44 #include <asm/mach/time.h>
45 #include <mach/cns3xxx.h>
46 #include <mach/irqs.h>
47 #include <mach/platform.h>
49 #include <mach/gpio.h>
50 #include <asm/hardware/gic.h>
54 #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
57 #define ETH0_LOAD BIT(0)
58 #define ETH1_LOAD BIT(1)
59 #define ETH2_LOAD BIT(2)
60 #define SATA0_LOAD BIT(3)
61 #define SATA1_LOAD BIT(4)
62 #define PCM_LOAD BIT(5)
63 #define I2S_LOAD BIT(6)
64 #define SPI0_LOAD BIT(7)
65 #define SPI1_LOAD BIT(8)
66 #define PCIE0_LOAD BIT(9)
67 #define PCIE1_LOAD BIT(10)
68 #define USB0_LOAD BIT(11)
69 #define USB1_LOAD BIT(12)
70 #define USB1_ROUTE BIT(13)
71 #define SD_LOAD BIT(14)
72 #define UART0_LOAD BIT(15)
73 #define UART1_LOAD BIT(16)
74 #define UART2_LOAD BIT(17)
75 #define MPCI0_LOAD BIT(18)
76 #define MPCI1_LOAD BIT(19)
77 #define MPCI2_LOAD BIT(20)
78 #define MPCI3_LOAD BIT(21)
79 #define FP_BUT_LOAD BIT(22)
80 #define FP_BUT_HEADER_LOAD BIT(23)
81 #define FP_LED_LOAD BIT(24)
82 #define FP_LED_HEADER_LOAD BIT(25)
83 #define FP_TAMPER_LOAD BIT(26)
84 #define HEADER_33V_LOAD BIT(27)
85 #define SATA_POWER_LOAD BIT(28)
86 #define FP_POWER_LOAD BIT(29)
87 #define GPIO_HEADER_LOAD BIT(30)
88 #define GSP_BAT_LOAD BIT(31)
91 #define FAN_LOAD BIT(0)
92 #define SPI_FLASH_LOAD BIT(1)
93 #define NOR_FLASH_LOAD BIT(2)
94 #define GPS_LOAD BIT(3)
95 #define SUPPLY_5V_LOAD BIT(6)
96 #define SUPPLY_33V_LOAD BIT(7)
98 struct laguna_board_info {
106 static struct laguna_board_info laguna_info __initdata;
111 static struct mtd_partition laguna_nor_partitions[] = {
116 .mask_flags = MTD_WRITEABLE,
124 .offset = SZ_256K + SZ_128K,
127 .size = SZ_16M - SZ_256K - SZ_128K - SZ_2M,
128 .offset = SZ_256K + SZ_128K + SZ_2M,
132 static struct physmap_flash_data laguna_nor_pdata = {
134 .parts = laguna_nor_partitions,
135 .nr_parts = ARRAY_SIZE(laguna_nor_partitions),
138 static struct resource laguna_nor_res = {
139 .start = CNS3XXX_FLASH_BASE,
140 .end = CNS3XXX_FLASH_BASE + SZ_128M - 1,
141 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
144 static struct platform_device laguna_nor_pdev = {
145 .name = "physmap-flash",
147 .resource = &laguna_nor_res,
150 .platform_data = &laguna_nor_pdata,
157 static struct mtd_partition laguna_spi_partitions[] = {
162 .mask_flags = MTD_WRITEABLE,
169 .size = SZ_1M + SZ_512K,
173 .size = SZ_16M - SZ_2M,
178 static struct flash_platform_data laguna_spi_pdata = {
179 .parts = laguna_spi_partitions,
180 .nr_parts = ARRAY_SIZE(laguna_spi_partitions),
183 static struct spi_board_info __initdata laguna_spi_devices[] = {
185 .modalias = "m25p80",
186 .platform_data = &laguna_spi_pdata,
187 .max_speed_hz = 50000000,
193 static struct platform_device laguna_spi_controller = {
194 .name = "cns3xxx_spi",
200 static struct gpio_led laguna_gpio_leds[] = {
202 .name = "user1", /* Green Led */
206 .name = "user2", /* Red Led */
210 .name = "pwr1", /* Green Led */
214 .name = "pwr2", /* Yellow Led */
218 .name = "txd1", /* Green Led */
222 .name = "txd2", /* Yellow Led */
226 .name = "rxd1", /* Green Led */
230 .name = "rxd2", /* Yellow Led */
234 .name = "ser1", /* Green Led */
238 .name = "ser2", /* Yellow Led */
242 .name = "enet1", /* Green Led */
246 .name = "enet2", /* Yellow Led */
250 .name = "sig1_1", /* Green Led */
254 .name = "sig1_2", /* Yellow Led */
258 .name = "sig2_1", /* Green Led */
262 .name = "sig2_2", /* Yellow Led */
266 .name = "sig3_1", /* Green Led */
270 .name = "sig3_2", /* Yellow Led */
274 .name = "net1", /*Green Led */
278 .name = "net2", /* Red Led */
282 .name = "mod1", /* Green Led */
286 .name = "mod2", /* Red Led */
292 static struct gpio_led_platform_data laguna_gpio_leds_data = {
294 .leds = laguna_gpio_leds,
297 static struct platform_device laguna_gpio_leds_device = {
300 .dev.platform_data = &laguna_gpio_leds_data,
306 static struct cns3xxx_plat_info laguna_net_data = {
315 static struct platform_device laguna_net_device = {
316 .name = "cns3xxx_eth",
318 .dev.platform_data = &laguna_net_data,
324 static void __init laguna_early_serial_setup(void)
326 #ifdef CONFIG_SERIAL_8250_CONSOLE
327 static struct uart_port laguna_serial_port = {
328 .membase = (void __iomem *)CNS3XXX_UART0_BASE_VIRT,
329 .mapbase = CNS3XXX_UART0_BASE,
330 .irq = IRQ_CNS3XXX_UART0,
332 .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
340 early_serial_setup(&laguna_serial_port);
344 static struct resource laguna_uart_resources[] = {
346 .start = CNS3XXX_UART0_BASE,
347 .end = CNS3XXX_UART0_BASE + SZ_4K - 1,
348 .flags = IORESOURCE_MEM
350 .start = CNS3XXX_UART2_BASE,
351 .end = CNS3XXX_UART2_BASE + SZ_4K - 1,
352 .flags = IORESOURCE_MEM
354 .start = CNS3XXX_UART2_BASE,
355 .end = CNS3XXX_UART2_BASE + SZ_4K - 1,
356 .flags = IORESOURCE_MEM
360 static struct plat_serial8250_port laguna_uart_data[] = {
362 .membase = (char*) (CNS3XXX_UART0_BASE_VIRT),
363 .mapbase = (CNS3XXX_UART0_BASE),
364 .irq = IRQ_CNS3XXX_UART0,
366 .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE | UPF_NO_TXEN_TEST,
371 .membase = (char*) (CNS3XXX_UART1_BASE_VIRT),
372 .mapbase = (CNS3XXX_UART1_BASE),
373 .irq = IRQ_CNS3XXX_UART1,
375 .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE | UPF_NO_TXEN_TEST,
380 .membase = (char*) (CNS3XXX_UART2_BASE_VIRT),
381 .mapbase = (CNS3XXX_UART2_BASE),
382 .irq = IRQ_CNS3XXX_UART2,
384 .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE | UPF_NO_TXEN_TEST,
392 static struct platform_device laguna_uart = {
393 .name = "serial8250",
394 .id = PLAT8250_DEV_PLATFORM,
395 .dev.platform_data = laguna_uart_data,
397 .resource = laguna_uart_resources
403 static struct resource cns3xxx_usb_ehci_resources[] = {
405 .start = CNS3XXX_USB_BASE,
406 .end = CNS3XXX_USB_BASE + SZ_16M - 1,
407 .flags = IORESOURCE_MEM,
410 .start = IRQ_CNS3XXX_USB_EHCI,
411 .flags = IORESOURCE_IRQ,
415 static u64 cns3xxx_usb_ehci_dma_mask = DMA_BIT_MASK(32);
417 static struct platform_device cns3xxx_usb_ehci_device = {
418 .name = "cns3xxx-ehci",
419 .num_resources = ARRAY_SIZE(cns3xxx_usb_ehci_resources),
420 .resource = cns3xxx_usb_ehci_resources,
422 .dma_mask = &cns3xxx_usb_ehci_dma_mask,
423 .coherent_dma_mask = DMA_BIT_MASK(32),
427 static struct resource cns3xxx_usb_ohci_resources[] = {
429 .start = CNS3XXX_USB_OHCI_BASE,
430 .end = CNS3XXX_USB_OHCI_BASE + SZ_16M - 1,
431 .flags = IORESOURCE_MEM,
434 .start = IRQ_CNS3XXX_USB_OHCI,
435 .flags = IORESOURCE_IRQ,
439 static u64 cns3xxx_usb_ohci_dma_mask = DMA_BIT_MASK(32);
441 static struct platform_device cns3xxx_usb_ohci_device = {
442 .name = "cns3xxx-ohci",
443 .num_resources = ARRAY_SIZE(cns3xxx_usb_ohci_resources),
444 .resource = cns3xxx_usb_ohci_resources,
446 .dma_mask = &cns3xxx_usb_ohci_dma_mask,
447 .coherent_dma_mask = DMA_BIT_MASK(32),
451 static struct resource cns3xxx_usb_otg_resources[] = {
453 .start = CNS3XXX_USBOTG_BASE,
454 .end = CNS3XXX_USBOTG_BASE + SZ_16M - 1,
455 .flags = IORESOURCE_MEM,
458 .start = IRQ_CNS3XXX_USB_OTG,
459 .flags = IORESOURCE_IRQ,
463 static u64 cns3xxx_usb_otg_dma_mask = DMA_BIT_MASK(32);
465 static struct platform_device cns3xxx_usb_otg_device = {
467 .num_resources = ARRAY_SIZE(cns3xxx_usb_otg_resources),
468 .resource = cns3xxx_usb_otg_resources,
470 .dma_mask = &cns3xxx_usb_otg_dma_mask,
471 .coherent_dma_mask = DMA_BIT_MASK(32),
478 static struct resource laguna_i2c_resource[] = {
480 .start = CNS3XXX_SSP_BASE + 0x20,
482 .flags = IORESOURCE_MEM,
484 .start = IRQ_CNS3XXX_I2C,
485 .flags = IORESOURCE_IRQ,
489 static struct platform_device laguna_i2c_controller = {
490 .name = "cns3xxx-i2c",
492 .resource = laguna_i2c_resource,
495 static struct memory_accessor *at24_mem_acc;
497 static void at24_setup(struct memory_accessor *mem_acc, void *context)
501 at24_mem_acc = mem_acc;
503 /* Read MAC addresses */
504 if (at24_mem_acc->read(at24_mem_acc, buf, 0x100, 6) == 6)
505 memcpy(&laguna_net_data.hwaddr[0], buf, ETH_ALEN);
506 if (at24_mem_acc->read(at24_mem_acc, buf, 0x106, 6) == 6)
507 memcpy(&laguna_net_data.hwaddr[1], buf, ETH_ALEN);
508 if (at24_mem_acc->read(at24_mem_acc, buf, 0x10C, 6) == 6)
509 memcpy(&laguna_net_data.hwaddr[2], buf, ETH_ALEN);
510 if (at24_mem_acc->read(at24_mem_acc, buf, 0x112, 6) == 6)
511 memcpy(&laguna_net_data.hwaddr[3], buf, ETH_ALEN);
513 /* Read out Model Information */
514 if (at24_mem_acc->read(at24_mem_acc, buf, 0x130, 16) == 16)
515 memcpy(&laguna_info.model, buf, 16);
516 if (at24_mem_acc->read(at24_mem_acc, buf, 0x140, 1) == 1)
517 memcpy(&laguna_info.nor_flash_size, buf, 1);
518 if (at24_mem_acc->read(at24_mem_acc, buf, 0x141, 1) == 1)
519 memcpy(&laguna_info.spi_flash_size, buf, 1);
520 if (at24_mem_acc->read(at24_mem_acc, buf, 0x142, 4) == 4)
521 memcpy(&laguna_info.config_bitmap, buf, 4);
522 if (at24_mem_acc->read(at24_mem_acc, buf, 0x146, 4) == 4)
523 memcpy(&laguna_info.config2_bitmap, buf, 4);
526 static struct at24_platform_data laguna_eeprom_info = {
529 .flags = AT24_FLAG_READONLY,
533 static struct pca953x_platform_data laguna_pca_data = {
538 static struct pca953x_platform_data laguna_pca2_data = {
543 static struct i2c_board_info __initdata laguna_i2c_devices[] = {
545 I2C_BOARD_INFO("pca9555", 0x23),
546 .platform_data = &laguna_pca_data,
548 I2C_BOARD_INFO("pca9555", 0x27),
549 .platform_data = &laguna_pca2_data,
551 I2C_BOARD_INFO("gsp", 0x29),
553 I2C_BOARD_INFO ("24c08",0x50),
554 .platform_data = &laguna_eeprom_info,
556 I2C_BOARD_INFO("ds1672", 0x68),
564 static struct resource laguna_watchdog_resources[] = {
566 .start = CNS3XXX_TC11MP_TWD_BASE + 0x100, // CPU0 watchdog
567 .end = CNS3XXX_TC11MP_TWD_BASE + SZ_4K - 1,
568 .flags = IORESOURCE_MEM,
572 static struct platform_device laguna_watchdog = {
573 .name = "mpcore_wdt",
575 .num_resources = ARRAY_SIZE(laguna_watchdog_resources),
576 .resource = laguna_watchdog_resources,
582 static struct pps_gpio_platform_data laguna_pps_data = {
584 .gpio_label = "GPS_PPS",
585 .assert_falling_edge = 0,
589 static struct platform_device laguna_pps_device = {
592 .dev.platform_data = &laguna_pps_data,
599 static struct gpio laguna_gpio_gw2391[] = {
600 { 0, GPIOF_IN , "*GPS_PPS" },
601 { 1, GPIOF_IN , "*GSC_IRQ#" },
602 { 2, GPIOF_IN , "*USB_FAULT#" },
603 { 5, GPIOF_OUT_INIT_LOW , "*USB0_PCI_SEL" },
604 { 6, GPIOF_OUT_INIT_HIGH, "*USB_VBUS_EN" },
605 { 7, GPIOF_OUT_INIT_LOW , "*USB1_PCI_SEL" },
606 { 8, GPIOF_OUT_INIT_HIGH, "*PERST#" },
607 { 9, GPIOF_OUT_INIT_LOW , "*FP_SER_EN#" },
608 { 100, GPIOF_IN , "*USER_PB#" },
609 { 103, GPIOF_OUT_INIT_HIGH, "*V5_EN" },
610 { 108, GPIOF_IN , "DIO0" },
611 { 109, GPIOF_IN , "DIO1" },
612 { 110, GPIOF_IN , "DIO2" },
613 { 111, GPIOF_IN , "DIO3" },
614 { 112, GPIOF_IN , "DIO4" },
617 static struct gpio laguna_gpio_gw2388[] = {
618 { 0, GPIOF_IN , "*GPS_PPS" },
619 { 1, GPIOF_IN , "*GSC_IRQ#" },
620 { 3, GPIOF_IN , "*USB_FAULT#" },
621 { 6, GPIOF_OUT_INIT_HIGH, "*USB_VBUS_EN" },
622 { 7, GPIOF_OUT_INIT_LOW , "*GSM_SEL0" },
623 { 8, GPIOF_OUT_INIT_LOW , "*GSM_SEL1" },
624 { 9, GPIOF_OUT_INIT_LOW , "*FP_SER_EN" },
625 { 100, GPIOF_OUT_INIT_HIGH, "*USER_PB#" },
626 { 108, GPIOF_IN , "DIO0" },
627 { 109, GPIOF_IN , "DIO1" },
628 { 110, GPIOF_IN , "DIO2" },
629 { 111, GPIOF_IN , "DIO3" },
630 { 112, GPIOF_IN , "DIO4" },
633 static struct gpio laguna_gpio_gw2387[] = {
634 { 0, GPIOF_IN , "*GPS_PPS" },
635 { 1, GPIOF_IN , "*GSC_IRQ#" },
636 { 2, GPIOF_IN , "*USB_FAULT#" },
637 { 5, GPIOF_OUT_INIT_LOW , "*USB_PCI_SEL" },
638 { 6, GPIOF_OUT_INIT_HIGH, "*USB_VBUS_EN" },
639 { 7, GPIOF_OUT_INIT_LOW , "*GSM_SEL0" },
640 { 8, GPIOF_OUT_INIT_LOW , "*GSM_SEL1" },
641 { 9, GPIOF_OUT_INIT_LOW , "*FP_SER_EN" },
642 { 100, GPIOF_IN , "*USER_PB#" },
643 { 103, GPIOF_OUT_INIT_HIGH, "*V5_EN" },
644 { 108, GPIOF_IN , "DIO0" },
645 { 109, GPIOF_IN , "DIO1" },
646 { 110, GPIOF_IN , "DIO2" },
647 { 111, GPIOF_IN , "DIO3" },
648 { 112, GPIOF_IN , "DIO4" },
649 { 113, GPIOF_IN , "DIO5" },
652 static struct gpio laguna_gpio_gw2384[] = {
653 { 0, GPIOF_IN , "*GSC_IRQ#" },
654 { 1, GPIOF_OUT_INIT_HIGH, "*USB_HST_VBUS_EN" },
655 { 2, GPIOF_IN , "*USB_HST_FAULT#" },
656 { 5, GPIOF_IN , "*USB_OTG_FAULT#" },
657 { 6, GPIOF_OUT_INIT_LOW , "*USB_HST_PCI_SEL" },
658 { 7, GPIOF_OUT_INIT_LOW , "*GSM_SEL0" },
659 { 8, GPIOF_OUT_INIT_LOW , "*GSM_SEL1" },
660 { 9, GPIOF_OUT_INIT_LOW , "*FP_SER_EN" },
661 { 12, GPIOF_OUT_INIT_LOW , "J10_DIOLED0" },
662 { 13, GPIOF_OUT_INIT_HIGH, "*I2CMUX_RST#" },
663 { 14, GPIOF_OUT_INIT_LOW , "J10_DIOLED1" },
664 { 15, GPIOF_OUT_INIT_LOW , "J10_DIOLED2" },
665 { 100, GPIOF_IN , "*USER_PB#" },
666 { 103, GPIOF_OUT_INIT_HIGH, "V5_EN" },
667 { 108, GPIOF_IN , "J9_DIOGSC0" },
670 static struct gpio laguna_gpio_gw2383[] = {
671 { 0, GPIOF_IN , "*GPS_PPS" },
672 { 1, GPIOF_IN , "*GSC_IRQ#" },
673 { 2, GPIOF_OUT_INIT_HIGH, "*PCIE_RST#" },
674 { 3, GPIOF_IN , "GPIO0" },
675 { 8, GPIOF_IN , "GPIO1" },
676 { 100, GPIOF_IN , "DIO0" },
677 { 101, GPIOF_IN , "DIO1" },
680 static struct gpio laguna_gpio_gw2382[] = {
681 { 0, GPIOF_IN , "*GPS_PPS" },
682 { 1, GPIOF_IN , "*GSC_IRQ#" },
683 { 2, GPIOF_OUT_INIT_HIGH, "*PCIE_RST#" },
684 { 3, GPIOF_IN , "GPIO0" },
685 { 4, GPIOF_IN , "GPIO1" },
686 { 9, GPIOF_OUT_INIT_HIGH, "*USB_VBUS_EN" },
687 { 10, GPIOF_OUT_INIT_HIGH, "*USB_PCI_SEL#" },
688 { 100, GPIOF_IN , "DIO0" },
689 { 101, GPIOF_IN , "DIO1" },
692 static struct gpio laguna_gpio_gw2380[] = {
693 { 0, GPIOF_IN , "*GPS_PPS" },
694 { 1, GPIOF_IN , "*GSC_IRQ#" },
695 { 3, GPIOF_IN , "GPIO0" },
696 { 8, GPIOF_IN , "GPIO1" },
697 { 100, GPIOF_IN , "DIO0" },
698 { 101, GPIOF_IN , "DIO1" },
699 { 102, GPIOF_IN , "DIO2" },
700 { 103, GPIOF_IN , "DIO3" },
706 static void __init laguna_init(void)
708 platform_device_register(&laguna_watchdog);
710 platform_device_register(&laguna_i2c_controller);
712 i2c_register_board_info(0, ARRAY_AND_SIZE(laguna_i2c_devices));
714 pm_power_off = cns3xxx_power_off;
717 static struct map_desc laguna_io_desc[] __initdata = {
719 .virtual = CNS3XXX_UART0_BASE_VIRT,
720 .pfn = __phys_to_pfn(CNS3XXX_UART0_BASE),
724 .virtual = CNS3XXX_UART1_BASE_VIRT,
725 .pfn = __phys_to_pfn(CNS3XXX_UART1_BASE),
729 .virtual = CNS3XXX_UART2_BASE_VIRT,
730 .pfn = __phys_to_pfn(CNS3XXX_UART2_BASE),
736 static void __init laguna_map_io(void)
738 cns3xxx_common_init();
739 cns3xxx_pcie_iotable_init();
740 iotable_init(ARRAY_AND_SIZE(laguna_io_desc));
741 laguna_early_serial_setup();
744 static int laguna_register_gpio(struct gpio *array, size_t num)
749 for (i = 0; i < num; i++, array++) {
750 const char *label = array->label;
753 err = gpio_request_one(array->gpio, array->flags, label);
757 err = gpio_export(array->gpio, array->label[0] != '*');
763 static int __init laguna_pcie_init(void)
765 if (!machine_is_gw2388())
768 return cns3xxx_pcie_init();
770 subsys_initcall(laguna_pcie_init);
772 static int __init laguna_model_setup(void)
777 if (!machine_is_gw2388())
780 printk("Running on Gateworks Laguna %s\n", laguna_info.model);
781 cns3xxx_gpio_init( 0, 32, CNS3XXX_GPIOA_BASE_VIRT, IRQ_CNS3XXX_GPIOA,
783 cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT, IRQ_CNS3XXX_GPIOB,
784 NR_IRQS_CNS3XXX + 32);
786 if (strncmp(laguna_info.model, "GW", 2) == 0) {
787 if (laguna_info.config_bitmap & ETH0_LOAD)
788 laguna_net_data.ports |= BIT(0);
789 if (laguna_info.config_bitmap & ETH1_LOAD)
790 laguna_net_data.ports |= BIT(1);
791 if (laguna_info.config_bitmap & ETH2_LOAD)
792 laguna_net_data.ports |= BIT(2);
793 if (laguna_net_data.ports)
794 platform_device_register(&laguna_net_device);
796 if ((laguna_info.config_bitmap & SATA0_LOAD) ||
797 (laguna_info.config_bitmap & SATA1_LOAD))
800 if (laguna_info.config_bitmap & (USB0_LOAD)) {
801 cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB);
803 /* DRVVBUS pins share with GPIOA */
804 mem = (void __iomem *)(CNS3XXX_MISC_BASE_VIRT + 0x0014);
805 reg = __raw_readl(mem);
807 __raw_writel(reg, mem);
810 mem = (void __iomem *)(CNS3XXX_MISC_BASE_VIRT + 0x0808);
811 reg = __raw_readl(mem);
813 __raw_writel(reg, mem);
815 platform_device_register(&cns3xxx_usb_otg_device);
818 if (laguna_info.config_bitmap & (USB1_LOAD)) {
819 platform_device_register(&cns3xxx_usb_ehci_device);
820 platform_device_register(&cns3xxx_usb_ohci_device);
823 if (laguna_info.config_bitmap & (SD_LOAD))
824 cns3xxx_sdhci_init();
826 if (laguna_info.config_bitmap & (UART0_LOAD))
827 laguna_uart.num_resources = 1;
828 if (laguna_info.config_bitmap & (UART1_LOAD))
829 laguna_uart.num_resources = 2;
830 if (laguna_info.config_bitmap & (UART2_LOAD))
831 laguna_uart.num_resources = 3;
832 platform_device_register(&laguna_uart);
834 if (laguna_info.config2_bitmap & (NOR_FLASH_LOAD)) {
835 switch (laguna_info.nor_flash_size) {
837 laguna_nor_partitions[3].size = SZ_8M - SZ_256K - SZ_128K - SZ_2M;
838 laguna_nor_res.end = CNS3XXX_FLASH_BASE + SZ_8M - 1;
841 laguna_nor_partitions[3].size = SZ_16M - SZ_256K - SZ_128K - SZ_2M;
842 laguna_nor_res.end = CNS3XXX_FLASH_BASE + SZ_16M - 1;
845 laguna_nor_partitions[3].size = SZ_32M - SZ_256K - SZ_128K - SZ_2M;
846 laguna_nor_res.end = CNS3XXX_FLASH_BASE + SZ_32M - 1;
849 laguna_nor_partitions[3].size = SZ_64M - SZ_256K - SZ_128K - SZ_2M;
850 laguna_nor_res.end = CNS3XXX_FLASH_BASE + SZ_64M - 1;
853 laguna_nor_partitions[3].size = SZ_128M - SZ_256K - SZ_128K - SZ_2M;
854 laguna_nor_res.end = CNS3XXX_FLASH_BASE + SZ_128M - 1;
857 platform_device_register(&laguna_nor_pdev);
860 if (laguna_info.config2_bitmap & (SPI_FLASH_LOAD)) {
861 switch (laguna_info.spi_flash_size) {
863 laguna_spi_partitions[3].size = SZ_4M - SZ_2M;
866 laguna_spi_partitions[3].size = SZ_8M - SZ_2M;
869 laguna_spi_partitions[3].size = SZ_16M - SZ_2M;
872 laguna_spi_partitions[3].size = SZ_32M - SZ_2M;
875 laguna_spi_partitions[3].size = SZ_64M - SZ_2M;
878 spi_register_board_info(ARRAY_AND_SIZE(laguna_spi_devices));
881 if ((laguna_info.config_bitmap & SPI0_LOAD) ||
882 (laguna_info.config_bitmap & SPI1_LOAD))
883 platform_device_register(&laguna_spi_controller);
885 if (laguna_info.config2_bitmap & GPS_LOAD)
886 platform_device_register(&laguna_pps_device);
889 * Do any model specific setup not known by the bitmap by matching
890 * the first 6 characters of the model name
893 if ( (strncmp(laguna_info.model, "GW2388", 6) == 0)
894 || (strncmp(laguna_info.model, "GW2389", 6) == 0) )
897 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2388));
899 laguna_gpio_leds_data.num_leds = 2;
900 } else if (strncmp(laguna_info.model, "GW2387", 6) == 0) {
902 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2387));
904 laguna_gpio_leds_data.num_leds = 2;
905 } else if (strncmp(laguna_info.model, "GW2384", 6) == 0) {
907 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2384));
909 laguna_gpio_leds_data.num_leds = 1;
910 } else if (strncmp(laguna_info.model, "GW2383", 6) == 0) {
912 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2383));
914 laguna_gpio_leds[0].gpio = 107;
915 laguna_gpio_leds_data.num_leds = 1;
916 } else if (strncmp(laguna_info.model, "GW2382", 6) == 0) {
918 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2382));
920 laguna_gpio_leds[0].gpio = 107;
921 laguna_gpio_leds_data.num_leds = 1;
922 } else if (strncmp(laguna_info.model, "GW2380", 6) == 0) {
924 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2380));
926 laguna_gpio_leds[0].gpio = 107;
927 laguna_gpio_leds[1].gpio = 106;
928 laguna_gpio_leds_data.num_leds = 2;
929 } else if (strncmp(laguna_info.model, "GW2391", 6) == 0) {
931 laguna_register_gpio(ARRAY_AND_SIZE(laguna_gpio_gw2391));
933 laguna_gpio_leds_data.num_leds = 2;
935 platform_device_register(&laguna_gpio_leds_device);
937 // Do some defaults here, not sure what yet
941 late_initcall(laguna_model_setup);
943 MACHINE_START(GW2388, "Gateworks Corporation Laguna Platform")
944 .atag_offset = 0x100,
945 .map_io = laguna_map_io,
946 .init_irq = cns3xxx_init_irq,
947 .timer = &cns3xxx_timer,
948 .handle_irq = gic_handle_irq,
949 .init_machine = laguna_init,
950 .restart = cns3xxx_restart,