target/linux/brcm63xx/patches-4.9/139-Documentation-add-BCM6368-pincontroller-binding-docu.patch

   1 From 30594cf9bfff176a9e4b14c50dcd8b9d0cc3edec Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jonas.gorski@gmail.com>
   3 Date: Wed, 27 Jul 2016 11:36:51 +0200
   4 Subject: [PATCH 10/16] Documentation: add BCM6368 pincontroller binding
   5  documentation
   6
   7 Add binding documentation for the pincontrol core found in BCM6368 SoCs.
   8
   9 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  10 ---
  11  .../bindings/pinctrl/brcm,bcm6368-pinctrl.txt      | 67 ++++++++++++++++++++++
  12  1 file changed, 67 insertions(+)
  13  create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
  14
  15 --- /dev/null
  16 +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
  17 @@ -0,0 +1,67 @@
  18 +* Broadcom BCM6368 pin controller
  19 +
  20 +Required properties:
  21 +- compatible: Must be "brcm,bcm6368-pinctrl".
  22 +- reg: Register specifiers of dirout, dat, mode registers.
  23 +- reg-names: Must be "dirout", "dat", "mode".
  24 +- brcm,gpiobasemode: Phandle to the gpio basemode register.
  25 +- gpio-controller: Identifies this node as a GPIO controller.
  26 +- #gpio-cells: Must be <2>.
  27 +
  28 +Example:
  29 +
  30 +pinctrl: pin-controller@10000080 {
  31 +       compatible = "brcm,bcm6368-pinctrl";
  32 +       reg = <0x10000080 0x08>,
  33 +             <0x10000088 0x08>,
  34 +             <0x10000098 0x04>;
  35 +       reg-names = "dirout", "dat", "mode";
  36 +       brcm,gpiobasemode = <&gpiobasemode>;
  37 +
  38 +       gpio-controller;
  39 +       #gpio-cells = <2>;
  40 +};
  41 +
  42 +gpiobasemode: syscon@100000b8 {
  43 +       compatible = "brcm,bcm6368-gpiobasemode", "syscon";
  44 +       reg = <0x100000b8 4>;
  45 +       native-endian;
  46 +};
  47 +
  48 +Available pins/groups and functions:
  49 +
  50 +name           pins    functions
  51 +-----------------------------------------------------------
  52 +gpio0          0       analog_afe0
  53 +gpio1          1       analog_afe1
  54 +gpio2          2       sys_irq
  55 +gpio3          3       serial_led_data
  56 +gpio4          4       serial_led_clk
  57 +gpio5          5       inet_led
  58 +gpio6          6       ephy0_led
  59 +gpio7          7       ephy1_led
  60 +gpio8          8       ephy2_led
  61 +gpio9          9       ephy3_led
  62 +gpio10         10      robosw_led_data
  63 +gpio11         11      robosw_led_clk
  64 +gpio12         12      robosw_led0
  65 +gpio13         13      robosw_led1
  66 +gpio14         14      usb_device_led
  67 +gpio15         15      -
  68 +gpio16         16      pci_req1
  69 +gpio17         17      pci_gnt1
  70 +gpio18         18      pci_intb
  71 +gpio19         19      pci_req0
  72 +gpio20         20      pci_gnt0
  73 +gpio21         21      -
  74 +gpio22         22      pcmcia_cd1
  75 +gpio23         23      pcmcia_cd2
  76 +gpio24         24      pcmcia_vs1
  77 +gpio25         25      pcmcia_vs2
  78 +gpio26         26      ebi_cs2
  79 +gpio27         27      ebi_cs3
  80 +gpio28         28      spi_cs2
  81 +gpio29         29      spi_cs3
  82 +gpio30         30      spi_cs4
  83 +gpio31         31      spi_cs5
  84 +uart1_grp      30-33   uart1