ath79: ar7242: Update dts for current ag71xx driver
[oweals/openwrt.git] / target / linux / brcm63xx / patches-4.9 / 001-4.12-04-spi-bcm63xx-hsspi-allow-providing-clock-rate-through.patch
1 From d03f23df6ff47898d76f06b3aa5dadcfa1ec8f4f Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jonas.gorski@gmail.com>
3 Date: Sun, 19 Feb 2017 23:40:22 +0100
4 Subject: [PATCH 1/3] spi/bcm63xx-hsspi: allow providing clock rate through a
5  second clock
6
7 Instead of requiring the hsspi clock to have a rate, allow using a second
8 clock for providing the Hz rate, which is probably more correct anyway.
9
10 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
11 ---
12  drivers/spi/spi-bcm63xx-hsspi.c | 12 ++++++++++--
13  1 file changed, 10 insertions(+), 2 deletions(-)
14
15 --- a/drivers/spi/spi-bcm63xx-hsspi.c
16 +++ b/drivers/spi/spi-bcm63xx-hsspi.c
17 @@ -351,8 +351,16 @@ static int bcm63xx_hsspi_probe(struct pl
18                 return PTR_ERR(clk);
19  
20         rate = clk_get_rate(clk);
21 -       if (!rate)
22 -               return -EINVAL;
23 +       if (!rate) {
24 +               struct clk *pll_clk = devm_clk_get(dev, "pll");
25 +
26 +               if (IS_ERR(pll_clk))
27 +                       return PTR_ERR(pll_clk);
28 +
29 +               rate = clk_get_rate(pll_clk);
30 +               if (!rate)
31 +                       return -EINVAL;
32 +       }
33  
34         ret = clk_prepare_enable(clk);
35         if (ret)