target/linux/brcm63xx/patches-4.14/389-MIPS-BCM63XX-add-clkdev-lookups-for-device-tree.patch

   1 From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jonas.gorski@gmail.com>
   3 Date: Mon, 31 Jul 2017 20:10:36 +0200
   4 Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree
   5
   6 ---
   7  arch/mips/bcm63xx/clk.c | 15 +++++++++++++++
   8  1 file changed, 15 insertions(+)
   9
  10 --- a/arch/mips/bcm63xx/clk.c
  11 +++ b/arch/mips/bcm63xx/clk.c
  12 @@ -489,6 +489,8 @@ static struct clk_lookup bcm3368_clks[]
  13         CLKDEV_INIT(NULL, "periph", &clk_periph),
  14         CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  15         CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
  16 +       CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph),
  17 +       CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph),
  18         /* gated clocks */
  19         CLKDEV_INIT(NULL, "enet0", &clk_enet0),
  20         CLKDEV_INIT(NULL, "enet1", &clk_enet1),
  21 @@ -505,7 +507,9 @@ static struct clk_lookup bcm6318_clks[]
  22         /* fixed rate clocks */
  23         CLKDEV_INIT(NULL, "periph", &clk_periph),
  24         CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  25 +       CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
  26         CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
  27 +       CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll),
  28         /* gated clocks */
  29         CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
  30         CLKDEV_INIT(NULL, "usbh", &clk_usbh),
  31 @@ -519,7 +523,10 @@ static struct clk_lookup bcm6328_clks[]
  32         CLKDEV_INIT(NULL, "periph", &clk_periph),
  33         CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  34         CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
  35 +       CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
  36 +       CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
  37         CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
  38 +       CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
  39         /* gated clocks */
  40         CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
  41         CLKDEV_INIT(NULL, "usbh", &clk_usbh),
  42 @@ -532,6 +539,7 @@ static struct clk_lookup bcm6338_clks[]
  43         /* fixed rate clocks */
  44         CLKDEV_INIT(NULL, "periph", &clk_periph),
  45         CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  46 +       CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
  47         /* gated clocks */
  48         CLKDEV_INIT(NULL, "enet0", &clk_enet0),
  49         CLKDEV_INIT(NULL, "enet1", &clk_enet1),
  50 @@ -546,6 +554,7 @@ static struct clk_lookup bcm6345_clks[]
  51         /* fixed rate clocks */
  52         CLKDEV_INIT(NULL, "periph", &clk_periph),
  53         CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  54 +       CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
  55         /* gated clocks */
  56         CLKDEV_INIT(NULL, "enet0", &clk_enet0),
  57         CLKDEV_INIT(NULL, "enet1", &clk_enet1),
  58 @@ -560,6 +569,7 @@ static struct clk_lookup bcm6348_clks[]
  59         /* fixed rate clocks */
  60         CLKDEV_INIT(NULL, "periph", &clk_periph),
  61         CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  62 +       CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
  63         /* gated clocks */
  64         CLKDEV_INIT(NULL, "enet0", &clk_enet0),
  65         CLKDEV_INIT(NULL, "enet1", &clk_enet1),
  66 @@ -576,6 +586,8 @@ static struct clk_lookup bcm6358_clks[]
  67         CLKDEV_INIT(NULL, "periph", &clk_periph),
  68         CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  69         CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
  70 +       CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph),
  71 +       CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph),
  72         /* gated clocks */
  73         CLKDEV_INIT(NULL, "enet0", &clk_enet0),
  74         CLKDEV_INIT(NULL, "enet1", &clk_enet1),
  75 @@ -595,7 +607,10 @@ static struct clk_lookup bcm6362_clks[]
  76         CLKDEV_INIT(NULL, "periph", &clk_periph),
  77         CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  78         CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
  79 +       CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
  80 +       CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
  81         CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
  82 +       CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
  83         /* gated clocks */
  84         CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
  85         CLKDEV_INIT(NULL, "usbh", &clk_usbh),
  86 @@ -611,6 +626,8 @@ static struct clk_lookup bcm6368_clks[]
  87         CLKDEV_INIT(NULL, "periph", &clk_periph),
  88         CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  89         CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
  90 +       CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
  91 +       CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
  92         /* gated clocks */
  93         CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
  94         CLKDEV_INIT(NULL, "usbh", &clk_usbh),
  95 @@ -625,7 +642,10 @@ static struct clk_lookup bcm63268_clks[]
  96         CLKDEV_INIT(NULL, "periph", &clk_periph),
  97         CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  98         CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
  99 +       CLKDEV_INIT("10000180.serial", "refclk", &clk_periph),
 100 +       CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph),
 101         CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
 102 +       CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
 103         /* gated clocks */
 104         CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
 105         CLKDEV_INIT(NULL, "usbh", &clk_usbh),