brcm47xx: rename target to bcm47xx
[oweals/openwrt.git] / target / linux / brcm63xx / dts / bcm63268.dtsi
1 / {
2         #address-cells = <1>;
3         #size-cells = <1>;
4         compatible = "brcm,bcm63268";
5
6         aliases {
7                 pinctrl = &pinctrl;
8                 serial0 = &uart0;
9                 serial1 = &uart1;
10                 spi0 = &lsspi;
11                 spi1 = &hsspi;
12         };
13
14         cpus {
15                 #address-cells = <1>;
16                 #size-cells = <0>;
17
18                 cpu@0 {
19                         compatible = "brcm,bmips4350", "mips,mips4Kc";
20                         device_type = "cpu";
21                         reg = <0>;
22                 };
23
24                 cpu@1 {
25                         compatible = "brcm,bmips4350", "mips,mips4Kc";
26                         device_type = "cpu";
27                         reg = <1>;
28                 };
29         };
30
31         cpu_intc: interrupt-controller {
32                 #address-cells = <0>;
33                 compatible = "mti,cpu-interrupt-controller";
34
35                 interrupt-controller;
36                 #interrupt-cells = <1>;
37         };
38
39         memory { device_type = "memory"; reg = <0 0>; };
40
41         ubus@10000000 {
42                 #address-cells = <1>;
43                 #size-cells = <1>;
44                 ranges;
45                 compatible = "simple-bus";
46                 interrupt-parent = <&periph_intc>;
47
48                 ext_intc: interrupt-controller@10000018 {
49                         compatible = "brcm,bcm6345-ext-intc";
50                         reg = <0x10000018 0x4>;
51
52                         interrupt-controller;
53                         #interrupt-cells = <2>;
54
55                         interrupts = <44>, <45>, <46>, <47>;
56                 };
57
58                 periph_intc: interrupt-controller@10000020 {
59                         compatible = "brcm,bcm6345-l1-intc";
60                         reg = <0x10000020 0x20>,
61                               <0x10000040 0x20>;
62
63                         interrupt-controller;
64                         #interrupt-cells = <1>;
65
66                         interrupt-parent = <&cpu_intc>;
67                         interrupts = <2>, <3>;
68                 };
69
70                 pinctrl: pin-controller@100000c0 {
71                         compatible = "brcm,bcm63268-pinctrl";
72                         reg = <0x100000c0 0x8>,
73                               <0x100000c8 0x8>,
74                               <0x100000d0 0x4>,
75                               <0x100000d8 0x4>,
76                               <0x100000dc 0x4>,
77                               <0x100000f8 0x4>;
78                         reg-names = "dirout", "dat", "led", "mode",
79                                     "ctrl", "basemode";
80
81                         gpio-controller;
82                         #gpio-cells = <2>;
83
84                         interrupt-parent = <&periph_intc>;
85                         interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
86                         interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
87
88                         pinctrl_serial_led: serial_led {
89                                 pinctrl_serial_led_clk: serial_led_clk {
90                                         function = "serial_led_clk";
91                                         pins = "gpio0";
92                                 };
93
94                                 pinctrl_serial_led_data: serial_led_data {
95                                         function = "serial_led_data";
96                                         pins = "gpio1";
97                                 };
98                         };
99
100                         pinctrl_hsspi_cs4: hsspi_cs4 {
101                                 function = "hsspi_cs4";
102                                 pins = "gpio16";
103                         };
104
105                         pinctrl_hsspi_cs5: hsspi_cs5 {
106                                 function = "hsspi_cs5";
107                                 pins = "gpio17";
108                         };
109
110                         pinctrl_hsspi_cs6: hsspi_cs6 {
111                                 function = "hsspi_cs6";
112                                 pins = "gpio8";
113                         };
114
115                         pinctrl_hsspi_cs7: hsspi_cs7 {
116                                 function = "hsspi_cs7";
117                                 pins = "gpio9";
118                         };
119
120                         pinctrl_adsl_spi: adsl_spi {
121                                 pinctrl_adsl_spi_miso: adsl_spi_miso {
122                                         function = "adsl_spi_miso";
123                                         pins = "gpio18";
124                                 };
125
126                                 pinctrl_adsl_spi_mosi: adsl_spi_mosi {
127                                         function = "adsl_spi_mosi";
128                                         pins = "gpio19";
129                                 };
130                         };
131
132                         pinctrl_vreq_clk: vreq_clk {
133                                 function = "vreq_clk";
134                                 pins = "gpio22";
135                         };
136
137                         pinctrl_pcie_clkreq_b: pcie_clkreq_b {
138                                 function = "pcie_clkreq_b";
139                                 pins = "gpio23";
140                         };
141
142                         pinctrl_robosw_led_clk: robosw_led_clk {
143                                 function = "robosw_led_clk";
144                                 pins = "gpio30";
145                         };
146
147                         pinctrl_robosw_led_data: robosw_led_data {
148                                 function = "robosw_led_data";
149                                 pins = "gpio31";
150                         };
151
152                         pinctrl_nand: nand {
153                                 function = "nand";
154                                 group = "nand_grp";
155                         };
156
157                         pinctrl_gpio35_alt: gpio35_alt {
158                                 function = "gpio35_alt";
159                                 pin = "gpio35";
160                         };
161
162                         pinctrl_dectpd: dectpd {
163                                 function = "dectpd";
164                                 group = "dectpd_grp";
165                         };
166
167                         pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
168                                 function = "vdsl_phy_override_0";
169                                 group = "vdsl_phy_override_0_grp";
170                         };
171
172                         pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
173                                 function = "vdsl_phy_override_1";
174                                 group = "vdsl_phy_override_1_grp";
175                         };
176
177                         pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
178                                 function = "vdsl_phy_override_2";
179                                 group = "vdsl_phy_override_2_grp";
180                         };
181
182                         pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
183                                 function = "vdsl_phy_override_3";
184                                 group = "vdsl_phy_override_3_grp";
185                         };
186
187                         pinctrl_dsl_gpio8: dsl_gpio8 {
188                                 function = "dsl_gpio8";
189                                 group = "dsl_gpio8";
190                         };
191
192                         pinctrl_dsl_gpio9: dsl_gpio9 {
193                                 function = "dsl_gpio9";
194                                 group = "dsl_gpio9";
195                         };
196                 };
197
198                 uart0: serial@10000180 {
199                         compatible = "brcm,bcm6345-uart";
200                         reg = <0x10000180 0x18>;
201
202                         interrupt-parent = <&periph_intc>;
203                         interrupts = <5>;
204
205                         /* clocks = <&periph_clk>; */
206                         /* clock-names = "refclk"; */
207
208                         status = "disabled";
209                 };
210
211                 uart1: serial@100001a0 {
212                         compatible = "brcm,bcm6345-uart";
213                         reg = <0x100001a0 0x18>;
214
215                         interrupt-parent = <&periph_intc>;
216                         interrupts = <34>;
217
218                         /* clocks = <&periph_clk>; */
219                         /* clock-names = "refclk"; */
220
221                         status = "disabled";
222                 };
223
224                 lsspi: spi@10000800 {
225                         #address-cells = <1>;
226                         #size-cells = <0>;
227                         compatible = "brcm,bcm6358-spi";
228                         reg = <0x10000800 0x70c>;
229                         interrupts = <80>;
230                         /* clocks = <&clkctl 15>; */
231                 };
232
233                 hsspi: spi@10001000 {
234                         #address-cells = <1>;
235                         #size-cells = <0>;
236                         compatible = "brcm,bcm6328-hsspi";
237                         reg = <0x10001000 0x600>;
238                         interrupts = <6>;
239                         /* clocks = <&clkctl 16>; */
240                 };
241
242                 leds: led-controller@10001900 {
243                         #address-cells = <1>;
244                         #size-cells = <0>;
245                         compatible = "brcm,bcm6328-leds";
246                         reg = <0x10001900 0x24>;
247                         status = "disabled";
248                 };
249         };
250 };