2 * Sonics Silicon Backplane
5 * Copyright (C) 2005-2007 Michael Buesch <mb@bu3sch.de>
6 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
7 * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
8 * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (C) 2006 Broadcom Corporation.
12 * Licensed under the GNU/GPL. See COPYING for details.
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/pci.h>
20 #ifdef CONFIG_SSB_PCMCIAHOST
21 # include <pcmcia/cs_types.h>
22 # include <pcmcia/cs.h>
23 # include <pcmcia/cistpl.h>
24 # include <pcmcia/ds.h>
27 #include "ssb_private.h"
30 const char * ssb_core_name(u16 coreid)
33 case SSB_DEV_CHIPCOMMON:
43 case SSB_DEV_ETHERNET:
44 return "Fast Ethernet";
47 case SSB_DEV_USB11_HOSTDEV:
48 return "USB 1.1 Hostdev";
51 case SSB_DEV_ILINE100:
57 case SSB_DEV_INTERNAL_MEM:
58 return "Internal Memory";
59 case SSB_DEV_MEMC_SDRAM:
65 case SSB_DEV_MIPS_3302:
67 case SSB_DEV_USB11_HOST:
68 return "USB 1.1 Host";
69 case SSB_DEV_USB11_DEV:
70 return "USB 1.1 Device";
71 case SSB_DEV_USB20_HOST:
72 return "USB 2.0 Host";
73 case SSB_DEV_USB20_DEV:
74 return "USB 2.0 Device";
75 case SSB_DEV_SDIO_HOST:
77 case SSB_DEV_ROBOSWITCH:
79 case SSB_DEV_PARA_ATA:
81 case SSB_DEV_SATA_XORDMA:
82 return "SATA XOR-DMA";
83 case SSB_DEV_ETHERNET_GBIT:
84 return "GBit Ethernet";
87 case SSB_DEV_MIMO_PHY:
89 case SSB_DEV_SRAM_CTRLR:
90 return "SRAM Controller";
91 case SSB_DEV_MINI_MACPHY:
93 case SSB_DEV_ARM_1176:
95 case SSB_DEV_ARM_7TDMI:
101 static u16 pcidev_to_chipid(struct pci_dev *pci_dev)
103 u16 chipid_fallback = 0;
105 switch (pci_dev->device) {
107 chipid_fallback = 0x4301;
109 case 0x4305 ... 0x4307:
110 chipid_fallback = 0x4307;
113 chipid_fallback = 0x4402;
115 case 0x4610 ... 0x4615:
116 chipid_fallback = 0x4610;
118 case 0x4710 ... 0x4715:
119 chipid_fallback = 0x4710;
121 case 0x4320 ... 0x4325:
122 chipid_fallback = 0x4309;
124 case PCI_DEVICE_ID_BCM4401:
125 case PCI_DEVICE_ID_BCM4401B0:
126 case PCI_DEVICE_ID_BCM4401B1:
127 chipid_fallback = 0x4401;
130 ssb_printk(KERN_ERR PFX
131 "PCI-ID not in fallback list\n");
134 return chipid_fallback;
137 static u8 chipid_to_nrcores(u16 chipid)
157 ssb_printk(KERN_ERR PFX
158 "CHIPID not in nrcores fallback list\n");
164 static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
167 switch (bus->bustype) {
168 case SSB_BUSTYPE_SSB:
169 offset += current_coreidx * SSB_CORE_SIZE;
171 case SSB_BUSTYPE_PCI:
173 case SSB_BUSTYPE_PCMCIA:
174 if (offset >= 0x800) {
175 ssb_pcmcia_switch_segment(bus, 1);
178 ssb_pcmcia_switch_segment(bus, 0);
181 return readl(bus->mmio + offset);
184 static int scan_switchcore(struct ssb_bus *bus, u8 coreidx)
186 switch (bus->bustype) {
187 case SSB_BUSTYPE_SSB:
189 case SSB_BUSTYPE_PCI:
190 return ssb_pci_switch_coreidx(bus, coreidx);
191 case SSB_BUSTYPE_PCMCIA:
192 return ssb_pcmcia_switch_coreidx(bus, coreidx);
197 void ssb_iounmap(struct ssb_bus *bus)
199 switch (bus->bustype) {
200 case SSB_BUSTYPE_SSB:
201 case SSB_BUSTYPE_PCMCIA:
204 case SSB_BUSTYPE_PCI:
205 #ifdef CONFIG_SSB_PCIHOST
206 pci_iounmap(bus->host_pci, bus->mmio);
208 assert(0); /* Can't reach this code. */
213 bus->mapped_device = NULL;
216 static void __iomem * ssb_ioremap(struct ssb_bus *bus,
217 unsigned long baseaddr)
219 void __iomem *mmio = NULL;
221 switch (bus->bustype) {
222 case SSB_BUSTYPE_SSB:
223 /* Only map the first core for now. */
225 case SSB_BUSTYPE_PCMCIA:
226 mmio = ioremap(baseaddr, SSB_CORE_SIZE);
228 case SSB_BUSTYPE_PCI:
229 #ifdef CONFIG_SSB_PCIHOST
230 mmio = pci_iomap(bus->host_pci, 0, ~0UL);
232 assert(0); /* Can't reach this code. */
240 static int we_support_multiple_80211_cores(struct ssb_bus *bus)
242 /* More than one 802.11 core is only supported by special chips.
243 * There are chips with two 802.11 cores, but with dangling
244 * pins on the second core. Be careful and reject them here.
247 #ifdef CONFIG_SSB_PCIHOST
248 if (bus->bustype == SSB_BUSTYPE_PCI) {
249 if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
250 bus->host_pci->device == 0x4324)
253 #endif /* CONFIG_SSB_PCIHOST */
257 int ssb_bus_scan(struct ssb_bus *bus,
258 unsigned long baseaddr)
262 u32 idhi, cc, rev, tmp;
264 struct ssb_device *dev;
265 int nr_80211_cores = 0;
267 mmio = ssb_ioremap(bus, baseaddr);
272 err = scan_switchcore(bus, 0); /* Switch to first core */
276 idhi = scan_read32(bus, 0, SSB_IDHIGH);
277 cc = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
278 rev = (idhi & SSB_IDHIGH_RCLO);
279 rev |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
282 if (cc == SSB_DEV_CHIPCOMMON) {
283 tmp = scan_read32(bus, 0, SSB_CHIPCO_CHIPID);
285 bus->chip_id = (tmp & SSB_CHIPCO_IDMASK);
286 bus->chip_rev = (tmp & SSB_CHIPCO_REVMASK) >>
288 bus->chip_package = (tmp & SSB_CHIPCO_PACKMASK) >>
289 SSB_CHIPCO_PACKSHIFT;
291 bus->nr_devices = (tmp & SSB_CHIPCO_NRCORESMASK) >>
292 SSB_CHIPCO_NRCORESSHIFT;
294 tmp = scan_read32(bus, 0, SSB_CHIPCO_CAP);
295 bus->chipco.capabilities = tmp;
297 if (bus->bustype == SSB_BUSTYPE_PCI) {
298 bus->chip_id = pcidev_to_chipid(bus->host_pci);
299 pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
301 bus->chip_package = 0;
303 bus->chip_id = 0x4710;
305 bus->chip_package = 0;
308 if (!bus->nr_devices)
309 bus->nr_devices = chipid_to_nrcores(bus->chip_id);
310 if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
311 ssb_printk(KERN_ERR PFX
312 "More than %d ssb cores found (%d)\n",
313 SSB_MAX_NR_CORES, bus->nr_devices);
316 if (bus->bustype == SSB_BUSTYPE_SSB) {
317 /* Now that we know the number of cores,
318 * remap the whole IO space for all cores.
322 mmio = ioremap(baseaddr, SSB_CORE_SIZE * bus->nr_devices);
328 /* Fetch basic information about each core/device */
329 for (i = 0, dev_i = 0; i < bus->nr_devices; i++) {
330 err = scan_switchcore(bus, i);
333 dev = &(bus->devices[dev_i]);
335 idhi = scan_read32(bus, i, SSB_IDHIGH);
336 dev->id.coreid = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
337 dev->id.revision = (idhi & SSB_IDHIGH_RCLO);
338 dev->id.revision |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
339 dev->id.vendor = (idhi & SSB_IDHIGH_VC) >> SSB_IDHIGH_VC_SHIFT;
344 ssb_dprintk(KERN_INFO PFX
346 "(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n",
347 i, ssb_core_name(dev->id.coreid),
348 dev->id.coreid, dev->id.revision, dev->id.vendor);
350 switch (dev->id.coreid) {
353 if (nr_80211_cores > 1) {
354 if (!we_support_multiple_80211_cores(bus)) {
355 ssb_dprintk(KERN_INFO PFX "Ignoring additional "
362 #ifdef CONFIG_SSB_DRIVER_EXTIF
363 if (bus->extif.dev) {
364 ssb_printk(KERN_WARNING PFX
365 "WARNING: Multiple EXTIFs found\n");
368 bus->extif.dev = dev;
369 #endif /* CONFIG_SSB_DRIVER_EXTIF */
371 case SSB_DEV_CHIPCOMMON:
372 if (bus->chipco.dev) {
373 ssb_printk(KERN_WARNING PFX
374 "WARNING: Multiple ChipCommon found\n");
377 bus->chipco.dev = dev;
380 case SSB_DEV_MIPS_3302:
381 #ifdef CONFIG_SSB_DRIVER_MIPS
382 if (bus->mipscore.dev) {
383 ssb_printk(KERN_WARNING PFX
384 "WARNING: Multiple MIPS cores found\n");
387 bus->mipscore.dev = dev;
388 #endif /* CONFIG_SSB_DRIVER_MIPS */
392 #ifdef CONFIG_SSB_DRIVER_PCICORE
393 if (bus->pcicore.dev) {
394 ssb_printk(KERN_WARNING PFX
395 "WARNING: Multiple PCI(E) cores found\n");
398 bus->pcicore.dev = dev;
399 #endif /* CONFIG_SSB_DRIVER_PCICORE */
407 bus->nr_devices = dev_i;