target/linux/brcm2708/patches-4.19/950-0618-HACK-clk-bcm2835-Add-BCM2838_CLOCK_EMMC2-support.patch

   1 From 00f31bede51da02552b235fc93d35f357f13378a Mon Sep 17 00:00:00 2001
   2 From: Stefan Wahren <wahrenst@gmx.net>
   3 Date: Thu, 2 May 2019 23:42:29 +0200
   4 Subject: [PATCH 618/703] HACK: clk-bcm2835: Add BCM2838_CLOCK_EMMC2 support
   5
   6 The new BCM2838 supports an additional emmc2 clock. So add a new
   7 compatible to register this clock only for BCM2838.
   8
   9 Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
  10 ---
  11  drivers/clk/bcm/clk-bcm2835.c       | 20 ++++++++++++++++++--
  12  include/dt-bindings/clock/bcm2835.h |  2 ++
  13  2 files changed, 20 insertions(+), 2 deletions(-)
  14
  15 --- a/drivers/clk/bcm/clk-bcm2835.c
  16 +++ b/drivers/clk/bcm/clk-bcm2835.c
  17 @@ -124,6 +124,8 @@
  18  #define CM_AVEODIV             0x1bc
  19  #define CM_EMMCCTL             0x1c0
  20  #define CM_EMMCDIV             0x1c4
  21 +#define CM_EMMC2CTL            0x1d0
  22 +#define CM_EMMC2DIV            0x1d4
  23
  24  /* General bits for the CM_*CTL regs */
  25  # define CM_ENABLE                     BIT(4)
  26 @@ -2047,6 +2049,15 @@ static const struct bcm2835_clk_desc clk
  27                 .frac_bits = 8,
  28                 .tcnt_mux = 39),
  29
  30 +       /* EMMC2 clock (only available for BCM2838) */
  31 +       [BCM2838_CLOCK_EMMC2]   = REGISTER_PER_CLK(
  32 +               .name = "emmc2",
  33 +               .ctl_reg = CM_EMMC2CTL,
  34 +               .div_reg = CM_EMMC2DIV,
  35 +               .int_bits = 4,
  36 +               .frac_bits = 8,
  37 +               .tcnt_mux = 42),
  38 +
  39         /* General purpose (GPIO) clocks */
  40         [BCM2835_CLOCK_GP0]     = REGISTER_PER_CLK(
  41                 .name = "gp0",
  42 @@ -2276,8 +2287,12 @@ static int bcm2835_clk_probe(struct plat
  43
  44         for (i = 0; i < asize; i++) {
  45                 desc = &clk_desc_array[i];
  46 -               if (desc->clk_register && desc->data)
  47 -                       hws[i] = desc->clk_register(cprman, desc->data);
  48 +               if (desc->clk_register && desc->data) {
  49 +                       if ((i != BCM2838_CLOCK_EMMC2) ||
  50 +                           of_device_is_compatible(fw_node, "brcm,bcm2838-cprman")) {
  51 +                               hws[i] = desc->clk_register(cprman, desc->data);
  52 +                       }
  53 +               }
  54         }
  55
  56         ret = bcm2835_mark_sdc_parent_critical(hws[BCM2835_CLOCK_SDRAM]->clk);
  57 @@ -2297,6 +2312,7 @@ static int bcm2835_clk_probe(struct plat
  58
  59  static const struct of_device_id bcm2835_clk_of_match[] = {
  60         { .compatible = "brcm,bcm2835-cprman", },
  61 +       { .compatible = "brcm,bcm2838-cprman", },
  62         {}
  63  };
  64  MODULE_DEVICE_TABLE(of, bcm2835_clk_of_match);
  65 --- a/include/dt-bindings/clock/bcm2835.h
  66 +++ b/include/dt-bindings/clock/bcm2835.h
  67 @@ -66,3 +66,5 @@
  68  #define BCM2835_CLOCK_DSI1E            48
  69  #define BCM2835_CLOCK_DSI0P            49
  70  #define BCM2835_CLOCK_DSI1P            50
  71 +
  72 +#define BCM2838_CLOCK_EMMC2            51