target/linux/brcm2708/patches-4.19/950-0421-dtoverlays-Add-Support-for-the-UDRC-DRAWS.patch

   1 From f1e74b2152a21e848075ea40ba8e8665f8313739 Mon Sep 17 00:00:00 2001
   2 From: Annaliese McDermond <nh6z@nh6z.net>
   3 Date: Sun, 17 Mar 2019 16:48:36 -0700
   4 Subject: [PATCH 421/703] dtoverlays: Add Support for the UDRC/DRAWS
   5
   6 Adds a new overlay to support the Northwest Digital Radio
   7 DRAWS and UDRC HATs.  See http://nwdigitalradio.com.
   8
   9 Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
  10 ---
  11  arch/arm/boot/dts/overlays/Makefile          |   2 +
  12  arch/arm/boot/dts/overlays/README            |  59 ++++++
  13  arch/arm/boot/dts/overlays/draws-overlay.dts | 200 +++++++++++++++++++
  14  arch/arm/boot/dts/overlays/udrc-overlay.dts  | 128 ++++++++++++
  15  4 files changed, 389 insertions(+)
  16  create mode 100644 arch/arm/boot/dts/overlays/draws-overlay.dts
  17  create mode 100644 arch/arm/boot/dts/overlays/udrc-overlay.dts
  18
  19 --- a/arch/arm/boot/dts/overlays/Makefile
  20 +++ b/arch/arm/boot/dts/overlays/Makefile
  21 @@ -29,6 +29,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
  22         dionaudio-loco-v2.dtbo \
  23         dpi18.dtbo \
  24         dpi24.dtbo \
  25 +       draws.dtbo \
  26         dwc-otg.dtbo \
  27         dwc2.dtbo \
  28         enc28j60.dtbo \
  29 @@ -146,6 +147,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
  30         tpm-slb9670.dtbo \
  31         uart0.dtbo \
  32         uart1.dtbo \
  33 +       udrc.dtbo \
  34         upstream.dtbo \
  35         upstream-aux-interrupt.dtbo \
  36         vc4-fkms-v3d.dtbo \
  37 --- a/arch/arm/boot/dts/overlays/README
  38 +++ b/arch/arm/boot/dts/overlays/README
  39 @@ -531,6 +531,59 @@ Load:   dtoverlay=dpi24
  40  Params: <None>
  41
  42
  43 +Name:   draws
  44 +Info:   Configures the NW Digital Radio DRAWS Hat
  45 +
  46 +        The board includes an ADC to measure various board values and also
  47 +        provides two analog user inputs on the expansion header.  The ADC
  48 +        can be configured for various sample rates and gain values to adjust
  49 +        the input range.  Tables describing the two parameters follow.
  50 +
  51 +        ADC Gain Values:
  52 +            0 = +/- 6.144V
  53 +            1 = +/- 4.096V
  54 +            2 = +/- 2.048V
  55 +            3 = +/- 1.024V
  56 +            4 = +/- 0.512V
  57 +            5 = +/- 0.256V
  58 +            6 = +/- 0.256V
  59 +            7 = +/- 0.256V
  60 +
  61 +        ADC Datarate Values:
  62 +            0 = 128sps
  63 +            1 = 250sps
  64 +            2 = 490sps
  65 +            3 = 920sps
  66 +            4 = 1600sps (default)
  67 +            5 = 2400sps
  68 +            6 = 3300sps
  69 +            7 = 3300sps
  70 +Load:   dtoverlay=draws,<param>=<val>
  71 +Params: draws_adc_ch4_gain      Sets the full scale resolution of the ADCs
  72 +                                input voltage sensor (default 1)
  73 +
  74 +        draws_adc_ch4_datarate  Sets the datarate of the ADCs input voltage
  75 +                                sensor
  76 +
  77 +        draws_adc_ch5_gain      Sets the full scale resolution of the ADCs
  78 +                                5V rail voltage sensor (default 1)
  79 +
  80 +        draws_adc_ch5_datarate  Sets the datarate of the ADCs 4V rail voltage
  81 +                                sensor
  82 +
  83 +        draws_adc_ch6_gain      Sets the full scale resolution of the ADCs
  84 +                                AIN2 input (default 2)
  85 +
  86 +        draws_adc_ch6_datarate  Sets the datarate of the ADCs AIN2 input
  87 +
  88 +        draws_adc_ch7_gain      Sets the full scale resolution of the ADCs
  89 +                                AIN3 input (default 2)
  90 +
  91 +        draws_adc_ch7_datarate  Sets the datarate of the ADCs AIN3 input
  92 +
  93 +        alsaname                Name of the ALSA audio device (default "draws")
  94 +
  95 +
  96  Name:   dwc-otg
  97  Info:   Selects the dwc_otg USB controller driver which has fiq support. This
  98          is the default on all except the Pi Zero which defaults to dwc2.
  99 @@ -2117,6 +2170,12 @@ Params: txd1_pin                GPIO pin
 100          rxd1_pin                GPIO pin for RXD1 (15, 33 or 41 - default 15)
 101
 102
 103 +Name:   udrc
 104 +Info:   Configures the NW Digital Radio UDRC Hat
 105 +Load:   dtoverlay=udrc,<param>=<val>
 106 +Params: alsaname                Name of the ALSA audio device (default "udrc")
 107 +
 108 +
 109  Name:   upstream
 110  Info:   Allow usage of downstream .dtb with upstream kernel. Comprises
 111          vc4-kms-v3d, dwc2 and upstream-aux-interrupt overlays.
 112 --- /dev/null
 113 +++ b/arch/arm/boot/dts/overlays/draws-overlay.dts
 114 @@ -0,0 +1,200 @@
 115 +#include <dt-bindings/clock/bcm2835.h>
 116 +/*
 117 + * Device tree overlay for the DRAWS Hardware
 118 + */
 119 +
 120 +/dts-v1/;
 121 +/plugin/;
 122 +
 123 +/ {
 124 +    compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
 125 +    fragment@0 {
 126 +        target = <&i2s>;
 127 +        __overlay__ {
 128 +            status = "okay";
 129 +        };
 130 +    };
 131 +
 132 +    fragment@1 {
 133 +        target-path = "/";
 134 +        __overlay__ {
 135 +            regulators {
 136 +                compatible = "simple-bus";
 137 +                #address-cells = <1>;
 138 +                #size-cells = <0>;
 139 +
 140 +                udrc0_ldoin: udrc0_ldoin {
 141 +                    compatible = "regulator-fixed";
 142 +                    regulator-name = "ldoin";
 143 +                    regulator-min-microvolt = <3300000>;
 144 +                    regulator-max-microvolt = <3300000>;
 145 +                    regulator-always-on;
 146 +                };
 147 +            };
 148 +
 149 +            pps: pps {
 150 +                compatible = "pps-gpio";
 151 +                pinctrl-names = "default";
 152 +                pinctrl-0 = <&pps_pins>;
 153 +                gpios = <&gpio 7 0>;
 154 +                status = "okay";
 155 +            };
 156 +        };
 157 +    };
 158 +
 159 +    fragment@2 {
 160 +        target = <&i2c_arm>;
 161 +        __overlay__ {
 162 +            #address-cells = <1>;
 163 +            #size-cells = <0>;
 164 +            status = "okay";
 165 +
 166 +            tlv320aic32x4: tlv320aic32x4@18 {
 167 +                compatible = "ti,tlv320aic32x4";
 168 +                reg = <0x18>;
 169 +                #sound-dai-cells = <0>;
 170 +                status = "okay";
 171 +
 172 +                clocks = <&clocks BCM2835_CLOCK_GP0>;
 173 +                clock-names = "mclk";
 174 +                assigned-clocks = <&clocks BCM2835_CLOCK_GP0>;
 175 +                assigned-clock-rates = <25000000>;
 176 +
 177 +                pinctrl-names = "default";
 178 +                pinctrl-0 = <&gpclk0_pin &aic3204_reset>;
 179 +
 180 +                reset-gpios = <&gpio 13 0>;
 181 +
 182 +                iov-supply = <&udrc0_ldoin>;
 183 +                ldoin-supply = <&udrc0_ldoin>;
 184 +            };
 185 +
 186 +            sc16is752: sc16is752@50 {
 187 +                compatible = "nxp,sc16is752";
 188 +                reg = <0x50>;
 189 +                clocks = <&sc16is752_clk>;
 190 +                interrupt-parent = <&gpio>;
 191 +                interrupts = <17 2>; /* IRQ_TYPE_EDGE_FALLING */
 192 +
 193 +                pinctrl-names = "default";
 194 +                pinctrl-0 = <&sc16is752_irq>;
 195 +
 196 +                sc16is752_clk: sc16is752_clk {
 197 +                    compatible = "fixed-clock";
 198 +                    #clock-cells = <0>;
 199 +                    clock-frequency = <1843200>;
 200 +                };
 201 +            };
 202 +
 203 +            tla2024: tla2024@48 {
 204 +                compatible = "ti,ads1015";
 205 +                reg = <0x48>;
 206 +                #address-cells = <1>;
 207 +                #size-cells = <0>;
 208 +
 209 +                adc_ch4: channel@4 {
 210 +                    reg = <4>;
 211 +                    ti,gain = <1>;
 212 +                    ti,datarate = <4>;
 213 +                };
 214 +
 215 +                adc_ch5: channel@5 {
 216 +                    reg = <5>;
 217 +                    ti,gain = <1>;
 218 +                    ti,datarate = <4>;
 219 +                };
 220 +
 221 +                adc_ch6: channel@6 {
 222 +                    reg = <6>;
 223 +                    ti,gain = <2>;
 224 +                    ti,datarate = <4>;
 225 +                };
 226 +
 227 +                adc_ch7: channel@7 {
 228 +                    reg = <7>;
 229 +                    ti,gain = <2>;
 230 +                    ti,datarate = <4>;
 231 +                };
 232 +            };
 233 +        };
 234 +    };
 235 +
 236 +    fragment@3 {
 237 +        target = <&sound>;
 238 +        snd: __overlay__ {
 239 +            compatible = "simple-audio-card";
 240 +            i2s-controller = <&i2s>;
 241 +            status = "okay";
 242 +
 243 +            simple-audio-card,name = "draws";
 244 +            simple-audio-card,format = "i2s";
 245 +
 246 +            simple-audio-card,bitclock-master = <&dailink0_master>;
 247 +            simple-audio-card,frame-master = <&dailink0_master>;
 248 +
 249 +            simple-audio-card,widgets =
 250 +                "Line", "Line In",
 251 +                "Line", "Line Out";
 252 +
 253 +            simple-audio-card,routing =
 254 +                "IN1_R", "Line In",
 255 +                "IN1_L", "Line In",
 256 +                "CM_L", "Line In",
 257 +                "CM_R", "Line In",
 258 +                "Line Out", "LOR",
 259 +                "Line Out", "LOL";
 260 +
 261 +            dailink0_master: simple-audio-card,cpu {
 262 +                sound-dai = <&i2s>;
 263 +            };
 264 +
 265 +            simple-audio-card,codec {
 266 +                sound-dai = <&tlv320aic32x4>;
 267 +            };
 268 +        };
 269 +    };
 270 +
 271 +    fragment@4 {
 272 +        target = <&gpio>;
 273 +        __overlay__ {
 274 +            gpclk0_pin: gpclk0_pin {
 275 +                brcm,pins = <4>;
 276 +                brcm,function = <4>;
 277 +            };
 278 +
 279 +            aic3204_reset: aic3204_reset {
 280 +                brcm,pins = <13>;
 281 +                brcm,function = <1>;
 282 +                brcm,pull = <1>;
 283 +            };
 284 +
 285 +            aic3204_gpio: aic3204_gpio {
 286 +                brcm,pins = <26>;
 287 +            };
 288 +
 289 +            sc16is752_irq: sc16is752_irq {
 290 +                brcm,pins = <17>;
 291 +                brcm,function = <0>;
 292 +                brcm,pull = <2>;
 293 +            };
 294 +
 295 +            pps_pins: pps_pins {
 296 +                brcm,pins = <7>;
 297 +                brcm,function = <0>;
 298 +                brcm,pull = <0>;
 299 +            };
 300 +        };
 301 +    };
 302 +
 303 +    __overrides__ {
 304 +        draws_adc_ch4_gain = <&adc_ch4>,"ti,gain:0";
 305 +        draws_adc_ch4_datarate = <&adc_ch4>,"ti,datarate:0";
 306 +        draws_adc_ch5_gain = <&adc_ch5>,"ti,gain:0";
 307 +        draws_adc_ch5_datarate = <&adc_ch5>,"ti,datarate:0";
 308 +        draws_adc_ch6_gain = <&adc_ch6>,"ti,gain:0";
 309 +        draws_adc_ch6_datarate = <&adc_ch6>,"ti,datarate:0";
 310 +        draws_adc_ch7_gain = <&adc_ch7>,"ti,gain:0";
 311 +        draws_adc_ch7_datarate = <&adc_ch7>,"ti,datarate:0";
 312 +        alsaname = <&snd>, "simple-audio-card,name";
 313 +    };
 314 +};
 315 --- /dev/null
 316 +++ b/arch/arm/boot/dts/overlays/udrc-overlay.dts
 317 @@ -0,0 +1,128 @@
 318 +#include <dt-bindings/clock/bcm2835.h>
 319 +/*
 320 + * Device tree overlay for the Universal Digital Radio Controller
 321 + */
 322 +
 323 +/dts-v1/;
 324 +/plugin/;
 325 +
 326 +/ {
 327 +    compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
 328 +    fragment@0 {
 329 +        target = <&i2s>;
 330 +        __overlay__ {
 331 +            clocks = <&clocks BCM2835_CLOCK_PCM>;
 332 +            clock-names = "pcm";
 333 +            status = "okay";
 334 +        };
 335 +    };
 336 +
 337 +    fragment@1 {
 338 +        target-path = "/";
 339 +        __overlay__ {
 340 +            regulators {
 341 +                compatible = "simple-bus";
 342 +                #address-cells = <1>;
 343 +                #size-cells = <0>;
 344 +
 345 +                udrc0_ldoin: udrc0_ldoin {
 346 +                    compatible = "regulator-fixed";
 347 +                    regulator-name = "ldoin";
 348 +                    regulator-min-microvolt = <3300000>;
 349 +                    regulator-max-microvolt = <3300000>;
 350 +                    regulator-always-on;
 351 +                };
 352 +            };
 353 +        };
 354 +    };
 355 +
 356 +    fragment@2 {
 357 +        target = <&i2c1>;
 358 +        __overlay__ {
 359 +            #address-cells = <1>;
 360 +            #size-cells = <0>;
 361 +            status = "okay";
 362 +            clocks = <&clocks BCM2835_CLOCK_VPU>;
 363 +            clock-frequency = <400000>;
 364 +
 365 +            tlv320aic32x4: tlv320aic32x4@18 {
 366 +                compatible = "ti,tlv320aic32x4";
 367 +                #sound-dai-cells = <0>;
 368 +                reg = <0x18>;
 369 +                status = "okay";
 370 +
 371 +                clocks = <&clocks BCM2835_CLOCK_GP0>;
 372 +                clock-names = "mclk";
 373 +                assigned-clocks = <&clocks BCM2835_CLOCK_GP0>;
 374 +                assigned-clock-rates = <25000000>;
 375 +
 376 +                pinctrl-names = "default";
 377 +                pinctrl-0 = <&gpclk0_pin &aic3204_reset>;
 378 +
 379 +                reset-gpios = <&gpio 13 0>;
 380 +
 381 +                iov-supply = <&udrc0_ldoin>;
 382 +                ldoin-supply = <&udrc0_ldoin>;
 383 +            };
 384 +        };
 385 +    };
 386 +
 387 +    fragment@3 {
 388 +        target = <&sound>;
 389 +        snd: __overlay__ {
 390 +            compatible = "simple-audio-card";
 391 +            i2s-controller = <&i2s>;
 392 +            status = "okay";
 393 +
 394 +            simple-audio-card,name = "udrc";
 395 +            simple-audio-card,format = "i2s";
 396 +
 397 +            simple-audio-card,bitclock-master = <&dailink0_master>;
 398 +            simple-audio-card,frame-master = <&dailink0_master>;
 399 +
 400 +            simple-audio-card,widgets =
 401 +                "Line", "Line In",
 402 +                "Line", "Line Out";
 403 +
 404 +            simple-audio-card,routing =
 405 +                "IN1_R", "Line In",
 406 +                "IN1_L", "Line In",
 407 +                "CM_L", "Line In",
 408 +                "CM_R", "Line In",
 409 +                "Line Out", "LOR",
 410 +                "Line Out", "LOL";
 411 +
 412 +            dailink0_master: simple-audio-card,cpu {
 413 +                sound-dai = <&i2s>;
 414 +            };
 415 +
 416 +            simple-audio-card,codec {
 417 +                sound-dai = <&tlv320aic32x4>;
 418 +            };
 419 +        };
 420 +    };
 421 +
 422 +    fragment@4 {
 423 +        target = <&gpio>;
 424 +        __overlay__ {
 425 +            gpclk0_pin: gpclk0_pin {
 426 +                brcm,pins = <4>;
 427 +                brcm,function = <4>;
 428 +            };
 429 +
 430 +            aic3204_reset: aic3204_reset {
 431 +                brcm,pins = <13>;
 432 +                brcm,function = <1>;
 433 +                brcm,pull = <1>;
 434 +            };
 435 +
 436 +            aic3204_gpio: aic3204_gpio {
 437 +                brcm,pins = <26>;
 438 +            };
 439 +        };
 440 +    };
 441 +
 442 +    __overrides__ {
 443 +        alsaname = <&snd>, "simple-audio-card,name";
 444 +    };
 445 +};