target/linux/brcm2708/patches-4.19/950-0218-net-lan78xx-Support-auto-downshift-to-100Mb-s.patch

   1 From cfbb056c0c1445496f3434daf8324cad652d09be Mon Sep 17 00:00:00 2001
   2 From: Phil Elwell <phil@raspberrypi.org>
   3 Date: Mon, 26 Nov 2018 19:46:58 +0000
   4 Subject: [PATCH 218/703] net: lan78xx: Support auto-downshift to 100Mb/s
   5
   6 Ethernet cables with faulty or missing pairs (specifically pairs C and
   7 D) allow auto-negotiation to 1000Mbs, but do not support the successful
   8 establishment of a link. Add a DT property, "microchip,downshift-after",
   9 to configure the number of auto-negotiation failures after which it
  10 falls back to 100Mbs. Valid values are 2, 3, 4, 5 and 0, where 0 means
  11 never downshift.
  12
  13 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  14 ---
  15  drivers/net/phy/microchip.c  | 32 ++++++++++++++++++++++++++++++++
  16  include/linux/microchipphy.h |  8 ++++++++
  17  2 files changed, 40 insertions(+)
  18
  19 --- a/drivers/net/phy/microchip.c
  20 +++ b/drivers/net/phy/microchip.c
  21 @@ -228,6 +228,7 @@ static int lan88xx_probe(struct phy_devi
  22         struct device *dev = &phydev->mdio.dev;
  23         struct lan88xx_priv *priv;
  24         u32 led_modes[4];
  25 +       u32 downshift_after = 0;
  26         int len;
  27
  28         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  29 @@ -257,6 +258,37 @@ static int lan88xx_probe(struct phy_devi
  30                 return -EINVAL;
  31         }
  32
  33 +       if (!of_property_read_u32(dev->of_node,
  34 +                                 "microchip,downshift-after",
  35 +                                 &downshift_after)) {
  36 +               u32 mask = LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_MASK;
  37 +               u32 val = LAN78XX_PHY_CTRL3_AUTO_DOWNSHIFT;
  38 +
  39 +               switch (downshift_after) {
  40 +               case 2:
  41 +                       val |= LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_2;
  42 +                       break;
  43 +               case 3:
  44 +                       val |= LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_3;
  45 +                       break;
  46 +               case 4:
  47 +                       val |= LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_4;
  48 +                       break;
  49 +               case 5:
  50 +                       val |= LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_5;
  51 +                       break;
  52 +               case 0:
  53 +                       /* Disable completely */
  54 +                       mask = LAN78XX_PHY_CTRL3_AUTO_DOWNSHIFT;
  55 +                       val = 0;
  56 +                       break;
  57 +               default:
  58 +                       return -EINVAL;
  59 +               }
  60 +               (void)phy_modify_paged(phydev, 1, LAN78XX_PHY_CTRL3,
  61 +                                      mask, val);
  62 +       }
  63 +
  64         /* these values can be used to identify internal PHY */
  65         priv->chip_id = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_ID);
  66         priv->chip_rev = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_REV);
  67 --- a/include/linux/microchipphy.h
  68 +++ b/include/linux/microchipphy.h
  69 @@ -73,6 +73,14 @@
  70  /* Registers specific to the LAN7800/LAN7850 embedded phy */
  71  #define LAN78XX_PHY_LED_MODE_SELECT            (0x1D)
  72
  73 +#define LAN78XX_PHY_CTRL3                      (0x14)
  74 +#define LAN78XX_PHY_CTRL3_AUTO_DOWNSHIFT       (0x0010)
  75 +#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_MASK  (0x000c)
  76 +#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_2     (0x0000)
  77 +#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_3     (0x0004)
  78 +#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_4     (0x0008)
  79 +#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_5     (0x000c)
  80 +
  81  /* DSP registers */
  82  #define PHY_ARDENNES_MMD_DEV_3_PHY_CFG         (0x806A)
  83  #define PHY_ARDENNES_MMD_DEV_3_PHY_CFG_ZD_DLY_EN_      (0x2000)