target/linux/brcm2708/patches-4.19/950-0044-MMC-added-alternative-MMC-driver.patch

   1 From 74f3233f6ed4298983348b2ba5a500f955703953 Mon Sep 17 00:00:00 2001
   2 From: gellert <gellert@raspberrypi.org>
   3 Date: Fri, 15 Aug 2014 16:35:06 +0100
   4 Subject: [PATCH 044/806] MMC: added alternative MMC driver
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 mmc: Disable CMD23 transfers on all cards
  10
  11 Pending wire-level investigation of these types of transfers
  12 and associated errors on bcm2835-mmc, disable for now. Fallback of
  13 CMD18/CMD25 transfers will be used automatically by the MMC layer.
  14
  15 Reported/Tested-by: Gellert Weisz <gellert@raspberrypi.org>
  16
  17 mmc: bcm2835-mmc: enable DT support for all architectures
  18
  19 Both ARCH_BCM2835 and ARCH_BCM270x are built with OF now.
  20 Enable Device Tree support for all architectures.
  21
  22 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
  23
  24 mmc: bcm2835-mmc: fix probe error handling
  25
  26 Probe error handling is broken in several places.
  27 Simplify error handling by using device managed functions.
  28 Replace pr_{err,info} with dev_{err,info}.
  29
  30 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
  31
  32 bcm2835-mmc: Add locks when accessing sdhost registers
  33
  34 bcm2835-mmc: Add range of debug options for slowing things down
  35
  36 bcm2835-mmc: Add option to disable some delays
  37
  38 bcm2835-mmc: Add option to disable MMC_QUIRK_BLK_NO_CMD23
  39
  40 bcm2835-mmc: Default to disabling MMC_QUIRK_BLK_NO_CMD23
  41
  42 bcm2835-mmc: Adding overclocking option
  43
  44 Allow a different clock speed to be substitued for a requested 50MHz.
  45 This option is exposed using the "overclock_50" DT parameter.
  46 Note that the mmc interface is restricted to EVEN integer divisions of
  47 250MHz, and the highest sensible option is 63 (250/4 = 62.5), the
  48 next being 125 (250/2) which is much too high.
  49
  50 Use at your own risk.
  51
  52 bcm2835-mmc: Round up the overclock, so 62 works for 62.5Mhz
  53
  54 Also only warn once for each overclock setting.
  55
  56 mmc: bcm2835-mmc: Make available on ARCH_BCM2835
  57
  58 Make the bcm2835-mmc driver available for use on ARCH_BCM2835.
  59
  60 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
  61
  62 BCM270x_DT: add bcm2835-mmc entry
  63
  64 Add Device Tree entry for bcm2835-mmc.
  65 In non-DT mode, don't add the device in the board file.
  66
  67 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
  68
  69 bcm2835-mmc: Don't overwrite MMC capabilities from DT
  70
  71 bcm2835-mmc: Don't override bus width capabilities from devicetree
  72
  73 Take out the force setting of the MMC_CAP_4_BIT_DATA host capability
  74 so that the result read from devicetree via mmc_of_parse() is
  75 preserved.
  76
  77 bcm2835-mmc: Only claim one DMA channel
  78
  79 With both MMC controllers enabled there are few DMA channels left. The
  80 bcm2835-mmc driver only uses DMA in one direction at a time, so it
  81 doesn't need to claim two channels.
  82
  83 See: https://github.com/raspberrypi/linux/issues/1327
  84
  85 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  86
  87 bcm2835-mmc: New timer API
  88
  89 mmc: bcm2835-mmc: Support underclocking
  90
  91 Support underclocking of the SD bus using the max-frequency DT property
  92 (which currently has no DT parameter). The sd_overclock parameter
  93 already provides another way to achieve the same thing which should be
  94 equivalent in end result, but it is a bug not to support max-frequency
  95 as well.
  96
  97 See: https://github.com/raspberrypi/linux/issues/2350
  98
  99 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
 100 ---
 101  drivers/mmc/core/block.c       |   28 +-
 102  drivers/mmc/core/core.c        |    3 +-
 103  drivers/mmc/core/host.c        |   17 +-
 104  drivers/mmc/core/quirks.h      |    8 +
 105  drivers/mmc/host/Kconfig       |   29 +
 106  drivers/mmc/host/Makefile      |    1 +
 107  drivers/mmc/host/bcm2835-mmc.c | 1582 ++++++++++++++++++++++++++++++++
 108  include/linux/mmc/card.h       |    2 +
 109  8 files changed, 1665 insertions(+), 5 deletions(-)
 110  create mode 100644 drivers/mmc/host/bcm2835-mmc.c
 111
 112 --- a/drivers/mmc/core/block.c
 113 +++ b/drivers/mmc/core/block.c
 114 @@ -167,6 +167,13 @@ static DEFINE_MUTEX(open_lock);
 115  module_param(perdev_minors, int, 0444);
 116  MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device");
 117
 118 +/*
 119 + * Allow quirks to be overridden for the current card
 120 + */
 121 +static char *card_quirks;
 122 +module_param(card_quirks, charp, 0644);
 123 +MODULE_PARM_DESC(card_quirks, "Force the use of the indicated quirks (a bitfield)");
 124 +
 125  static inline int mmc_blk_part_switch(struct mmc_card *card,
 126                                       unsigned int part_type);
 127
 128 @@ -2913,6 +2920,7 @@ static int mmc_blk_probe(struct mmc_card
 129  {
 130         struct mmc_blk_data *md, *part_md;
 131         char cap_str[10];
 132 +       char quirk_str[24];
 133
 134         /*
 135          * Check that the card supports the command class(es) we need.
 136 @@ -2920,7 +2928,16 @@ static int mmc_blk_probe(struct mmc_card
 137         if (!(card->csd.cmdclass & CCC_BLOCK_READ))
 138                 return -ENODEV;
 139
 140 -       mmc_fixup_device(card, mmc_blk_fixups);
 141 +       if (card_quirks) {
 142 +               unsigned long quirks;
 143 +               if (kstrtoul(card_quirks, 0, &quirks) == 0)
 144 +                       card->quirks = (unsigned int)quirks;
 145 +               else
 146 +                       pr_err("mmc_block: Invalid card_quirks parameter '%s'\n",
 147 +                              card_quirks);
 148 +       }
 149 +       else
 150 +               mmc_fixup_device(card, mmc_blk_fixups);
 151
 152         card->complete_wq = alloc_workqueue("mmc_complete",
 153                                         WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
 154 @@ -2935,9 +2952,14 @@ static int mmc_blk_probe(struct mmc_card
 155
 156         string_get_size((u64)get_capacity(md->disk), 512, STRING_UNITS_2,
 157                         cap_str, sizeof(cap_str));
 158 -       pr_info("%s: %s %s %s %s\n",
 159 +       if (card->quirks)
 160 +               snprintf(quirk_str, sizeof(quirk_str),
 161 +                        " (quirks 0x%08x)", card->quirks);
 162 +       else
 163 +               quirk_str[0] = '\0';
 164 +       pr_info("%s: %s %s %s%s%s\n",
 165                 md->disk->disk_name, mmc_card_id(card), mmc_card_name(card),
 166 -               cap_str, md->read_only ? "(ro)" : "");
 167 +               cap_str, md->read_only ? " (ro)" : "", quirk_str);
 168
 169         if (mmc_blk_alloc_parts(card, md))
 170                 goto out;
 171 --- a/drivers/mmc/core/core.c
 172 +++ b/drivers/mmc/core/core.c
 173 @@ -2230,7 +2230,8 @@ EXPORT_SYMBOL(mmc_erase);
 174  int mmc_can_erase(struct mmc_card *card)
 175  {
 176         if ((card->host->caps & MMC_CAP_ERASE) &&
 177 -           (card->csd.cmdclass & CCC_ERASE) && card->erase_size)
 178 +           (card->csd.cmdclass & CCC_ERASE) && card->erase_size &&
 179 +           !(card->quirks & MMC_QUIRK_ERASE_BROKEN))
 180                 return 1;
 181         return 0;
 182  }
 183 --- a/drivers/mmc/core/host.c
 184 +++ b/drivers/mmc/core/host.c
 185 @@ -359,15 +359,30 @@ struct mmc_host *mmc_alloc_host(int extr
 186  {
 187         int err;
 188         struct mmc_host *host;
 189 +       int id;
 190
 191         host = kzalloc(sizeof(struct mmc_host) + extra, GFP_KERNEL);
 192         if (!host)
 193                 return NULL;
 194
 195 +       /* If OF aliases exist, start dynamic assignment after highest */
 196 +       id = of_alias_get_highest_id("mmc");
 197 +       id = (id < 0) ? 0 : id + 1;
 198 +
 199 +       /* If this devices has OF node, maybe it has an alias */
 200 +       if (dev->of_node) {
 201 +               int of_id = of_alias_get_id(dev->of_node, "mmc");
 202 +
 203 +               if (of_id < 0)
 204 +                       dev_warn(dev, "/aliases ID not available\n");
 205 +               else
 206 +                       id = of_id;
 207 +       }
 208 +
 209         /* scanning will be enabled when we're ready */
 210         host->rescan_disable = 1;
 211
 212 -       err = ida_simple_get(&mmc_host_ida, 0, 0, GFP_KERNEL);
 213 +       err = ida_simple_get(&mmc_host_ida, id, 0, GFP_KERNEL);
 214         if (err < 0) {
 215                 kfree(host);
 216                 return NULL;
 217 --- a/drivers/mmc/core/quirks.h
 218 +++ b/drivers/mmc/core/quirks.h
 219 @@ -99,6 +99,14 @@ static const struct mmc_fixup mmc_blk_fi
 220         MMC_FIXUP("V10016", CID_MANFID_KINGSTON, CID_OEMID_ANY, add_quirk_mmc,
 221                   MMC_QUIRK_TRIM_BROKEN),
 222
 223 +       /*
 224 +        *  On some Kingston SD cards, multiple erases of less than 64
 225 +        *  sectors can cause corruption.
 226 +        */
 227 +       MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
 228 +       MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
 229 +       MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
 230 +
 231         END_FIXUP
 232  };
 233
 234 --- a/drivers/mmc/host/Kconfig
 235 +++ b/drivers/mmc/host/Kconfig
 236 @@ -4,6 +4,35 @@
 237
 238  comment "MMC/SD/SDIO Host Controller Drivers"
 239
 240 +config MMC_BCM2835_MMC
 241 +       tristate "MMC support on BCM2835"
 242 +       depends on MACH_BCM2708 || MACH_BCM2709 || ARCH_BCM2835
 243 +       help
 244 +         This selects the MMC Interface on BCM2835.
 245 +
 246 +         If you have a controller with this interface, say Y or M here.
 247 +
 248 +         If unsure, say N.
 249 +
 250 +config MMC_BCM2835_DMA
 251 +       bool "DMA support on BCM2835 Arasan controller"
 252 +       depends on MMC_BCM2835_MMC
 253 +       help
 254 +         Enable DMA support on the Arasan SDHCI controller in Broadcom 2708
 255 +         based chips.
 256 +
 257 +         If unsure, say N.
 258 +
 259 +config MMC_BCM2835_PIO_DMA_BARRIER
 260 +       int "Block count limit for PIO transfers"
 261 +       depends on MMC_BCM2835_MMC && MMC_BCM2835_DMA
 262 +       range 0 256
 263 +       default 2
 264 +       help
 265 +         The inclusive limit in bytes under which PIO will be used instead of DMA
 266 +
 267 +         If unsure, say 2 here.
 268 +
 269  config MMC_DEBUG
 270         bool "MMC host drivers debugging"
 271         depends on MMC != n
 272 --- a/drivers/mmc/host/Makefile
 273 +++ b/drivers/mmc/host/Makefile
 274 @@ -21,6 +21,7 @@ obj-$(CONFIG_MMC_SDHCI_S3C)   += sdhci-s3c
 275  obj-$(CONFIG_MMC_SDHCI_SIRF)           += sdhci-sirf.o
 276  obj-$(CONFIG_MMC_SDHCI_F_SDH30)        += sdhci_f_sdh30.o
 277  obj-$(CONFIG_MMC_SDHCI_SPEAR)  += sdhci-spear.o
 278 +obj-$(CONFIG_MMC_BCM2835_MMC)  += bcm2835-mmc.o
 279  obj-$(CONFIG_MMC_WBSD)         += wbsd.o
 280  obj-$(CONFIG_MMC_AU1X)         += au1xmmc.o
 281  obj-$(CONFIG_MMC_MTK)          += mtk-sd.o
 282 --- /dev/null
 283 +++ b/drivers/mmc/host/bcm2835-mmc.c
 284 @@ -0,0 +1,1582 @@
 285 +/*
 286 + * BCM2835 MMC host driver.
 287 + *
 288 + * Author:      Gellert Weisz <gellert@raspberrypi.org>
 289 + *              Copyright 2014
 290 + *
 291 + * Based on
 292 + *  sdhci-bcm2708.c by Broadcom
 293 + *  sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko
 294 + *  sdhci.c and sdhci-pci.c by Pierre Ossman
 295 + *
 296 + * This program is free software; you can redistribute it and/or modify it
 297 + * under the terms and conditions of the GNU General Public License,
 298 + * version 2, as published by the Free Software Foundation.
 299 + *
 300 + * This program is distributed in the hope it will be useful, but WITHOUT
 301 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 302 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 303 + * more details.
 304 + *
 305 + * You should have received a copy of the GNU General Public License
 306 + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 307 + */
 308 +
 309 +#include <linux/delay.h>
 310 +#include <linux/module.h>
 311 +#include <linux/io.h>
 312 +#include <linux/mmc/mmc.h>
 313 +#include <linux/mmc/host.h>
 314 +#include <linux/mmc/sd.h>
 315 +#include <linux/scatterlist.h>
 316 +#include <linux/of_address.h>
 317 +#include <linux/of_irq.h>
 318 +#include <linux/clk.h>
 319 +#include <linux/platform_device.h>
 320 +#include <linux/err.h>
 321 +#include <linux/blkdev.h>
 322 +#include <linux/dmaengine.h>
 323 +#include <linux/dma-mapping.h>
 324 +#include <linux/of_dma.h>
 325 +
 326 +#include "sdhci.h"
 327 +
 328 +
 329 +#define DRIVER_NAME "mmc-bcm2835"
 330 +
 331 +#define DBG(f, x...) \
 332 +pr_debug(DRIVER_NAME " [%s()]: " f, __func__, ## x)
 333 +
 334 +#ifndef CONFIG_MMC_BCM2835_DMA
 335 + #define FORCE_PIO
 336 +#endif
 337 +
 338 +
 339 +/* the inclusive limit in bytes under which PIO will be used instead of DMA */
 340 +#ifdef CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
 341 +#define PIO_DMA_BARRIER CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
 342 +#else
 343 +#define PIO_DMA_BARRIER 00
 344 +#endif
 345 +
 346 +#define MIN_FREQ 400000
 347 +#define TIMEOUT_VAL 0xE
 348 +#define BCM2835_SDHCI_WRITE_DELAY(f)   (((2 * 1000000) / f) + 1)
 349 +
 350 +
 351 +unsigned mmc_debug;
 352 +unsigned mmc_debug2;
 353 +
 354 +struct bcm2835_host {
 355 +       spinlock_t                              lock;
 356 +
 357 +       void __iomem                    *ioaddr;
 358 +       u32                                             bus_addr;
 359 +
 360 +       struct mmc_host                 *mmc;
 361 +
 362 +       u32                                             timeout;
 363 +
 364 +       int                                             clock;  /* Current clock speed */
 365 +       u8                                              pwr;    /* Current voltage */
 366 +
 367 +       unsigned int                    max_clk;                /* Max possible freq */
 368 +       unsigned int                    timeout_clk;    /* Timeout freq (KHz) */
 369 +       unsigned int                    clk_mul;                /* Clock Muliplier value */
 370 +
 371 +       struct tasklet_struct   finish_tasklet;         /* Tasklet structures */
 372 +
 373 +       struct timer_list               timer;                  /* Timer for timeouts */
 374 +
 375 +       struct sg_mapping_iter  sg_miter;               /* SG state for PIO */
 376 +       unsigned int                    blocks;                 /* remaining PIO blocks */
 377 +
 378 +       int                                             irq;                    /* Device IRQ */
 379 +
 380 +
 381 +       u32                                             ier;                    /* cached registers */
 382 +
 383 +       struct mmc_request              *mrq;                   /* Current request */
 384 +       struct mmc_command              *cmd;                   /* Current command */
 385 +       struct mmc_data                 *data;                  /* Current data request */
 386 +       unsigned int                    data_early:1;           /* Data finished before cmd */
 387 +
 388 +       wait_queue_head_t               buf_ready_int;          /* Waitqueue for Buffer Read Ready interrupt */
 389 +
 390 +       u32                                             thread_isr;
 391 +
 392 +       u32                                             shadow;
 393 +
 394 +       /*DMA part*/
 395 +       struct dma_chan                 *dma_chan_rxtx;         /* DMA channel for reads and writes */
 396 +       struct dma_slave_config         dma_cfg_rx;
 397 +       struct dma_slave_config         dma_cfg_tx;
 398 +       struct dma_async_tx_descriptor  *tx_desc;       /* descriptor */
 399 +
 400 +       bool                                    have_dma;
 401 +       bool                                    use_dma;
 402 +       bool                                    wait_for_dma;
 403 +       /*end of DMA part*/
 404 +
 405 +       int                                             max_delay;      /* maximum length of time spent waiting */
 406 +
 407 +       int                                             flags;                          /* Host attributes */
 408 +#define SDHCI_REQ_USE_DMA      (1<<2)  /* Use DMA for this req. */
 409 +#define SDHCI_DEVICE_DEAD      (1<<3)  /* Device unresponsive */
 410 +#define SDHCI_AUTO_CMD12       (1<<6)  /* Auto CMD12 support */
 411 +#define SDHCI_AUTO_CMD23       (1<<7)  /* Auto CMD23 support */
 412 +#define SDHCI_SDIO_IRQ_ENABLED (1<<9)  /* SDIO irq enabled */
 413 +
 414 +       u32                             overclock_50;   /* frequency to use when 50MHz is requested (in MHz) */
 415 +       u32                             max_overclock;  /* Highest reported */
 416 +};
 417 +
 418 +
 419 +static inline void bcm2835_mmc_writel(struct bcm2835_host *host, u32 val, int reg, int from)
 420 +{
 421 +       unsigned delay;
 422 +       lockdep_assert_held_once(&host->lock);
 423 +       writel(val, host->ioaddr + reg);
 424 +       udelay(BCM2835_SDHCI_WRITE_DELAY(max(host->clock, MIN_FREQ)));
 425 +
 426 +       delay = ((mmc_debug >> 16) & 0xf) << ((mmc_debug >> 20) & 0xf);
 427 +       if (delay && !((1<<from) & mmc_debug2))
 428 +               udelay(delay);
 429 +}
 430 +
 431 +static inline void mmc_raw_writel(struct bcm2835_host *host, u32 val, int reg)
 432 +{
 433 +       unsigned delay;
 434 +       lockdep_assert_held_once(&host->lock);
 435 +       writel(val, host->ioaddr + reg);
 436 +
 437 +       delay = ((mmc_debug >> 24) & 0xf) << ((mmc_debug >> 28) & 0xf);
 438 +       if (delay)
 439 +               udelay(delay);
 440 +}
 441 +
 442 +static inline u32 bcm2835_mmc_readl(struct bcm2835_host *host, int reg)
 443 +{
 444 +       lockdep_assert_held_once(&host->lock);
 445 +       return readl(host->ioaddr + reg);
 446 +}
 447 +
 448 +static inline void bcm2835_mmc_writew(struct bcm2835_host *host, u16 val, int reg)
 449 +{
 450 +       u32 oldval = (reg == SDHCI_COMMAND) ? host->shadow :
 451 +               bcm2835_mmc_readl(host, reg & ~3);
 452 +       u32 word_num = (reg >> 1) & 1;
 453 +       u32 word_shift = word_num * 16;
 454 +       u32 mask = 0xffff << word_shift;
 455 +       u32 newval = (oldval & ~mask) | (val << word_shift);
 456 +
 457 +       if (reg == SDHCI_TRANSFER_MODE)
 458 +               host->shadow = newval;
 459 +       else
 460 +               bcm2835_mmc_writel(host, newval, reg & ~3, 0);
 461 +
 462 +}
 463 +
 464 +static inline void bcm2835_mmc_writeb(struct bcm2835_host *host, u8 val, int reg)
 465 +{
 466 +       u32 oldval = bcm2835_mmc_readl(host, reg & ~3);
 467 +       u32 byte_num = reg & 3;
 468 +       u32 byte_shift = byte_num * 8;
 469 +       u32 mask = 0xff << byte_shift;
 470 +       u32 newval = (oldval & ~mask) | (val << byte_shift);
 471 +
 472 +       bcm2835_mmc_writel(host, newval, reg & ~3, 1);
 473 +}
 474 +
 475 +
 476 +static inline u16 bcm2835_mmc_readw(struct bcm2835_host *host, int reg)
 477 +{
 478 +       u32 val = bcm2835_mmc_readl(host, (reg & ~3));
 479 +       u32 word_num = (reg >> 1) & 1;
 480 +       u32 word_shift = word_num * 16;
 481 +       u32 word = (val >> word_shift) & 0xffff;
 482 +
 483 +       return word;
 484 +}
 485 +
 486 +static inline u8 bcm2835_mmc_readb(struct bcm2835_host *host, int reg)
 487 +{
 488 +       u32 val = bcm2835_mmc_readl(host, (reg & ~3));
 489 +       u32 byte_num = reg & 3;
 490 +       u32 byte_shift = byte_num * 8;
 491 +       u32 byte = (val >> byte_shift) & 0xff;
 492 +
 493 +       return byte;
 494 +}
 495 +
 496 +static void bcm2835_mmc_unsignal_irqs(struct bcm2835_host *host, u32 clear)
 497 +{
 498 +       u32 ier;
 499 +
 500 +       ier = bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE);
 501 +       ier &= ~clear;
 502 +       /* change which requests generate IRQs - makes no difference to
 503 +          the content of SDHCI_INT_STATUS, or the need to acknowledge IRQs */
 504 +       bcm2835_mmc_writel(host, ier, SDHCI_SIGNAL_ENABLE, 2);
 505 +}
 506 +
 507 +
 508 +static void bcm2835_mmc_dumpregs(struct bcm2835_host *host)
 509 +{
 510 +       pr_debug(DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n",
 511 +               mmc_hostname(host->mmc));
 512 +
 513 +       pr_debug(DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
 514 +               bcm2835_mmc_readl(host, SDHCI_DMA_ADDRESS),
 515 +               bcm2835_mmc_readw(host, SDHCI_HOST_VERSION));
 516 +       pr_debug(DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
 517 +               bcm2835_mmc_readw(host, SDHCI_BLOCK_SIZE),
 518 +               bcm2835_mmc_readw(host, SDHCI_BLOCK_COUNT));
 519 +       pr_debug(DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
 520 +               bcm2835_mmc_readl(host, SDHCI_ARGUMENT),
 521 +               bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE));
 522 +       pr_debug(DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
 523 +               bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE),
 524 +               bcm2835_mmc_readb(host, SDHCI_HOST_CONTROL));
 525 +       pr_debug(DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
 526 +               bcm2835_mmc_readb(host, SDHCI_POWER_CONTROL),
 527 +               bcm2835_mmc_readb(host, SDHCI_BLOCK_GAP_CONTROL));
 528 +       pr_debug(DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
 529 +               bcm2835_mmc_readb(host, SDHCI_WAKE_UP_CONTROL),
 530 +               bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL));
 531 +       pr_debug(DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
 532 +               bcm2835_mmc_readb(host, SDHCI_TIMEOUT_CONTROL),
 533 +               bcm2835_mmc_readl(host, SDHCI_INT_STATUS));
 534 +       pr_debug(DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
 535 +               bcm2835_mmc_readl(host, SDHCI_INT_ENABLE),
 536 +               bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE));
 537 +       pr_debug(DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
 538 +               bcm2835_mmc_readw(host, SDHCI_AUTO_CMD_STATUS),
 539 +               bcm2835_mmc_readw(host, SDHCI_SLOT_INT_STATUS));
 540 +       pr_debug(DRIVER_NAME ": Caps:     0x%08x | Caps_1:   0x%08x\n",
 541 +               bcm2835_mmc_readl(host, SDHCI_CAPABILITIES),
 542 +               bcm2835_mmc_readl(host, SDHCI_CAPABILITIES_1));
 543 +       pr_debug(DRIVER_NAME ": Cmd:      0x%08x | Max curr: 0x%08x\n",
 544 +               bcm2835_mmc_readw(host, SDHCI_COMMAND),
 545 +               bcm2835_mmc_readl(host, SDHCI_MAX_CURRENT));
 546 +       pr_debug(DRIVER_NAME ": Host ctl2: 0x%08x\n",
 547 +               bcm2835_mmc_readw(host, SDHCI_HOST_CONTROL2));
 548 +
 549 +       pr_debug(DRIVER_NAME ": ===========================================\n");
 550 +}
 551 +
 552 +
 553 +static void bcm2835_mmc_reset(struct bcm2835_host *host, u8 mask)
 554 +{
 555 +       unsigned long timeout;
 556 +       unsigned long flags;
 557 +
 558 +       spin_lock_irqsave(&host->lock, flags);
 559 +       bcm2835_mmc_writeb(host, mask, SDHCI_SOFTWARE_RESET);
 560 +
 561 +       if (mask & SDHCI_RESET_ALL)
 562 +               host->clock = 0;
 563 +
 564 +       /* Wait max 100 ms */
 565 +       timeout = 100;
 566 +
 567 +       /* hw clears the bit when it's done */
 568 +       while (bcm2835_mmc_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
 569 +               if (timeout == 0) {
 570 +                       pr_err("%s: Reset 0x%x never completed.\n",
 571 +                               mmc_hostname(host->mmc), (int)mask);
 572 +                       bcm2835_mmc_dumpregs(host);
 573 +                       return;
 574 +               }
 575 +               timeout--;
 576 +               spin_unlock_irqrestore(&host->lock, flags);
 577 +               mdelay(1);
 578 +               spin_lock_irqsave(&host->lock, flags);
 579 +       }
 580 +
 581 +       if (100-timeout > 10 && 100-timeout > host->max_delay) {
 582 +               host->max_delay = 100-timeout;
 583 +               pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
 584 +       }
 585 +       spin_unlock_irqrestore(&host->lock, flags);
 586 +}
 587 +
 588 +static void bcm2835_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
 589 +
 590 +static void bcm2835_mmc_init(struct bcm2835_host *host, int soft)
 591 +{
 592 +       unsigned long flags;
 593 +       if (soft)
 594 +               bcm2835_mmc_reset(host, SDHCI_RESET_CMD|SDHCI_RESET_DATA);
 595 +       else
 596 +               bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
 597 +
 598 +       host->ier = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
 599 +                   SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT |
 600 +                   SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC |
 601 +                   SDHCI_INT_TIMEOUT | SDHCI_INT_DATA_END |
 602 +                   SDHCI_INT_RESPONSE;
 603 +
 604 +       spin_lock_irqsave(&host->lock, flags);
 605 +       bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE, 3);
 606 +       bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE, 3);
 607 +       spin_unlock_irqrestore(&host->lock, flags);
 608 +
 609 +       if (soft) {
 610 +               /* force clock reconfiguration */
 611 +               host->clock = 0;
 612 +               bcm2835_mmc_set_ios(host->mmc, &host->mmc->ios);
 613 +       }
 614 +}
 615 +
 616 +
 617 +
 618 +static void bcm2835_mmc_finish_data(struct bcm2835_host *host);
 619 +
 620 +static void bcm2835_mmc_dma_complete(void *param)
 621 +{
 622 +       struct bcm2835_host *host = param;
 623 +       struct dma_chan *dma_chan;
 624 +       unsigned long flags;
 625 +       u32 dir_data;
 626 +
 627 +       spin_lock_irqsave(&host->lock, flags);
 628 +
 629 +       host->use_dma = false;
 630 +
 631 +       if (host->data && !(host->data->flags & MMC_DATA_WRITE)) {
 632 +               /* otherwise handled in SDHCI IRQ */
 633 +               dma_chan = host->dma_chan_rxtx;
 634 +               dir_data = DMA_FROM_DEVICE;
 635 +
 636 +               dma_unmap_sg(dma_chan->device->dev,
 637 +                    host->data->sg, host->data->sg_len,
 638 +                    dir_data);
 639 +
 640 +               bcm2835_mmc_finish_data(host);
 641 +       } else if (host->wait_for_dma) {
 642 +               host->wait_for_dma = false;
 643 +               tasklet_schedule(&host->finish_tasklet);
 644 +       }
 645 +
 646 +       spin_unlock_irqrestore(&host->lock, flags);
 647 +}
 648 +
 649 +static void bcm2835_bcm2835_mmc_read_block_pio(struct bcm2835_host *host)
 650 +{
 651 +       unsigned long flags;
 652 +       size_t blksize, len, chunk;
 653 +
 654 +       u32 uninitialized_var(scratch);
 655 +       u8 *buf;
 656 +
 657 +       blksize = host->data->blksz;
 658 +       chunk = 0;
 659 +
 660 +       local_irq_save(flags);
 661 +
 662 +       while (blksize) {
 663 +               if (!sg_miter_next(&host->sg_miter))
 664 +                       BUG();
 665 +
 666 +               len = min(host->sg_miter.length, blksize);
 667 +
 668 +               blksize -= len;
 669 +               host->sg_miter.consumed = len;
 670 +
 671 +               buf = host->sg_miter.addr;
 672 +
 673 +               while (len) {
 674 +                       if (chunk == 0) {
 675 +                               scratch = bcm2835_mmc_readl(host, SDHCI_BUFFER);
 676 +                               chunk = 4;
 677 +                       }
 678 +
 679 +                       *buf = scratch & 0xFF;
 680 +
 681 +                       buf++;
 682 +                       scratch >>= 8;
 683 +                       chunk--;
 684 +                       len--;
 685 +               }
 686 +       }
 687 +
 688 +       sg_miter_stop(&host->sg_miter);
 689 +
 690 +       local_irq_restore(flags);
 691 +}
 692 +
 693 +static void bcm2835_bcm2835_mmc_write_block_pio(struct bcm2835_host *host)
 694 +{
 695 +       unsigned long flags;
 696 +       size_t blksize, len, chunk;
 697 +       u32 scratch;
 698 +       u8 *buf;
 699 +
 700 +       blksize = host->data->blksz;
 701 +       chunk = 0;
 702 +       chunk = 0;
 703 +       scratch = 0;
 704 +
 705 +       local_irq_save(flags);
 706 +
 707 +       while (blksize) {
 708 +               if (!sg_miter_next(&host->sg_miter))
 709 +                       BUG();
 710 +
 711 +               len = min(host->sg_miter.length, blksize);
 712 +
 713 +               blksize -= len;
 714 +               host->sg_miter.consumed = len;
 715 +
 716 +               buf = host->sg_miter.addr;
 717 +
 718 +               while (len) {
 719 +                       scratch |= (u32)*buf << (chunk * 8);
 720 +
 721 +                       buf++;
 722 +                       chunk++;
 723 +                       len--;
 724 +
 725 +                       if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
 726 +                               mmc_raw_writel(host, scratch, SDHCI_BUFFER);
 727 +                               chunk = 0;
 728 +                               scratch = 0;
 729 +                       }
 730 +               }
 731 +       }
 732 +
 733 +       sg_miter_stop(&host->sg_miter);
 734 +
 735 +       local_irq_restore(flags);
 736 +}
 737 +
 738 +
 739 +static void bcm2835_mmc_transfer_pio(struct bcm2835_host *host)
 740 +{
 741 +       u32 mask;
 742 +
 743 +       BUG_ON(!host->data);
 744 +
 745 +       if (host->blocks == 0)
 746 +               return;
 747 +
 748 +       if (host->data->flags & MMC_DATA_READ)
 749 +               mask = SDHCI_DATA_AVAILABLE;
 750 +       else
 751 +               mask = SDHCI_SPACE_AVAILABLE;
 752 +
 753 +       while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
 754 +
 755 +               if (host->data->flags & MMC_DATA_READ)
 756 +                       bcm2835_bcm2835_mmc_read_block_pio(host);
 757 +               else
 758 +                       bcm2835_bcm2835_mmc_write_block_pio(host);
 759 +
 760 +               host->blocks--;
 761 +
 762 +               /* QUIRK used in sdhci.c removes the 'if' */
 763 +               /* but it seems this is unnecessary */
 764 +               if (host->blocks == 0)
 765 +                       break;
 766 +
 767 +
 768 +       }
 769 +}
 770 +
 771 +
 772 +static void bcm2835_mmc_transfer_dma(struct bcm2835_host *host)
 773 +{
 774 +       u32 len, dir_data, dir_slave;
 775 +       struct dma_async_tx_descriptor *desc = NULL;
 776 +       struct dma_chan *dma_chan;
 777 +
 778 +
 779 +       WARN_ON(!host->data);
 780 +
 781 +       if (!host->data)
 782 +               return;
 783 +
 784 +       if (host->blocks == 0)
 785 +               return;
 786 +
 787 +       dma_chan = host->dma_chan_rxtx;
 788 +       if (host->data->flags & MMC_DATA_READ) {
 789 +               dir_data = DMA_FROM_DEVICE;
 790 +               dir_slave = DMA_DEV_TO_MEM;
 791 +       } else {
 792 +               dir_data = DMA_TO_DEVICE;
 793 +               dir_slave = DMA_MEM_TO_DEV;
 794 +       }
 795 +
 796 +       /* The parameters have already been validated, so this will not fail */
 797 +       (void)dmaengine_slave_config(dma_chan,
 798 +                                    (dir_data == DMA_FROM_DEVICE) ?
 799 +                                    &host->dma_cfg_rx :
 800 +                                    &host->dma_cfg_tx);
 801 +
 802 +       BUG_ON(!dma_chan->device);
 803 +       BUG_ON(!dma_chan->device->dev);
 804 +       BUG_ON(!host->data->sg);
 805 +
 806 +       len = dma_map_sg(dma_chan->device->dev, host->data->sg,
 807 +                        host->data->sg_len, dir_data);
 808 +       if (len > 0) {
 809 +               desc = dmaengine_prep_slave_sg(dma_chan, host->data->sg,
 810 +                                              len, dir_slave,
 811 +                                              DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 812 +       } else {
 813 +               dev_err(mmc_dev(host->mmc), "dma_map_sg returned zero length\n");
 814 +       }
 815 +       if (desc) {
 816 +               unsigned long flags;
 817 +               spin_lock_irqsave(&host->lock, flags);
 818 +               bcm2835_mmc_unsignal_irqs(host, SDHCI_INT_DATA_AVAIL |
 819 +                                                   SDHCI_INT_SPACE_AVAIL);
 820 +               host->tx_desc = desc;
 821 +               desc->callback = bcm2835_mmc_dma_complete;
 822 +               desc->callback_param = host;
 823 +               spin_unlock_irqrestore(&host->lock, flags);
 824 +               dmaengine_submit(desc);
 825 +               dma_async_issue_pending(dma_chan);
 826 +       }
 827 +
 828 +}
 829 +
 830 +
 831 +
 832 +static void bcm2835_mmc_set_transfer_irqs(struct bcm2835_host *host)
 833 +{
 834 +       u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
 835 +       u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;
 836 +
 837 +       if (host->use_dma)
 838 +               host->ier = (host->ier & ~pio_irqs) | dma_irqs;
 839 +       else
 840 +               host->ier = (host->ier & ~dma_irqs) | pio_irqs;
 841 +
 842 +       bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE, 4);
 843 +       bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE, 4);
 844 +}
 845 +
 846 +
 847 +static void bcm2835_mmc_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd)
 848 +{
 849 +       u8 count;
 850 +       struct mmc_data *data = cmd->data;
 851 +
 852 +       WARN_ON(host->data);
 853 +
 854 +       if (data || (cmd->flags & MMC_RSP_BUSY)) {
 855 +               count = TIMEOUT_VAL;
 856 +               bcm2835_mmc_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
 857 +       }
 858 +
 859 +       if (!data)
 860 +               return;
 861 +
 862 +       /* Sanity checks */
 863 +       BUG_ON(data->blksz * data->blocks > 524288);
 864 +       BUG_ON(data->blksz > host->mmc->max_blk_size);
 865 +       BUG_ON(data->blocks > 65535);
 866 +
 867 +       host->data = data;
 868 +       host->data_early = 0;
 869 +       host->data->bytes_xfered = 0;
 870 +
 871 +
 872 +       if (!(host->flags & SDHCI_REQ_USE_DMA)) {
 873 +               int flags;
 874 +
 875 +               flags = SG_MITER_ATOMIC;
 876 +               if (host->data->flags & MMC_DATA_READ)
 877 +                       flags |= SG_MITER_TO_SG;
 878 +               else
 879 +                       flags |= SG_MITER_FROM_SG;
 880 +               sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
 881 +               host->blocks = data->blocks;
 882 +       }
 883 +
 884 +       host->use_dma = host->have_dma && data->blocks > PIO_DMA_BARRIER;
 885 +
 886 +       bcm2835_mmc_set_transfer_irqs(host);
 887 +
 888 +       /* Set the DMA boundary value and block size */
 889 +       bcm2835_mmc_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
 890 +               data->blksz), SDHCI_BLOCK_SIZE);
 891 +       bcm2835_mmc_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
 892 +
 893 +       BUG_ON(!host->data);
 894 +}
 895 +
 896 +static void bcm2835_mmc_set_transfer_mode(struct bcm2835_host *host,
 897 +       struct mmc_command *cmd)
 898 +{
 899 +       u16 mode;
 900 +       struct mmc_data *data = cmd->data;
 901 +
 902 +       if (data == NULL) {
 903 +               /* clear Auto CMD settings for no data CMDs */
 904 +               mode = bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE);
 905 +               bcm2835_mmc_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
 906 +                               SDHCI_TRNS_AUTO_CMD23), SDHCI_TRANSFER_MODE);
 907 +               return;
 908 +       }
 909 +
 910 +       WARN_ON(!host->data);
 911 +
 912 +       mode = SDHCI_TRNS_BLK_CNT_EN;
 913 +
 914 +       if ((mmc_op_multi(cmd->opcode) || data->blocks > 1)) {
 915 +               mode |= SDHCI_TRNS_MULTI;
 916 +
 917 +               /*
 918 +                * If we are sending CMD23, CMD12 never gets sent
 919 +                * on successful completion (so no Auto-CMD12).
 920 +                */
 921 +               if (!host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD12))
 922 +                       mode |= SDHCI_TRNS_AUTO_CMD12;
 923 +               else if (host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) {
 924 +                       mode |= SDHCI_TRNS_AUTO_CMD23;
 925 +                       bcm2835_mmc_writel(host, host->mrq->sbc->arg, SDHCI_ARGUMENT2, 5);
 926 +               }
 927 +       }
 928 +
 929 +       if (data->flags & MMC_DATA_READ)
 930 +               mode |= SDHCI_TRNS_READ;
 931 +       if (host->flags & SDHCI_REQ_USE_DMA)
 932 +               mode |= SDHCI_TRNS_DMA;
 933 +
 934 +       bcm2835_mmc_writew(host, mode, SDHCI_TRANSFER_MODE);
 935 +}
 936 +
 937 +void bcm2835_mmc_send_command(struct bcm2835_host *host, struct mmc_command *cmd)
 938 +{
 939 +       int flags;
 940 +       u32 mask;
 941 +       unsigned long timeout;
 942 +
 943 +       WARN_ON(host->cmd);
 944 +
 945 +       /* Wait max 10 ms */
 946 +       timeout = 1000;
 947 +
 948 +       mask = SDHCI_CMD_INHIBIT;
 949 +       if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
 950 +               mask |= SDHCI_DATA_INHIBIT;
 951 +
 952 +       /* We shouldn't wait for data inihibit for stop commands, even
 953 +          though they might use busy signaling */
 954 +       if (host->mrq->data && (cmd == host->mrq->data->stop))
 955 +               mask &= ~SDHCI_DATA_INHIBIT;
 956 +
 957 +       while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
 958 +               if (timeout == 0) {
 959 +                       pr_err("%s: Controller never released inhibit bit(s).\n",
 960 +                               mmc_hostname(host->mmc));
 961 +                       bcm2835_mmc_dumpregs(host);
 962 +                       cmd->error = -EIO;
 963 +                       tasklet_schedule(&host->finish_tasklet);
 964 +                       return;
 965 +               }
 966 +               timeout--;
 967 +               udelay(10);
 968 +       }
 969 +
 970 +       if ((1000-timeout)/100 > 1 && (1000-timeout)/100 > host->max_delay) {
 971 +               host->max_delay = (1000-timeout)/100;
 972 +               pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
 973 +       }
 974 +
 975 +       timeout = jiffies;
 976 +       if (!cmd->data && cmd->busy_timeout > 9000)
 977 +               timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ;
 978 +       else
 979 +               timeout += 10 * HZ;
 980 +       mod_timer(&host->timer, timeout);
 981 +
 982 +       host->cmd = cmd;
 983 +       host->use_dma = false;
 984 +
 985 +       bcm2835_mmc_prepare_data(host, cmd);
 986 +
 987 +       bcm2835_mmc_writel(host, cmd->arg, SDHCI_ARGUMENT, 6);
 988 +
 989 +       bcm2835_mmc_set_transfer_mode(host, cmd);
 990 +
 991 +       if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 992 +               pr_err("%s: Unsupported response type!\n",
 993 +                       mmc_hostname(host->mmc));
 994 +               cmd->error = -EINVAL;
 995 +               tasklet_schedule(&host->finish_tasklet);
 996 +               return;
 997 +       }
 998 +
 999 +       if (!(cmd->flags & MMC_RSP_PRESENT))
1000 +               flags = SDHCI_CMD_RESP_NONE;
1001 +       else if (cmd->flags & MMC_RSP_136)
1002 +               flags = SDHCI_CMD_RESP_LONG;
1003 +       else if (cmd->flags & MMC_RSP_BUSY)
1004 +               flags = SDHCI_CMD_RESP_SHORT_BUSY;
1005 +       else
1006 +               flags = SDHCI_CMD_RESP_SHORT;
1007 +
1008 +       if (cmd->flags & MMC_RSP_CRC)
1009 +               flags |= SDHCI_CMD_CRC;
1010 +       if (cmd->flags & MMC_RSP_OPCODE)
1011 +               flags |= SDHCI_CMD_INDEX;
1012 +
1013 +       if (cmd->data)
1014 +               flags |= SDHCI_CMD_DATA;
1015 +
1016 +       bcm2835_mmc_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
1017 +}
1018 +
1019 +
1020 +static void bcm2835_mmc_finish_data(struct bcm2835_host *host)
1021 +{
1022 +       struct mmc_data *data;
1023 +
1024 +       BUG_ON(!host->data);
1025 +
1026 +       data = host->data;
1027 +       host->data = NULL;
1028 +
1029 +       if (data->error)
1030 +               data->bytes_xfered = 0;
1031 +       else
1032 +               data->bytes_xfered = data->blksz * data->blocks;
1033 +
1034 +       /*
1035 +        * Need to send CMD12 if -
1036 +        * a) open-ended multiblock transfer (no CMD23)
1037 +        * b) error in multiblock transfer
1038 +        */
1039 +       if (data->stop &&
1040 +           (data->error ||
1041 +            !host->mrq->sbc)) {
1042 +
1043 +               /*
1044 +                * The controller needs a reset of internal state machines
1045 +                * upon error conditions.
1046 +                */
1047 +               if (data->error) {
1048 +                       bcm2835_mmc_reset(host, SDHCI_RESET_CMD);
1049 +                       bcm2835_mmc_reset(host, SDHCI_RESET_DATA);
1050 +               }
1051 +
1052 +               bcm2835_mmc_send_command(host, data->stop);
1053 +       } else if (host->use_dma) {
1054 +               host->wait_for_dma = true;
1055 +       } else {
1056 +               tasklet_schedule(&host->finish_tasklet);
1057 +       }
1058 +}
1059 +
1060 +static void bcm2835_mmc_finish_command(struct bcm2835_host *host)
1061 +{
1062 +       int i;
1063 +
1064 +       BUG_ON(host->cmd == NULL);
1065 +
1066 +       if (host->cmd->flags & MMC_RSP_PRESENT) {
1067 +               if (host->cmd->flags & MMC_RSP_136) {
1068 +                       /* CRC is stripped so we need to do some shifting. */
1069 +                       for (i = 0; i < 4; i++) {
1070 +                               host->cmd->resp[i] = bcm2835_mmc_readl(host,
1071 +                                       SDHCI_RESPONSE + (3-i)*4) << 8;
1072 +                               if (i != 3)
1073 +                                       host->cmd->resp[i] |=
1074 +                                               bcm2835_mmc_readb(host,
1075 +                                               SDHCI_RESPONSE + (3-i)*4-1);
1076 +                       }
1077 +               } else {
1078 +                       host->cmd->resp[0] = bcm2835_mmc_readl(host, SDHCI_RESPONSE);
1079 +               }
1080 +       }
1081 +
1082 +       host->cmd->error = 0;
1083 +
1084 +       /* Finished CMD23, now send actual command. */
1085 +       if (host->cmd == host->mrq->sbc) {
1086 +               host->cmd = NULL;
1087 +               bcm2835_mmc_send_command(host, host->mrq->cmd);
1088 +
1089 +               if (host->mrq->cmd->data && host->use_dma) {
1090 +                       /* DMA transfer starts now, PIO starts after interrupt */
1091 +                       bcm2835_mmc_transfer_dma(host);
1092 +               }
1093 +       } else {
1094 +
1095 +               /* Processed actual command. */
1096 +               if (host->data && host->data_early)
1097 +                       bcm2835_mmc_finish_data(host);
1098 +
1099 +               if (!host->cmd->data)
1100 +                       tasklet_schedule(&host->finish_tasklet);
1101 +
1102 +               host->cmd = NULL;
1103 +       }
1104 +}
1105 +
1106 +
1107 +static void bcm2835_mmc_timeout_timer(struct timer_list *t)
1108 +{
1109 +       struct bcm2835_host *host = from_timer(host, t, timer);
1110 +       unsigned long flags;
1111 +
1112 +       spin_lock_irqsave(&host->lock, flags);
1113 +
1114 +       if (host->mrq) {
1115 +               pr_err("%s: Timeout waiting for hardware interrupt.\n",
1116 +                       mmc_hostname(host->mmc));
1117 +               bcm2835_mmc_dumpregs(host);
1118 +
1119 +               if (host->data) {
1120 +                       host->data->error = -ETIMEDOUT;
1121 +                       bcm2835_mmc_finish_data(host);
1122 +               } else {
1123 +                       if (host->cmd)
1124 +                               host->cmd->error = -ETIMEDOUT;
1125 +                       else
1126 +                               host->mrq->cmd->error = -ETIMEDOUT;
1127 +
1128 +                       tasklet_schedule(&host->finish_tasklet);
1129 +               }
1130 +       }
1131 +
1132 +       mmiowb();
1133 +       spin_unlock_irqrestore(&host->lock, flags);
1134 +}
1135 +
1136 +
1137 +static void bcm2835_mmc_enable_sdio_irq_nolock(struct bcm2835_host *host, int enable)
1138 +{
1139 +       if (!(host->flags & SDHCI_DEVICE_DEAD)) {
1140 +               if (enable)
1141 +                       host->ier |= SDHCI_INT_CARD_INT;
1142 +               else
1143 +                       host->ier &= ~SDHCI_INT_CARD_INT;
1144 +
1145 +               bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE, 7);
1146 +               bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE, 7);
1147 +               mmiowb();
1148 +       }
1149 +}
1150 +
1151 +static void bcm2835_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
1152 +{
1153 +       struct bcm2835_host *host = mmc_priv(mmc);
1154 +       unsigned long flags;
1155 +
1156 +       spin_lock_irqsave(&host->lock, flags);
1157 +       if (enable)
1158 +               host->flags |= SDHCI_SDIO_IRQ_ENABLED;
1159 +       else
1160 +               host->flags &= ~SDHCI_SDIO_IRQ_ENABLED;
1161 +
1162 +       bcm2835_mmc_enable_sdio_irq_nolock(host, enable);
1163 +       spin_unlock_irqrestore(&host->lock, flags);
1164 +}
1165 +
1166 +static void bcm2835_mmc_cmd_irq(struct bcm2835_host *host, u32 intmask)
1167 +{
1168 +
1169 +       BUG_ON(intmask == 0);
1170 +
1171 +       if (!host->cmd) {
1172 +               pr_err("%s: Got command interrupt 0x%08x even "
1173 +                       "though no command operation was in progress.\n",
1174 +                       mmc_hostname(host->mmc), (unsigned)intmask);
1175 +               bcm2835_mmc_dumpregs(host);
1176 +               return;
1177 +       }
1178 +
1179 +       if (intmask & SDHCI_INT_TIMEOUT)
1180 +               host->cmd->error = -ETIMEDOUT;
1181 +       else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
1182 +                       SDHCI_INT_INDEX)) {
1183 +                       host->cmd->error = -EILSEQ;
1184 +       }
1185 +
1186 +       if (host->cmd->error) {
1187 +               tasklet_schedule(&host->finish_tasklet);
1188 +               return;
1189 +       }
1190 +
1191 +       if (intmask & SDHCI_INT_RESPONSE)
1192 +               bcm2835_mmc_finish_command(host);
1193 +
1194 +}
1195 +
1196 +static void bcm2835_mmc_data_irq(struct bcm2835_host *host, u32 intmask)
1197 +{
1198 +       struct dma_chan *dma_chan;
1199 +       u32 dir_data;
1200 +
1201 +       BUG_ON(intmask == 0);
1202 +
1203 +       if (!host->data) {
1204 +               /*
1205 +                * The "data complete" interrupt is also used to
1206 +                * indicate that a busy state has ended. See comment
1207 +                * above in sdhci_cmd_irq().
1208 +                */
1209 +               if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
1210 +                       if (intmask & SDHCI_INT_DATA_END) {
1211 +                               bcm2835_mmc_finish_command(host);
1212 +                               return;
1213 +                       }
1214 +               }
1215 +
1216 +               pr_debug("%s: Got data interrupt 0x%08x even "
1217 +                       "though no data operation was in progress.\n",
1218 +                       mmc_hostname(host->mmc), (unsigned)intmask);
1219 +               bcm2835_mmc_dumpregs(host);
1220 +
1221 +               return;
1222 +       }
1223 +
1224 +       if (intmask & SDHCI_INT_DATA_TIMEOUT)
1225 +               host->data->error = -ETIMEDOUT;
1226 +       else if (intmask & SDHCI_INT_DATA_END_BIT)
1227 +               host->data->error = -EILSEQ;
1228 +       else if ((intmask & SDHCI_INT_DATA_CRC) &&
1229 +               SDHCI_GET_CMD(bcm2835_mmc_readw(host, SDHCI_COMMAND))
1230 +                       != MMC_BUS_TEST_R)
1231 +               host->data->error = -EILSEQ;
1232 +
1233 +       if (host->use_dma) {
1234 +               if  (host->data->flags & MMC_DATA_WRITE) {
1235 +                       /* IRQ handled here */
1236 +
1237 +                       dma_chan = host->dma_chan_rxtx;
1238 +                       dir_data = DMA_TO_DEVICE;
1239 +                       dma_unmap_sg(dma_chan->device->dev,
1240 +                                host->data->sg, host->data->sg_len,
1241 +                                dir_data);
1242 +
1243 +                       bcm2835_mmc_finish_data(host);
1244 +               }
1245 +
1246 +       } else {
1247 +               if (host->data->error)
1248 +                       bcm2835_mmc_finish_data(host);
1249 +               else {
1250 +                       if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1251 +                               bcm2835_mmc_transfer_pio(host);
1252 +
1253 +                       if (intmask & SDHCI_INT_DATA_END) {
1254 +                               if (host->cmd) {
1255 +                                       /*
1256 +                                        * Data managed to finish before the
1257 +                                        * command completed. Make sure we do
1258 +                                        * things in the proper order.
1259 +                                        */
1260 +                                       host->data_early = 1;
1261 +                               } else {
1262 +                                       bcm2835_mmc_finish_data(host);
1263 +                               }
1264 +                       }
1265 +               }
1266 +       }
1267 +}
1268 +
1269 +
1270 +static irqreturn_t bcm2835_mmc_irq(int irq, void *dev_id)
1271 +{
1272 +       irqreturn_t result = IRQ_NONE;
1273 +       struct bcm2835_host *host = dev_id;
1274 +       u32 intmask, mask, unexpected = 0;
1275 +       int max_loops = 16;
1276 +
1277 +       spin_lock(&host->lock);
1278 +
1279 +       intmask = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1280 +
1281 +       if (!intmask || intmask == 0xffffffff) {
1282 +               result = IRQ_NONE;
1283 +               goto out;
1284 +       }
1285 +
1286 +       do {
1287 +               /* Clear selected interrupts. */
1288 +               mask = intmask & (SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK |
1289 +                                 SDHCI_INT_BUS_POWER);
1290 +               bcm2835_mmc_writel(host, mask, SDHCI_INT_STATUS, 8);
1291 +
1292 +
1293 +               if (intmask & SDHCI_INT_CMD_MASK)
1294 +                       bcm2835_mmc_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1295 +
1296 +               if (intmask & SDHCI_INT_DATA_MASK)
1297 +                       bcm2835_mmc_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1298 +
1299 +               if (intmask & SDHCI_INT_BUS_POWER)
1300 +                       pr_err("%s: Card is consuming too much power!\n",
1301 +                               mmc_hostname(host->mmc));
1302 +
1303 +               if (intmask & SDHCI_INT_CARD_INT) {
1304 +                       bcm2835_mmc_enable_sdio_irq_nolock(host, false);
1305 +                       host->thread_isr |= SDHCI_INT_CARD_INT;
1306 +                       result = IRQ_WAKE_THREAD;
1307 +               }
1308 +
1309 +               intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE |
1310 +                            SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK |
1311 +                            SDHCI_INT_ERROR | SDHCI_INT_BUS_POWER |
1312 +                            SDHCI_INT_CARD_INT);
1313 +
1314 +               if (intmask) {
1315 +                       unexpected |= intmask;
1316 +                       bcm2835_mmc_writel(host, intmask, SDHCI_INT_STATUS, 9);
1317 +               }
1318 +
1319 +               if (result == IRQ_NONE)
1320 +                       result = IRQ_HANDLED;
1321 +
1322 +               intmask = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1323 +       } while (intmask && --max_loops);
1324 +out:
1325 +       spin_unlock(&host->lock);
1326 +
1327 +       if (unexpected) {
1328 +               pr_err("%s: Unexpected interrupt 0x%08x.\n",
1329 +                          mmc_hostname(host->mmc), unexpected);
1330 +               bcm2835_mmc_dumpregs(host);
1331 +       }
1332 +
1333 +       return result;
1334 +}
1335 +
1336 +static irqreturn_t bcm2835_mmc_thread_irq(int irq, void *dev_id)
1337 +{
1338 +       struct bcm2835_host *host = dev_id;
1339 +       unsigned long flags;
1340 +       u32 isr;
1341 +
1342 +       spin_lock_irqsave(&host->lock, flags);
1343 +       isr = host->thread_isr;
1344 +       host->thread_isr = 0;
1345 +       spin_unlock_irqrestore(&host->lock, flags);
1346 +
1347 +       if (isr & SDHCI_INT_CARD_INT) {
1348 +               sdio_run_irqs(host->mmc);
1349 +
1350 +               spin_lock_irqsave(&host->lock, flags);
1351 +               if (host->flags & SDHCI_SDIO_IRQ_ENABLED)
1352 +                       bcm2835_mmc_enable_sdio_irq_nolock(host, true);
1353 +               spin_unlock_irqrestore(&host->lock, flags);
1354 +       }
1355 +
1356 +       return isr ? IRQ_HANDLED : IRQ_NONE;
1357 +}
1358 +
1359 +
1360 +
1361 +void bcm2835_mmc_set_clock(struct bcm2835_host *host, unsigned int clock)
1362 +{
1363 +       int div = 0; /* Initialized for compiler warning */
1364 +       int real_div = div, clk_mul = 1;
1365 +       u16 clk = 0;
1366 +       unsigned long timeout;
1367 +       unsigned int input_clock = clock;
1368 +
1369 +       if (host->overclock_50 && (clock == 50000000))
1370 +               clock = host->overclock_50 * 1000000 + 999999;
1371 +
1372 +       host->mmc->actual_clock = 0;
1373 +
1374 +       bcm2835_mmc_writew(host, 0, SDHCI_CLOCK_CONTROL);
1375 +
1376 +       if (clock == 0)
1377 +               return;
1378 +
1379 +       /* Version 3.00 divisors must be a multiple of 2. */
1380 +       if (host->max_clk <= clock)
1381 +               div = 1;
1382 +       else {
1383 +               for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
1384 +                        div += 2) {
1385 +                       if ((host->max_clk / div) <= clock)
1386 +                               break;
1387 +               }
1388 +       }
1389 +
1390 +       real_div = div;
1391 +       div >>= 1;
1392 +
1393 +       if (real_div)
1394 +               clock = (host->max_clk * clk_mul) / real_div;
1395 +       host->mmc->actual_clock = clock;
1396 +
1397 +       if ((clock > input_clock) && (clock > host->max_overclock)) {
1398 +               pr_warn("%s: Overclocking to %dHz\n",
1399 +                       mmc_hostname(host->mmc), clock);
1400 +               host->max_overclock = clock;
1401 +       }
1402 +
1403 +       clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
1404 +       clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
1405 +               << SDHCI_DIVIDER_HI_SHIFT;
1406 +       clk |= SDHCI_CLOCK_INT_EN;
1407 +       bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1408 +
1409 +       /* Wait max 20 ms */
1410 +       timeout = 20;
1411 +       while (!((clk = bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL))
1412 +               & SDHCI_CLOCK_INT_STABLE)) {
1413 +               if (timeout == 0) {
1414 +                       pr_err("%s: Internal clock never "
1415 +                               "stabilised.\n", mmc_hostname(host->mmc));
1416 +                       bcm2835_mmc_dumpregs(host);
1417 +                       return;
1418 +               }
1419 +               timeout--;
1420 +               mdelay(1);
1421 +       }
1422 +
1423 +       if (20-timeout > 10 && 20-timeout > host->max_delay) {
1424 +               host->max_delay = 20-timeout;
1425 +               pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
1426 +       }
1427 +
1428 +       clk |= SDHCI_CLOCK_CARD_EN;
1429 +       bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1430 +}
1431 +
1432 +static void bcm2835_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
1433 +{
1434 +       struct bcm2835_host *host;
1435 +       unsigned long flags;
1436 +
1437 +       host = mmc_priv(mmc);
1438 +
1439 +       spin_lock_irqsave(&host->lock, flags);
1440 +
1441 +       WARN_ON(host->mrq != NULL);
1442 +
1443 +       host->mrq = mrq;
1444 +
1445 +       if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23))
1446 +               bcm2835_mmc_send_command(host, mrq->sbc);
1447 +       else
1448 +               bcm2835_mmc_send_command(host, mrq->cmd);
1449 +
1450 +       mmiowb();
1451 +       spin_unlock_irqrestore(&host->lock, flags);
1452 +
1453 +       if (!(mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) && mrq->cmd->data && host->use_dma) {
1454 +               /* DMA transfer starts now, PIO starts after interrupt */
1455 +               bcm2835_mmc_transfer_dma(host);
1456 +       }
1457 +}
1458 +
1459 +
1460 +static void bcm2835_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1461 +{
1462 +
1463 +       struct bcm2835_host *host = mmc_priv(mmc);
1464 +       unsigned long flags;
1465 +       u8 ctrl;
1466 +       u16 clk, ctrl_2;
1467 +
1468 +       pr_debug("bcm2835_mmc_set_ios: clock %d, pwr %d, bus_width %d, timing %d, vdd %d, drv_type %d\n",
1469 +                ios->clock, ios->power_mode, ios->bus_width,
1470 +                ios->timing, ios->signal_voltage, ios->drv_type);
1471 +
1472 +       spin_lock_irqsave(&host->lock, flags);
1473 +
1474 +       if (!ios->clock || ios->clock != host->clock) {
1475 +               bcm2835_mmc_set_clock(host, ios->clock);
1476 +               host->clock = ios->clock;
1477 +       }
1478 +
1479 +       if (host->pwr != SDHCI_POWER_330) {
1480 +               host->pwr = SDHCI_POWER_330;
1481 +               bcm2835_mmc_writeb(host, SDHCI_POWER_330 | SDHCI_POWER_ON, SDHCI_POWER_CONTROL);
1482 +       }
1483 +
1484 +       ctrl = bcm2835_mmc_readb(host, SDHCI_HOST_CONTROL);
1485 +
1486 +       /* set bus width */
1487 +       ctrl &= ~SDHCI_CTRL_8BITBUS;
1488 +       if (ios->bus_width == MMC_BUS_WIDTH_4)
1489 +               ctrl |= SDHCI_CTRL_4BITBUS;
1490 +       else
1491 +               ctrl &= ~SDHCI_CTRL_4BITBUS;
1492 +
1493 +       ctrl &= ~SDHCI_CTRL_HISPD; /* NO_HISPD_BIT */
1494 +
1495 +
1496 +       bcm2835_mmc_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1497 +       /*
1498 +        * We only need to set Driver Strength if the
1499 +        * preset value enable is not set.
1500 +        */
1501 +       ctrl_2 = bcm2835_mmc_readw(host, SDHCI_HOST_CONTROL2);
1502 +       ctrl_2 &= ~SDHCI_CTRL_DRV_TYPE_MASK;
1503 +       if (ios->drv_type == MMC_SET_DRIVER_TYPE_A)
1504 +               ctrl_2 |= SDHCI_CTRL_DRV_TYPE_A;
1505 +       else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C)
1506 +               ctrl_2 |= SDHCI_CTRL_DRV_TYPE_C;
1507 +
1508 +       bcm2835_mmc_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
1509 +
1510 +       /* Reset SD Clock Enable */
1511 +       clk = bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL);
1512 +       clk &= ~SDHCI_CLOCK_CARD_EN;
1513 +       bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1514 +
1515 +       /* Re-enable SD Clock */
1516 +       bcm2835_mmc_set_clock(host, host->clock);
1517 +       bcm2835_mmc_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1518 +
1519 +       mmiowb();
1520 +
1521 +       spin_unlock_irqrestore(&host->lock, flags);
1522 +}
1523 +
1524 +
1525 +static struct mmc_host_ops bcm2835_ops = {
1526 +       .request = bcm2835_mmc_request,
1527 +       .set_ios = bcm2835_mmc_set_ios,
1528 +       .enable_sdio_irq = bcm2835_mmc_enable_sdio_irq,
1529 +};
1530 +
1531 +
1532 +static void bcm2835_mmc_tasklet_finish(unsigned long param)
1533 +{
1534 +       struct bcm2835_host *host;
1535 +       unsigned long flags;
1536 +       struct mmc_request *mrq;
1537 +
1538 +       host = (struct bcm2835_host *)param;
1539 +
1540 +       spin_lock_irqsave(&host->lock, flags);
1541 +
1542 +       /*
1543 +        * If this tasklet gets rescheduled while running, it will
1544 +        * be run again afterwards but without any active request.
1545 +        */
1546 +       if (!host->mrq) {
1547 +               spin_unlock_irqrestore(&host->lock, flags);
1548 +               return;
1549 +       }
1550 +
1551 +       del_timer(&host->timer);
1552 +
1553 +       mrq = host->mrq;
1554 +
1555 +       /*
1556 +        * The controller needs a reset of internal state machines
1557 +        * upon error conditions.
1558 +        */
1559 +       if (!(host->flags & SDHCI_DEVICE_DEAD) &&
1560 +           ((mrq->cmd && mrq->cmd->error) ||
1561 +                (mrq->data && (mrq->data->error ||
1562 +                 (mrq->data->stop && mrq->data->stop->error))))) {
1563 +
1564 +               spin_unlock_irqrestore(&host->lock, flags);
1565 +               bcm2835_mmc_reset(host, SDHCI_RESET_CMD);
1566 +               bcm2835_mmc_reset(host, SDHCI_RESET_DATA);
1567 +               spin_lock_irqsave(&host->lock, flags);
1568 +       }
1569 +
1570 +       host->mrq = NULL;
1571 +       host->cmd = NULL;
1572 +       host->data = NULL;
1573 +
1574 +       mmiowb();
1575 +
1576 +       spin_unlock_irqrestore(&host->lock, flags);
1577 +       mmc_request_done(host->mmc, mrq);
1578 +}
1579 +
1580 +
1581 +
1582 +static int bcm2835_mmc_add_host(struct bcm2835_host *host)
1583 +{
1584 +       struct mmc_host *mmc = host->mmc;
1585 +       struct device *dev = mmc->parent;
1586 +#ifndef FORCE_PIO
1587 +       struct dma_slave_config cfg;
1588 +#endif
1589 +       int ret;
1590 +
1591 +       bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
1592 +
1593 +       host->clk_mul = 0;
1594 +
1595 +       if (!mmc->f_max || mmc->f_max > host->max_clk)
1596 +               mmc->f_max = host->max_clk;
1597 +       mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
1598 +
1599 +       /* SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK */
1600 +       host->timeout_clk = mmc->f_max / 1000;
1601 +       mmc->max_busy_timeout = (1 << 27) / host->timeout_clk;
1602 +
1603 +       /* host controller capabilities */
1604 +       mmc->caps |= MMC_CAP_CMD23 | MMC_CAP_ERASE | MMC_CAP_NEEDS_POLL |
1605 +               MMC_CAP_SDIO_IRQ | MMC_CAP_SD_HIGHSPEED |
1606 +               MMC_CAP_MMC_HIGHSPEED;
1607 +
1608 +       mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
1609 +
1610 +       host->flags = SDHCI_AUTO_CMD23;
1611 +
1612 +       dev_info(dev, "mmc_debug:%x mmc_debug2:%x\n", mmc_debug, mmc_debug2);
1613 +#ifdef FORCE_PIO
1614 +       dev_info(dev, "Forcing PIO mode\n");
1615 +       host->have_dma = false;
1616 +#else
1617 +       if (IS_ERR_OR_NULL(host->dma_chan_rxtx)) {
1618 +               dev_err(dev, "%s: Unable to initialise DMA channel. Falling back to PIO\n",
1619 +                       DRIVER_NAME);
1620 +               host->have_dma = false;
1621 +       } else {
1622 +               dev_info(dev, "DMA channel allocated");
1623 +
1624 +               cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1625 +               cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1626 +               cfg.slave_id = 11;              /* DREQ channel */
1627 +
1628 +               /* Validate the slave configurations */
1629 +
1630 +               cfg.direction = DMA_MEM_TO_DEV;
1631 +               cfg.src_addr = 0;
1632 +               cfg.dst_addr = host->bus_addr + SDHCI_BUFFER;
1633 +
1634 +               ret = dmaengine_slave_config(host->dma_chan_rxtx, &cfg);
1635 +
1636 +               if (ret == 0) {
1637 +                       host->dma_cfg_tx = cfg;
1638 +
1639 +                       cfg.direction = DMA_DEV_TO_MEM;
1640 +                       cfg.src_addr = host->bus_addr + SDHCI_BUFFER;
1641 +                       cfg.dst_addr = 0;
1642 +
1643 +                       ret = dmaengine_slave_config(host->dma_chan_rxtx, &cfg);
1644 +               }
1645 +
1646 +               if (ret == 0) {
1647 +                       host->dma_cfg_rx = cfg;
1648 +
1649 +                       host->have_dma = true;
1650 +               } else {
1651 +                       pr_err("%s: unable to configure DMA channel. "
1652 +                              "Falling back to PIO\n",
1653 +                              mmc_hostname(mmc));
1654 +                       dma_release_channel(host->dma_chan_rxtx);
1655 +                       host->dma_chan_rxtx = NULL;
1656 +                       host->have_dma = false;
1657 +               }
1658 +       }
1659 +#endif
1660 +       mmc->max_segs = 128;
1661 +       mmc->max_req_size = 524288;
1662 +       mmc->max_seg_size = mmc->max_req_size;
1663 +       mmc->max_blk_size = 512;
1664 +       mmc->max_blk_count =  65535;
1665 +
1666 +       /* report supported voltage ranges */
1667 +       mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1668 +
1669 +       tasklet_init(&host->finish_tasklet,
1670 +               bcm2835_mmc_tasklet_finish, (unsigned long)host);
1671 +
1672 +       timer_setup(&host->timer, bcm2835_mmc_timeout_timer, 0);
1673 +       init_waitqueue_head(&host->buf_ready_int);
1674 +
1675 +       bcm2835_mmc_init(host, 0);
1676 +       ret = devm_request_threaded_irq(dev, host->irq, bcm2835_mmc_irq,
1677 +                                       bcm2835_mmc_thread_irq, IRQF_SHARED,
1678 +                                       mmc_hostname(mmc), host);
1679 +       if (ret) {
1680 +               dev_err(dev, "Failed to request IRQ %d: %d\n", host->irq, ret);
1681 +               goto untasklet;
1682 +       }
1683 +
1684 +       mmiowb();
1685 +       mmc_add_host(mmc);
1686 +
1687 +       return 0;
1688 +
1689 +untasklet:
1690 +       tasklet_kill(&host->finish_tasklet);
1691 +
1692 +       return ret;
1693 +}
1694 +
1695 +static int bcm2835_mmc_probe(struct platform_device *pdev)
1696 +{
1697 +       struct device *dev = &pdev->dev;
1698 +       struct device_node *node = dev->of_node;
1699 +       struct clk *clk;
1700 +       struct resource *iomem;
1701 +       struct bcm2835_host *host;
1702 +       struct mmc_host *mmc;
1703 +       const __be32 *addr;
1704 +       int ret;
1705 +
1706 +       mmc = mmc_alloc_host(sizeof(*host), dev);
1707 +       if (!mmc)
1708 +               return -ENOMEM;
1709 +
1710 +       mmc->ops = &bcm2835_ops;
1711 +       host = mmc_priv(mmc);
1712 +       host->mmc = mmc;
1713 +       host->timeout = msecs_to_jiffies(1000);
1714 +       spin_lock_init(&host->lock);
1715 +
1716 +       iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1717 +       host->ioaddr = devm_ioremap_resource(dev, iomem);
1718 +       if (IS_ERR(host->ioaddr)) {
1719 +               ret = PTR_ERR(host->ioaddr);
1720 +               goto err;
1721 +       }
1722 +
1723 +       addr = of_get_address(node, 0, NULL, NULL);
1724 +       if (!addr) {
1725 +               dev_err(dev, "could not get DMA-register address\n");
1726 +               return -ENODEV;
1727 +       }
1728 +       host->bus_addr = be32_to_cpup(addr);
1729 +       pr_debug(" - ioaddr %lx, iomem->start %lx, bus_addr %lx\n",
1730 +                (unsigned long)host->ioaddr,
1731 +                (unsigned long)iomem->start,
1732 +                (unsigned long)host->bus_addr);
1733 +
1734 +#ifndef FORCE_PIO
1735 +       if (node) {
1736 +               host->dma_chan_rxtx = dma_request_slave_channel(dev, "rx-tx");
1737 +               if (!host->dma_chan_rxtx)
1738 +                       host->dma_chan_rxtx =
1739 +                               dma_request_slave_channel(dev, "tx");
1740 +               if (!host->dma_chan_rxtx)
1741 +                       host->dma_chan_rxtx =
1742 +                               dma_request_slave_channel(dev, "rx");
1743 +       } else {
1744 +               dma_cap_mask_t mask;
1745 +
1746 +               dma_cap_zero(mask);
1747 +               /* we don't care about the channel, any would work */
1748 +               dma_cap_set(DMA_SLAVE, mask);
1749 +               host->dma_chan_rxtx = dma_request_channel(mask, NULL, NULL);
1750 +       }
1751 +#endif
1752 +       clk = devm_clk_get(dev, NULL);
1753 +       if (IS_ERR(clk)) {
1754 +               ret = PTR_ERR(clk);
1755 +               if (ret == -EPROBE_DEFER)
1756 +                       dev_info(dev, "could not get clk, deferring probe\n");
1757 +               else
1758 +                       dev_err(dev, "could not get clk\n");
1759 +               goto err;
1760 +       }
1761 +
1762 +       host->max_clk = clk_get_rate(clk);
1763 +
1764 +       host->irq = platform_get_irq(pdev, 0);
1765 +       if (host->irq <= 0) {
1766 +               dev_err(dev, "get IRQ failed\n");
1767 +               ret = -EINVAL;
1768 +               goto err;
1769 +       }
1770 +
1771 +       if (node) {
1772 +               mmc_of_parse(mmc);
1773 +
1774 +               /* Read any custom properties */
1775 +               of_property_read_u32(node,
1776 +                                    "brcm,overclock-50",
1777 +                                    &host->overclock_50);
1778 +       } else {
1779 +               mmc->caps |= MMC_CAP_4_BIT_DATA;
1780 +       }
1781 +
1782 +       ret = bcm2835_mmc_add_host(host);
1783 +       if (ret)
1784 +               goto err;
1785 +
1786 +       platform_set_drvdata(pdev, host);
1787 +
1788 +       return 0;
1789 +err:
1790 +       mmc_free_host(mmc);
1791 +
1792 +       return ret;
1793 +}
1794 +
1795 +static int bcm2835_mmc_remove(struct platform_device *pdev)
1796 +{
1797 +       struct bcm2835_host *host = platform_get_drvdata(pdev);
1798 +       unsigned long flags;
1799 +       int dead;
1800 +       u32 scratch;
1801 +
1802 +       dead = 0;
1803 +       scratch = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1804 +       if (scratch == (u32)-1)
1805 +               dead = 1;
1806 +
1807 +
1808 +       if (dead) {
1809 +               spin_lock_irqsave(&host->lock, flags);
1810 +
1811 +               host->flags |= SDHCI_DEVICE_DEAD;
1812 +
1813 +               if (host->mrq) {
1814 +                       pr_err("%s: Controller removed during "
1815 +                               " transfer!\n", mmc_hostname(host->mmc));
1816 +
1817 +                       host->mrq->cmd->error = -ENOMEDIUM;
1818 +                       tasklet_schedule(&host->finish_tasklet);
1819 +               }
1820 +
1821 +               spin_unlock_irqrestore(&host->lock, flags);
1822 +       }
1823 +
1824 +       mmc_remove_host(host->mmc);
1825 +
1826 +       if (!dead)
1827 +               bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
1828 +
1829 +       free_irq(host->irq, host);
1830 +
1831 +       del_timer_sync(&host->timer);
1832 +
1833 +       tasklet_kill(&host->finish_tasklet);
1834 +
1835 +       mmc_free_host(host->mmc);
1836 +       platform_set_drvdata(pdev, NULL);
1837 +
1838 +       return 0;
1839 +}
1840 +
1841 +
1842 +static const struct of_device_id bcm2835_mmc_match[] = {
1843 +       { .compatible = "brcm,bcm2835-mmc" },
1844 +       { }
1845 +};
1846 +MODULE_DEVICE_TABLE(of, bcm2835_mmc_match);
1847 +
1848 +
1849 +
1850 +static struct platform_driver bcm2835_mmc_driver = {
1851 +       .probe      = bcm2835_mmc_probe,
1852 +       .remove     = bcm2835_mmc_remove,
1853 +       .driver     = {
1854 +               .name           = DRIVER_NAME,
1855 +               .owner          = THIS_MODULE,
1856 +               .of_match_table = bcm2835_mmc_match,
1857 +       },
1858 +};
1859 +module_platform_driver(bcm2835_mmc_driver);
1860 +
1861 +module_param(mmc_debug, uint, 0644);
1862 +module_param(mmc_debug2, uint, 0644);
1863 +MODULE_ALIAS("platform:mmc-bcm2835");
1864 +MODULE_DESCRIPTION("BCM2835 SDHCI driver");
1865 +MODULE_LICENSE("GPL v2");
1866 +MODULE_AUTHOR("Gellert Weisz");
1867 --- a/include/linux/mmc/card.h
1868 +++ b/include/linux/mmc/card.h
1869 @@ -271,6 +271,8 @@ struct mmc_card {
1870  #define MMC_QUIRK_TRIM_BROKEN  (1<<12)         /* Skip trim */
1871  #define MMC_QUIRK_BROKEN_HPI   (1<<13)         /* Disable broken HPI support */
1872
1873 +#define MMC_QUIRK_ERASE_BROKEN (1<<31)         /* Skip erase */
1874 +
1875         bool                    reenable_cmdq;  /* Re-enable Command Queue */
1876
1877         unsigned int            erase_size;     /* erase size in sectors */