target/linux/brcm2708/patches-3.14/0013-Fixes-for-sdhci-bcm2708.patch

   1 From 58a6eba44c8b8a13ff99a7696519437c0abeb3aa Mon Sep 17 00:00:00 2001
   2 From: popcornmix <popcornmix@gmail.com>
   3 Date: Tue, 8 May 2012 23:12:13 +0100
   4 Subject: [PATCH 13/54] Fixes for sdhci-bcm2708
   5
   6 possible fix for sdcard missing status. Thank naren
   7
   8 sdcard patch improvements from naren
   9
  10 sdhci-bcm2708: speed up DMA sync
  11
  12 Experiments show that it doesn't really take that long to sync, so we
  13 can reduce the poll interval slightly. Might improve performance a bit.
  14
  15 sdhci-bcm2708: remove custom clock handling
  16
  17 The custom clock handling code is redundant and buggy. The MMC/SDHCI
  18 subsystem does a better job than it, so remove it for good.
  19
  20 sdhci-bcm2708: add additional quirks
  21
  22 Some additional quirks are needed for correct operation.
  23 There's no SDHCI capabilities register documented, and it always reads
  24 zero, so add SDHCI_QUIRK_MISSING_CAPS. Apparently
  25 SDHCI_QUIRK_NO_HISPD_BIT is needed for many cards to work correctly in
  26 high-speed mode, so add it as well.
  27
  28 sdhci-bcm2708: add allow_highspeed parameter
  29
  30 Add a parameter to disable high-speed mode for the few cards that
  31 still might have problems. High-speed mode is enabled by default.
  32
  33 sdhci-bcm2708: assume 50 MHz eMMC clock
  34
  35 80 MHz clock isnt't suited well to be dividable to get SD clocks of 25
  36 MHz (default mode) or 50 MHz (high speed mode). 50 MHz are perfect to
  37 drive the SD interface at ideal frequencies.
  38
  39 Allow emmc clock to be specified as command line parameter
  40
  41 sdhci-bcm2708: raise DMA sync timeout
  42
  43 Commit d64b84c by accident reduced the maximum overall DMA sync
  44 timeout. The maximum overall timeout was reduced from 100ms to 30ms,
  45 which isn't enough for many cards. Increase it to 150ms, just to be
  46 extra safe. According to commit 872a8ff in the MMC subsystem, some
  47 cards require crazy long timeouts (3s), but as we're busy-waiting,
  48 and shouldn't delay for such a long time, let's hope 150ms will be
  49 enough for most cards.
  50
  51 Use ndelay rather than udelay. Thanks lb
  52
  53 Add sync_after_dma module parameter
  54
  55 sdhci-bcm2708: use extension FIFO to buffer DMA transfers
  56
  57 The additional FIFO might speed up transfers in some cases.
  58
  59 sdhci-bcm2708: use multiblock-type transfers for single blocks
  60
  61 There are issues with both single block reads (missed completion)
  62 and writes (data loss in some cases!). Just don't do single block
  63 transfers anymore, and treat them like multiblock transfers. This
  64 adds a quirk for this and uses it.
  65
  66 Add module parameter for missing_status quirk. sdhci-bcm2708.missing_status=0 may improve interrupt latency
  67
  68 Fix spinlock recursion in sdhci-bcm2708.c
  69
  70 mmc: Report 3.3V support in caps
  71
  72 sdhci: Use macros for out spin lock/unlock functions to reduce diffs with upstream code
  73
  74 sdhci: sdhci_bcm2708_quirk_voltage_broken appears to be a no-op
  75
  76 sdhci: sdhci_bcm2708_uhs_broken should be handled through caps reported
  77
  78 Add low-latency mode to sdcard driver. Disable with sdhci-bcm2708.enable_llm=0. Thanks ddv2005.
  79
  80 Allow the number of cycles delay between sdcard peripheral writes to be specified on command line with sdhci-bcm2708.cycle_delay
  81
  82 Lazy CRC quirk: Implemented retrying mechanisms for SD SSR and SCR, disabled missing_status and spurious CRC ACMD51 quirks by default (should be fixed by the retrying-mechanishm)
  83
  84 mmc: suppress sdcard warnings we are happy about by default
  85
  86 sdhci-bcm2807: Increase sync_after_dma timeout
  87
  88 The current timeout is being hit with some cards that complete successfully with a longer timeout.
  89 The timeout is not handled well, and is believed to be a code path that causes corruption.
  90 872a8ff suggests that crappy cards can take up to 3 seconds to respond
  91
  92 remove suspend/resume
  93
  94 fix sign in sdhci_bcm2708_raw_writel wait calculation
  95
  96 The ns_wait variable is intended to hold a lower bound on the number of nanoseconds that have elapsed since the last sdhci register write. However, the actual calculation of it was incorrect, as the subtraction was inverted. This commit fixes the calculation.
  97
  98 Note that this correction has no bearing when running with the default cycle_delay of 2 and the default clock rate of 50 MHz, under which conditions ns_2clk is 40 nanoseconds and ns_wait, regardless of whether the subtraction is done correctly or incorrectly, cannot possibly be less than 40 except for during the one-microsecond period just before the tick counter wraps around to meet last_write_hpt (i.e., approximately 4295 seconds after the preceding sdhci register write). The correction in this commit only comes into play if ns_2clk > 1000, which requires a cycle_delay of 51 or greater when using the default clock rate. Under those conditions, sdhci_bcm2708_raw_writel will not wait for the full cycle_delay count if at least 1000 nanoseconds have elapsed since the last register write.
  99
 100 sdhci: Only do one iteration of PIO reading loop
 101
 102 Changed wording on logging. Previously, we received errors like this:
 103 mmc0: could read SD Status register (SSR) at the 3th attempt
 104 A more sensible response is now returned.
 105 A typo also fixed in comments.
 106 ---
 107  drivers/mmc/card/block.c         |   2 +-
 108  drivers/mmc/core/sd.c            | 110 +++++++++++++++--
 109  drivers/mmc/host/sdhci-bcm2708.c | 254 ++++++++++++++++++---------------------
 110  drivers/mmc/host/sdhci.c         | 180 ++++++++++++++++++++-------
 111  drivers/mmc/host/sdhci.h         |   8 +-
 112  include/linux/mmc/host.h         |   1 +
 113  include/linux/mmc/sdhci.h        |   1 +
 114  7 files changed, 365 insertions(+), 191 deletions(-)
 115
 116 --- a/drivers/mmc/card/block.c
 117 +++ b/drivers/mmc/card/block.c
 118 @@ -1361,7 +1361,7 @@ static void mmc_blk_rw_rq_prep(struct mm
 119                         brq->data.blocks = 1;
 120         }
 121
 122 -       if (brq->data.blocks > 1 || do_rel_wr) {
 123 +       if (brq->data.blocks > 1 || do_rel_wr || card->host->caps2 & MMC_CAP2_FORCE_MULTIBLOCK) {
 124                 /* SPI multiblock writes terminate using a special
 125                  * token, not a STOP_TRANSMISSION request.
 126                  */
 127 --- a/drivers/mmc/core/sd.c
 128 +++ b/drivers/mmc/core/sd.c
 129 @@ -15,6 +15,8 @@
 130  #include <linux/slab.h>
 131  #include <linux/stat.h>
 132  #include <linux/pm_runtime.h>
 133 +#include <linux/jiffies.h>
 134 +#include <linux/nmi.h>
 135
 136  #include <linux/mmc/host.h>
 137  #include <linux/mmc/card.h>
 138 @@ -67,6 +69,15 @@ static const unsigned int sd_au_size[] =
 139                 __res & __mask;                                         \
 140         })
 141
 142 +// timeout for tries
 143 +static const unsigned long retry_timeout_ms= 10*1000;
 144 +
 145 +// try at least 10 times, even if timeout is reached
 146 +static const int retry_min_tries= 10;
 147 +
 148 +// delay between tries
 149 +static const unsigned long retry_delay_ms= 10;
 150 +
 151  /*
 152   * Given the decoded CSD structure, decode the raw CID to our CID structure.
 153   */
 154 @@ -219,12 +230,63 @@ static int mmc_decode_scr(struct mmc_car
 155  }
 156
 157  /*
 158 - * Fetch and process SD Status register.
 159 + * Fetch and process SD Configuration Register.
 160 + */
 161 +static int mmc_read_scr(struct mmc_card *card)
 162 +{
 163 +       unsigned long timeout_at;
 164 +       int err, tries;
 165 +
 166 +       timeout_at= jiffies + msecs_to_jiffies( retry_timeout_ms );
 167 +       tries=          0;
 168 +
 169 +       while( tries < retry_min_tries || time_before( jiffies, timeout_at ) )
 170 +       {
 171 +               unsigned long delay_at;
 172 +               tries++;
 173 +
 174 +               err = mmc_app_send_scr(card, card->raw_scr);
 175 +               if( !err )
 176 +                       break; // success!!!
 177 +
 178 +               touch_nmi_watchdog();     // we are still alive!
 179 +
 180 +               // delay
 181 +               delay_at= jiffies + msecs_to_jiffies( retry_delay_ms );
 182 +               while( time_before( jiffies, delay_at ) )
 183 +               {
 184 +                       mdelay( 1 );
 185 +                       touch_nmi_watchdog();     // we are still alive!
 186 +               }
 187 +       }
 188 +
 189 +       if( err)
 190 +       {
 191 +               pr_err("%s: failed to read SD Configuration register (SCR) after %d tries during %lu ms, error %d\n", mmc_hostname(card->host), tries, retry_timeout_ms, err );
 192 +               return err;
 193 +       }
 194 +
 195 +       if( tries > 1 )
 196 +       {
 197 +               pr_info("%s: could read SD Configuration register (SCR) at the %dth attempt\n", mmc_hostname(card->host), tries );
 198 +       }
 199 +
 200 +       err = mmc_decode_scr(card);
 201 +       if (err)
 202 +               return err;
 203 +
 204 +       return err;
 205 +}
 206 +
 207 +/*
 208 + * Fetch and process SD Status Register.
 209   */
 210  static int mmc_read_ssr(struct mmc_card *card)
 211  {
 212 +       unsigned long timeout_at;
 213         unsigned int au, es, et, eo;
 214         int err, i;
 215 +  int tries;
 216         u32 *ssr;
 217
 218         if (!(card->csd.cmdclass & CCC_APP_SPEC)) {
 219 @@ -237,14 +299,40 @@ static int mmc_read_ssr(struct mmc_card
 220         if (!ssr)
 221                 return -ENOMEM;
 222
 223 -       err = mmc_app_sd_status(card, ssr);
 224 -       if (err) {
 225 -               pr_warning("%s: problem reading SD Status "
 226 -                       "register.\n", mmc_hostname(card->host));
 227 -               err = 0;
 228 +       timeout_at= jiffies + msecs_to_jiffies( retry_timeout_ms );
 229 +       tries=          0;
 230 +
 231 +       while( tries < retry_min_tries || time_before( jiffies, timeout_at ) )
 232 +       {
 233 +               unsigned long delay_at;
 234 +               tries++;
 235 +
 236 +               err= mmc_app_sd_status(card, ssr);
 237 +               if( !err )
 238 +                       break; // sucess!!!
 239 +
 240 +               touch_nmi_watchdog();     // we are still alive!
 241 +
 242 +               // delay
 243 +               delay_at= jiffies + msecs_to_jiffies( retry_delay_ms );
 244 +               while( time_before( jiffies, delay_at ) )
 245 +               {
 246 +                       mdelay( 1 );
 247 +                       touch_nmi_watchdog();     // we are still alive!
 248 +               }
 249 +       }
 250 +
 251 +       if( err)
 252 +       {
 253 +               pr_err("%s: failed to read SD Status register (SSR) after %d tries during %lu ms, error %d\n", mmc_hostname(card->host), tries, retry_timeout_ms, err );
 254                 goto out;
 255         }
 256
 257 +       if( tries > 1 )
 258 +       {
 259 +               pr_info("%s: read SD Status register (SSR) after %d attempts\n", mmc_hostname(card->host), tries );
 260 +       }
 261 +
 262         for (i = 0; i < 16; i++)
 263                 ssr[i] = be32_to_cpu(ssr[i]);
 264
 265 @@ -826,14 +914,10 @@ int mmc_sd_setup_card(struct mmc_host *h
 266
 267         if (!reinit) {
 268                 /*
 269 -                * Fetch SCR from card.
 270 +                * Fetch and decode SD Configuration register.
 271                  */
 272 -               err = mmc_app_send_scr(card, card->raw_scr);
 273 -               if (err)
 274 -                       return err;
 275 -
 276 -               err = mmc_decode_scr(card);
 277 -               if (err)
 278 +               err = mmc_read_scr(card);
 279 +               if( err )
 280                         return err;
 281
 282                 /*
 283 --- a/drivers/mmc/host/sdhci-bcm2708.c
 284 +++ b/drivers/mmc/host/sdhci-bcm2708.c
 285 @@ -51,7 +51,6 @@
 286  #undef CONFIG_MMC_SDHCI_BCM2708_DMA
 287  #define CONFIG_MMC_SDHCI_BCM2708_DMA y
 288
 289 -#define USE_SYNC_AFTER_DMA
 290  #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA
 291  /* #define CHECK_DMA_USE */
 292  #endif
 293 @@ -73,7 +72,12 @@
 294  #define BCM2708_SDHCI_SLEEP_TIMEOUT 1000   /* msecs */
 295
 296  /* Mhz clock that the EMMC core is running at. Should match the platform clockman settings */
 297 -#define BCM2708_EMMC_CLOCK_FREQ 80000000
 298 +#define BCM2708_EMMC_CLOCK_FREQ 50000000
 299 +
 300 +#define REG_EXRDFIFO_EN     0x80
 301 +#define REG_EXRDFIFO_CFG    0x84
 302 +
 303 +int cycle_delay=2;
 304
 305  /*****************************************************************************\
 306   *                                                                          *
 307 @@ -129,6 +133,14 @@ static inline unsigned long int since_ns
 308         return (unsigned long)((hptime() - t) * HPTIME_CLK_NS);
 309  }
 310
 311 +static bool allow_highspeed = 1;
 312 +static int emmc_clock_freq = BCM2708_EMMC_CLOCK_FREQ;
 313 +static bool sync_after_dma = 1;
 314 +static bool missing_status = 1;
 315 +static bool spurious_crc_acmd51 = 0;
 316 +bool enable_llm = 1;
 317 +bool extra_messages = 0;
 318 +
 319  #if 0
 320  static void hptime_test(void)
 321  {
 322 @@ -241,19 +253,19 @@ static void sdhci_bcm2708_raw_writel(str
 323                 /* host->clock is the clock freq in Hz */
 324                 static hptime_t last_write_hpt;
 325                 hptime_t now = hptime();
 326 -               ns_2clk = 2000000000/host->clock;
 327 +               ns_2clk = cycle_delay*1000000/(host->clock/1000);
 328
 329                 if (now == last_write_hpt || now == last_write_hpt+1) {
 330                          /* we can't guarantee any significant time has
 331                           * passed - we'll have to wait anyway ! */
 332 -                       udelay((ns_2clk+1000-1)/1000);
 333 +                       ndelay(ns_2clk);
 334                 } else
 335                 {
 336                         /* we must have waited at least this many ns: */
 337                         unsigned int ns_wait = HPTIME_CLK_NS *
 338 -                                              (last_write_hpt - now - 1);
 339 +                                              (now - last_write_hpt - 1);
 340                         if (ns_wait < ns_2clk)
 341 -                               udelay((ns_2clk-ns_wait+500)/1000);
 342 +                               ndelay(ns_2clk - ns_wait);
 343                 }
 344                 last_write_hpt = now;
 345         }
 346 @@ -269,13 +281,13 @@ static void sdhci_bcm2708_raw_writel(str
 347                 ier &= ~SDHCI_INT_DATA_TIMEOUT;
 348                 writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 349                 timeout_disabled = true;
 350 -               udelay((ns_2clk+1000-1)/1000);
 351 +               ndelay(ns_2clk);
 352         } else if (timeout_disabled) {
 353                 ier = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE);
 354                 ier |= SDHCI_INT_DATA_TIMEOUT;
 355                 writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 356                 timeout_disabled = false;
 357 -               udelay((ns_2clk+1000-1)/1000);
 358 +               ndelay(ns_2clk);
 359         }
 360  #endif
 361         writel(val, host->ioaddr + reg);
 362 @@ -353,68 +365,9 @@ void sdhci_bcm2708_writeb(struct sdhci_h
 363
 364  static unsigned int sdhci_bcm2708_get_max_clock(struct sdhci_host *host)
 365  {
 366 -       return 20000000;        // this value is in Hz (20MHz)
 367 -}
 368 -
 369 -static unsigned int sdhci_bcm2708_get_timeout_clock(struct sdhci_host *host)
 370 -{
 371 -       if(host->clock)
 372 -               return (host->clock / 1000);            // this value is in kHz (100MHz)
 373 -       else
 374 -               return (sdhci_bcm2708_get_max_clock(host) / 1000);
 375 +       return emmc_clock_freq;
 376  }
 377
 378 -static void sdhci_bcm2708_set_clock(struct sdhci_host *host, unsigned int clock)
 379 -{
 380 -       int div = 0;
 381 -       u16 clk = 0;
 382 -       unsigned long timeout;
 383 -
 384 -        if (clock == host->clock)
 385 -                return;
 386 -
 387 -        sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
 388 -
 389 -        if (clock == 0)
 390 -                goto out;
 391 -
 392 -       if (BCM2708_EMMC_CLOCK_FREQ <= clock)
 393 -               div = 1;
 394 -       else {
 395 -               for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) {
 396 -                       if ((BCM2708_EMMC_CLOCK_FREQ / div) <= clock)
 397 -                               break;
 398 -               }
 399 -       }
 400 -
 401 -        DBG( "desired SD clock: %d, actual: %d\n",
 402 -                clock, BCM2708_EMMC_CLOCK_FREQ / div);
 403 -
 404 -       clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
 405 -       clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
 406 -               << SDHCI_DIVIDER_HI_SHIFT;
 407 -       clk |= SDHCI_CLOCK_INT_EN;
 408 -
 409 -       sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 410 -
 411 -        timeout = 20;
 412 -        while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
 413 -                        & SDHCI_CLOCK_INT_STABLE)) {
 414 -                if (timeout == 0) {
 415 -                       printk(KERN_ERR "%s: Internal clock never "
 416 -                               "stabilised.\n", mmc_hostname(host->mmc));
 417 -                        return;
 418 -                }
 419 -                timeout--;
 420 -                mdelay(1);
 421 -        }
 422 -
 423 -        clk |= SDHCI_CLOCK_CARD_EN;
 424 -        sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 425 -out:
 426 -        host->clock = clock;
 427 - }
 428 -
 429  /*****************************************************************************\
 430   *                                                                          *
 431   * DMA Operation                                                            *
 432 @@ -695,11 +648,11 @@ void
 433  sdhci_bcm2708_platdma_reset(struct sdhci_host *host, struct mmc_data *data)
 434  {
 435         struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host);
 436 -       unsigned long flags;
 437 +//     unsigned long flags;
 438
 439         BUG_ON(NULL == host);
 440
 441 -       spin_lock_irqsave(&host->lock, flags);
 442 +//     spin_lock_irqsave(&host->lock, flags);
 443
 444         if (host_priv->dma_wanted) {
 445                 if (NULL == data) {
 446 @@ -720,13 +673,16 @@ sdhci_bcm2708_platdma_reset(struct sdhci
 447                         cs = readl(host_priv->dma_chan_base + BCM2708_DMA_CS);
 448
 449                         if (!(BCM2708_DMA_ACTIVE & cs))
 450 -                               printk(KERN_INFO "%s: missed completion of "
 451 +                       {
 452 +                               if (extra_messages)
 453 +                                       printk(KERN_INFO "%s: missed completion of "
 454                                        "cmd %d DMA (%d/%d [%d]/[%d]) - "
 455                                        "ignoring it\n",
 456                                        mmc_hostname(host->mmc),
 457                                        host->last_cmdop,
 458                                        host_priv->sg_done, sg_todo,
 459                                        host_priv->sg_ix+1, sg_len);
 460 +                       }
 461                         else
 462                                 printk(KERN_INFO "%s: resetting ongoing cmd %d"
 463                                        "DMA before %d/%d [%d]/[%d] complete\n",
 464 @@ -779,7 +735,7 @@ sdhci_bcm2708_platdma_reset(struct sdhci
 465  #endif
 466         }
 467
 468 -       spin_unlock_irqrestore(&host->lock, flags);
 469 +//     spin_unlock_irqrestore(&host->lock, flags);
 470  }
 471
 472
 473 @@ -792,11 +748,11 @@ static void sdhci_bcm2708_dma_complete_i
 474         int sg_len;
 475         int sg_ix;
 476         int sg_todo;
 477 -       unsigned long flags;
 478 +//     unsigned long flags;
 479
 480         BUG_ON(NULL == host);
 481
 482 -       spin_lock_irqsave(&host->lock, flags);
 483 +//     spin_lock_irqsave(&host->lock, flags);
 484         data = host->data;
 485
 486  #ifdef CHECK_DMA_USE
 487 @@ -821,7 +777,7 @@ static void sdhci_bcm2708_dma_complete_i
 488
 489         if (NULL == data) {
 490                 DBG("PDMA unused completion - status 0x%X\n", dma_cs);
 491 -               spin_unlock_irqrestore(&host->lock, flags);
 492 +//             spin_unlock_irqrestore(&host->lock, flags);
 493                 return;
 494         }
 495         sg = data->sg;
 496 @@ -878,40 +834,34 @@ static void sdhci_bcm2708_dma_complete_i
 497                                                 SDHCI_INT_SPACE_AVAIL);
 498                 }
 499         } else {
 500 -#ifdef USE_SYNC_AFTER_DMA
 501 -               /* On the Arasan controller the stop command (which will be
 502 -                  scheduled after this completes) does not seem to work
 503 -                  properly if we allow it to be issued when we are
 504 -                  transferring data to/from the SD card.
 505 -                  We get CRC and DEND errors unless we wait for
 506 -                  the SD controller to finish reading/writing to the card. */
 507 -               u32 state_mask;
 508 -               int timeout=1000000;
 509 -               hptime_t now = hptime();
 510 +               if (sync_after_dma) {
 511 +                       /* On the Arasan controller the stop command (which will be
 512 +                          scheduled after this completes) does not seem to work
 513 +                          properly if we allow it to be issued when we are
 514 +                          transferring data to/from the SD card.
 515 +                          We get CRC and DEND errors unless we wait for
 516 +                          the SD controller to finish reading/writing to the card. */
 517 +                       u32 state_mask;
 518 +                       int timeout=3*1000*1000;
 519
 520 -               DBG("PDMA over - sync card\n");
 521 -               if (data->flags & MMC_DATA_READ)
 522 -                       state_mask = SDHCI_DOING_READ;
 523 -               else
 524 -                       state_mask = SDHCI_DOING_WRITE;
 525 +                       DBG("PDMA over - sync card\n");
 526 +                       if (data->flags & MMC_DATA_READ)
 527 +                               state_mask = SDHCI_DOING_READ;
 528 +                       else
 529 +                               state_mask = SDHCI_DOING_WRITE;
 530
 531 -               while (0 != (sdhci_bcm2708_raw_readl(host,
 532 -                                                    SDHCI_PRESENT_STATE) &
 533 -                            state_mask) && --timeout > 0)
 534 -                       continue;
 535 -
 536 -               if (1000000-timeout > 4000) /*ave. is about 3250*/
 537 -                       DBG("%s: note - long %s sync %luns - "
 538 -                              "%d its.\n",
 539 -                              mmc_hostname(host->mmc),
 540 -                              data->flags & MMC_DATA_READ? "read": "write",
 541 -                              since_ns(now), 1000000-timeout);
 542 -               if (timeout <= 0)
 543 -                       printk(KERN_ERR"%s: final %s to SD card still "
 544 -                              "running\n",
 545 -                              mmc_hostname(host->mmc),
 546 -                              data->flags & MMC_DATA_READ? "read": "write");
 547 -#endif
 548 +                       while (0 != (sdhci_bcm2708_raw_readl(host, SDHCI_PRESENT_STATE)
 549 +                               & state_mask) && --timeout > 0)
 550 +                       {
 551 +                               udelay(1);
 552 +                               continue;
 553 +                       }
 554 +                       if (timeout <= 0)
 555 +                               printk(KERN_ERR"%s: final %s to SD card still "
 556 +                                      "running\n",
 557 +                                      mmc_hostname(host->mmc),
 558 +                                      data->flags & MMC_DATA_READ? "read": "write");
 559 +               }
 560                 if (host_priv->complete) {
 561                         (*host_priv->complete)(host);
 562                         DBG("PDMA %s complete\n",
 563 @@ -920,7 +870,7 @@ static void sdhci_bcm2708_dma_complete_i
 564                                                 SDHCI_INT_SPACE_AVAIL);
 565                 }
 566         }
 567 -       spin_unlock_irqrestore(&host->lock, flags);
 568 +//     spin_unlock_irqrestore(&host->lock, flags);
 569  }
 570
 571  static irqreturn_t sdhci_bcm2708_dma_irq(int irq, void *dev_id)
 572 @@ -929,12 +879,11 @@ static irqreturn_t sdhci_bcm2708_dma_irq
 573         struct sdhci_host *host = dev_id;
 574         struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host);
 575         u32 dma_cs; /* control and status register */
 576 -       unsigned long flags;
 577
 578         BUG_ON(NULL == dev_id);
 579         BUG_ON(NULL == host_priv->dma_chan_base);
 580
 581 -       spin_lock_irqsave(&host->lock, flags);
 582 +       sdhci_spin_lock(host);
 583
 584         dma_cs = readl(host_priv->dma_chan_base + BCM2708_DMA_CS);
 585
 586 @@ -958,7 +907,8 @@ static irqreturn_t sdhci_bcm2708_dma_irq
 587
 588                 if (!host_priv->dma_wanted) {
 589                         /* ignore this interrupt - it was reset */
 590 -                       printk(KERN_INFO "%s: DMA IRQ %X ignored - "
 591 +                       if (extra_messages)
 592 +                               printk(KERN_INFO "%s: DMA IRQ %X ignored - "
 593                                "results were reset\n",
 594                                mmc_hostname(host->mmc), dma_cs);
 595  #ifdef CHECK_DMA_USE
 596 @@ -975,8 +925,7 @@ static irqreturn_t sdhci_bcm2708_dma_irq
 597
 598                 result = IRQ_HANDLED;
 599         }
 600 -
 601 -       spin_unlock_irqrestore(&host->lock, flags);
 602 +       sdhci_spin_unlock(host);
 603
 604         return result;
 605  }
 606 @@ -1019,10 +968,12 @@ static ssize_t attr_dma_store(struct dev
 607                 int on = simple_strtol(buf, NULL, 0);
 608                 if (on) {
 609                         host->flags |= SDHCI_USE_PLATDMA;
 610 +                       sdhci_bcm2708_writel(host, 1, REG_EXRDFIFO_EN);
 611                         printk(KERN_INFO "%s: DMA enabled\n",
 612                                mmc_hostname(host->mmc));
 613                 } else {
 614                         host->flags &= ~(SDHCI_USE_PLATDMA | SDHCI_REQ_USE_DMA);
 615 +                       sdhci_bcm2708_writel(host, 0, REG_EXRDFIFO_EN);
 616                         printk(KERN_INFO "%s: DMA disabled\n",
 617                                mmc_hostname(host->mmc));
 618                 }
 619 @@ -1126,7 +1077,7 @@ static int sdhci_bcm2708_suspend(struct
 620         int ret = 0;
 621
 622         if (host->mmc) {
 623 -               ret = mmc_suspend_host(host->mmc);
 624 +               //ret = mmc_suspend_host(host->mmc);
 625         }
 626
 627         return ret;
 628 @@ -1139,7 +1090,7 @@ static int sdhci_bcm2708_resume(struct p
 629         int ret = 0;
 630
 631         if (host->mmc) {
 632 -               ret = mmc_resume_host(host->mmc);
 633 +               //ret = mmc_resume_host(host->mmc);
 634         }
 635
 636         return ret;
 637 @@ -1158,19 +1109,14 @@ static unsigned int sdhci_bcm2708_quirk_
 638          return 1;
 639  }
 640
 641 -static unsigned int sdhci_bcm2708_quirk_spurious_crc(struct sdhci_host *host)
 642 +static unsigned int sdhci_bcm2708_quirk_spurious_crc_acmd51(struct sdhci_host *host)
 643  {
 644          return 1;
 645  }
 646
 647 -static unsigned int sdhci_bcm2708_quirk_voltage_broken(struct sdhci_host *host)
 648 +static unsigned int sdhci_bcm2708_missing_status(struct sdhci_host *host)
 649  {
 650 -        return 1;
 651 -}
 652 -
 653 -static unsigned int sdhci_bcm2708_uhs_broken(struct sdhci_host *host)
 654 -{
 655 -        return 1;
 656 +       return 1;
 657  }
 658
 659  /***************************************************************************** \
 660 @@ -1190,11 +1136,7 @@ static struct sdhci_ops sdhci_bcm2708_op
 661  #else
 662  #error The BCM2708 SDHCI driver needs CONFIG_MMC_SDHCI_IO_ACCESSORS to be set
 663  #endif
 664 -       //.enable_dma = NULL,
 665 -       .set_clock = sdhci_bcm2708_set_clock,
 666         .get_max_clock = sdhci_bcm2708_get_max_clock,
 667 -       //.get_min_clock = NULL,
 668 -       .get_timeout_clock = sdhci_bcm2708_get_timeout_clock,
 669
 670  #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA
 671         // Platform DMA operations
 672 @@ -1203,9 +1145,6 @@ static struct sdhci_ops sdhci_bcm2708_op
 673         .pdma_reset = sdhci_bcm2708_platdma_reset,
 674  #endif
 675         .extra_ints = sdhci_bcm2708_quirk_extra_ints,
 676 -       .spurious_crc_acmd51 = sdhci_bcm2708_quirk_spurious_crc,
 677 -       .voltage_broken = sdhci_bcm2708_quirk_voltage_broken,
 678 -       .uhs_broken = sdhci_bcm2708_uhs_broken,
 679  };
 680
 681  /*****************************************************************************\
 682 @@ -1244,15 +1183,30 @@ static int sdhci_bcm2708_probe(struct pl
 683                 ret = PTR_ERR(host);
 684                 goto err;
 685         }
 686 +       if (missing_status) {
 687 +               sdhci_bcm2708_ops.missing_status = sdhci_bcm2708_missing_status;
 688 +       }
 689 +
 690 +       if( spurious_crc_acmd51 ) {
 691 +               sdhci_bcm2708_ops.spurious_crc_acmd51 = sdhci_bcm2708_quirk_spurious_crc_acmd51;
 692 +       }
 693 +
 694 +
 695 +       printk("sdhci: %s low-latency mode\n",enable_llm?"Enable":"Disable");
 696
 697         host->hw_name = "BCM2708_Arasan";
 698         host->ops = &sdhci_bcm2708_ops;
 699         host->irq = platform_get_irq(pdev, 0);
 700 +       host->second_irq = 0;
 701
 702         host->quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
 703                        SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
 704                        SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
 705 -                      SDHCI_QUIRK_NONSTANDARD_CLOCK;
 706 +               SDHCI_QUIRK_MISSING_CAPS |
 707 +               SDHCI_QUIRK_NO_HISPD_BIT |
 708 +               (sync_after_dma ? 0:SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12);
 709 +
 710 +
 711  #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA
 712         host->flags = SDHCI_USE_PLATDMA;
 713  #endif
 714 @@ -1305,17 +1259,24 @@ static int sdhci_bcm2708_probe(struct pl
 715         host_priv->dma_chan = ret;
 716
 717         ret = request_irq(host_priv->dma_irq, sdhci_bcm2708_dma_irq,
 718 -                         IRQF_SHARED, DRIVER_NAME " (dma)", host);
 719 +                         0 /*IRQF_SHARED*/, DRIVER_NAME " (dma)", host);
 720         if (ret) {
 721                 dev_err(&pdev->dev, "cannot set DMA IRQ\n");
 722                 goto err_add_dma_irq;
 723         }
 724 +       host->second_irq = host_priv->dma_irq;
 725         DBG("DMA CBs %p handle %08X DMA%d %p DMA IRQ %d\n",
 726             host_priv->cb_base, (unsigned)host_priv->cb_handle,
 727             host_priv->dma_chan, host_priv->dma_chan_base,
 728             host_priv->dma_irq);
 729
 730 -       host->mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;
 731 +    // we support 3.3V
 732 +    host->caps |= SDHCI_CAN_VDD_330;
 733 +    if (allow_highspeed)
 734 +        host->mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;
 735 +
 736 +    /* single block writes cause data loss with some SD cards! */
 737 +    host->mmc->caps2 |= MMC_CAP2_FORCE_MULTIBLOCK;
 738  #endif
 739
 740         ret = sdhci_add_host(host);
 741 @@ -1327,6 +1288,12 @@ static int sdhci_bcm2708_probe(struct pl
 742         ret = device_create_file(&pdev->dev, &dev_attr_dma_wait);
 743         ret = device_create_file(&pdev->dev, &dev_attr_status);
 744
 745 +#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA
 746 +       /* enable extension fifo for paced DMA transfers */
 747 +       sdhci_bcm2708_writel(host, 1, REG_EXRDFIFO_EN);
 748 +       sdhci_bcm2708_writel(host, 4, REG_EXRDFIFO_CFG);
 749 +#endif
 750 +
 751         printk(KERN_INFO "%s: BCM2708 SDHC host at 0x%08llx DMA %d IRQ %d\n",
 752                mmc_hostname(host->mmc), (unsigned long long)iomem->start,
 753                host_priv->dma_chan, host_priv->dma_irq);
 754 @@ -1418,7 +1385,26 @@ static void __exit sdhci_drv_exit(void)
 755  module_init(sdhci_drv_init);
 756  module_exit(sdhci_drv_exit);
 757
 758 +module_param(allow_highspeed, bool, 0444);
 759 +module_param(emmc_clock_freq, int, 0444);
 760 +module_param(sync_after_dma, bool, 0444);
 761 +module_param(missing_status, bool, 0444);
 762 +module_param(spurious_crc_acmd51, bool, 0444);
 763 +module_param(enable_llm, bool, 0444);
 764 +module_param(cycle_delay, int, 0444);
 765 +module_param(extra_messages, bool, 0444);
 766 +
 767  MODULE_DESCRIPTION("Secure Digital Host Controller Interface platform driver");
 768  MODULE_AUTHOR("Broadcom <info@broadcom.com>");
 769  MODULE_LICENSE("GPL v2");
 770  MODULE_ALIAS("platform:"DRIVER_NAME);
 771 +
 772 +MODULE_PARM_DESC(allow_highspeed, "Allow high speed transfers modes");
 773 +MODULE_PARM_DESC(emmc_clock_freq, "Specify the speed of emmc clock");
 774 +MODULE_PARM_DESC(sync_after_dma, "Block in driver until dma complete");
 775 +MODULE_PARM_DESC(missing_status, "Use the missing status quirk");
 776 +MODULE_PARM_DESC(spurious_crc_acmd51, "Use the spurious crc quirk for reading SCR (ACMD51)");
 777 +MODULE_PARM_DESC(enable_llm, "Enable low-latency mode");
 778 +MODULE_PARM_DESC(extra_messages, "Enable more sdcard warning messages");
 779 +
 780 +
 781 --- a/drivers/mmc/host/sdhci.c
 782 +++ b/drivers/mmc/host/sdhci.c
 783 @@ -131,6 +131,99 @@ static void sdhci_dumpregs(struct sdhci_
 784   * Low level functions                                                       *
 785   *                                                                           *
 786  \*****************************************************************************/
 787 +extern bool enable_llm;
 788 +static int sdhci_locked=0;
 789 +void sdhci_spin_lock(struct sdhci_host *host)
 790 +{
 791 +       spin_lock(&host->lock);
 792 +#ifdef CONFIG_PREEMPT
 793 +       if(enable_llm)
 794 +       {
 795 +               disable_irq_nosync(host->irq);
 796 +               if(host->second_irq)
 797 +                       disable_irq_nosync(host->second_irq);
 798 +               local_irq_enable();
 799 +       }
 800 +#endif
 801 +}
 802 +
 803 +void sdhci_spin_unlock(struct sdhci_host *host)
 804 +{
 805 +#ifdef CONFIG_PREEMPT
 806 +       if(enable_llm)
 807 +       {
 808 +               local_irq_disable();
 809 +               if(host->second_irq)
 810 +                       enable_irq(host->second_irq);
 811 +               enable_irq(host->irq);
 812 +       }
 813 +#endif
 814 +       spin_unlock(&host->lock);
 815 +}
 816 +
 817 +void sdhci_spin_lock_irqsave(struct sdhci_host *host,unsigned long *flags)
 818 +{
 819 +#ifdef CONFIG_PREEMPT
 820 +       if(enable_llm)
 821 +       {
 822 +               while(sdhci_locked)
 823 +               {
 824 +                       preempt_schedule();
 825 +               }
 826 +               spin_lock_irqsave(&host->lock,*flags);
 827 +               disable_irq(host->irq);
 828 +               if(host->second_irq)
 829 +                       disable_irq(host->second_irq);
 830 +               local_irq_enable();
 831 +       }
 832 +       else
 833 +#endif
 834 +               spin_lock_irqsave(&host->lock,*flags);
 835 +}
 836 +
 837 +void sdhci_spin_unlock_irqrestore(struct sdhci_host *host,unsigned long flags)
 838 +{
 839 +#ifdef CONFIG_PREEMPT
 840 +       if(enable_llm)
 841 +       {
 842 +               local_irq_disable();
 843 +               if(host->second_irq)
 844 +                       enable_irq(host->second_irq);
 845 +               enable_irq(host->irq);
 846 +       }
 847 +#endif
 848 +       spin_unlock_irqrestore(&host->lock,flags);
 849 +}
 850 +
 851 +static void sdhci_spin_enable_schedule(struct sdhci_host *host)
 852 +{
 853 +#ifdef CONFIG_PREEMPT
 854 +       if(enable_llm)
 855 +       {
 856 +               sdhci_locked = 1;
 857 +               preempt_enable();
 858 +       }
 859 +#endif
 860 +}
 861 +
 862 +static void sdhci_spin_disable_schedule(struct sdhci_host *host)
 863 +{
 864 +#ifdef CONFIG_PREEMPT
 865 +       if(enable_llm)
 866 +       {
 867 +               preempt_disable();
 868 +               sdhci_locked = 0;
 869 +       }
 870 +#endif
 871 +}
 872 +
 873 +
 874 +#undef spin_lock_irqsave
 875 +#define spin_lock_irqsave(host_lock, flags)      sdhci_spin_lock_irqsave(container_of(host_lock, struct sdhci_host, lock), &flags)
 876 +#define spin_unlock_irqrestore(host_lock, flags) sdhci_spin_unlock_irqrestore(container_of(host_lock, struct sdhci_host, lock), flags)
 877 +
 878 +#define spin_lock(host_lock)   sdhci_spin_lock(container_of(host_lock, struct sdhci_host, lock))
 879 +#define spin_unlock(host_lock) sdhci_spin_unlock(container_of(host_lock, struct sdhci_host, lock))
 880
 881  static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set)
 882  {
 883 @@ -300,7 +393,7 @@ static void sdhci_led_control(struct led
 884         struct sdhci_host *host = container_of(led, struct sdhci_host, led);
 885         unsigned long flags;
 886
 887 -       spin_lock_irqsave(&host->lock, flags);
 888 +       sdhci_spin_lock_irqsave(host, &flags);
 889
 890         if (host->runtime_suspended)
 891                 goto out;
 892 @@ -310,7 +403,7 @@ static void sdhci_led_control(struct led
 893         else
 894                 sdhci_activate_led(host);
 895  out:
 896 -       spin_unlock_irqrestore(&host->lock, flags);
 897 +       sdhci_spin_unlock_irqrestore(host, flags);
 898  }
 899  #endif
 900
 901 @@ -457,6 +550,7 @@ static void sdhci_transfer_pio(struct sd
 902                         break;
 903                 state = sdhci_readl(host, SDHCI_PRESENT_STATE);
 904                 available = state & mask;
 905 +               break;
 906         }
 907
 908         DBG("PIO transfer complete - %d blocks left.\n", host->blocks);
 909 @@ -1023,7 +1117,9 @@ void sdhci_send_command(struct sdhci_hos
 910                         return;
 911                 }
 912                 timeout--;
 913 +               sdhci_spin_enable_schedule(host);
 914                 mdelay(1);
 915 +               sdhci_spin_disable_schedule(host);
 916         }
 917         DBG("send cmd %d - wait 0x%X irq 0x%x\n", cmd->opcode, mask,
 918             sdhci_readl(host, SDHCI_INT_STATUS));
 919 @@ -1256,7 +1352,9 @@ clock_set:
 920                         return;
 921                 }
 922                 timeout--;
 923 +               sdhci_spin_enable_schedule(host);
 924                 mdelay(1);
 925 +               sdhci_spin_disable_schedule(host);
 926         }
 927
 928         clk |= SDHCI_CLOCK_CARD_EN;
 929 @@ -1357,7 +1455,7 @@ static void sdhci_request(struct mmc_hos
 930
 931         sdhci_runtime_pm_get(host);
 932
 933 -       spin_lock_irqsave(&host->lock, flags);
 934 +       sdhci_spin_lock_irqsave(host, &flags);
 935
 936         WARN_ON(host->mrq != NULL);
 937
 938 @@ -1422,9 +1520,9 @@ static void sdhci_request(struct mmc_hos
 939                                  */
 940                                 host->mrq = NULL;
 941
 942 -                               spin_unlock_irqrestore(&host->lock, flags);
 943 +                               sdhci_spin_unlock_irqrestore(host, flags);
 944                                 sdhci_execute_tuning(mmc, tuning_opcode);
 945 -                               spin_lock_irqsave(&host->lock, flags);
 946 +                               sdhci_spin_lock_irqsave(host, &flags);
 947
 948                                 /* Restore original mmc_request structure */
 949                                 host->mrq = mrq;
 950 @@ -1438,7 +1536,7 @@ static void sdhci_request(struct mmc_hos
 951         }
 952
 953         mmiowb();
 954 -       spin_unlock_irqrestore(&host->lock, flags);
 955 +       sdhci_spin_unlock_irqrestore(host, flags);
 956  }
 957
 958  static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios)
 959 @@ -1447,10 +1545,10 @@ static void sdhci_do_set_ios(struct sdhc
 960         int vdd_bit = -1;
 961         u8 ctrl;
 962
 963 -       spin_lock_irqsave(&host->lock, flags);
 964 +       sdhci_spin_lock_irqsave(host, &flags);
 965
 966         if (host->flags & SDHCI_DEVICE_DEAD) {
 967 -               spin_unlock_irqrestore(&host->lock, flags);
 968 +               sdhci_spin_unlock_irqrestore(host, flags);
 969                 if (host->vmmc && ios->power_mode == MMC_POWER_OFF)
 970                         mmc_regulator_set_ocr(host->mmc, host->vmmc, 0);
 971                 return;
 972 @@ -1478,9 +1576,9 @@ static void sdhci_do_set_ios(struct sdhc
 973                 vdd_bit = sdhci_set_power(host, ios->vdd);
 974
 975         if (host->vmmc && vdd_bit != -1) {
 976 -               spin_unlock_irqrestore(&host->lock, flags);
 977 +               sdhci_spin_unlock_irqrestore(host, flags);
 978                 mmc_regulator_set_ocr(host->mmc, host->vmmc, vdd_bit);
 979 -               spin_lock_irqsave(&host->lock, flags);
 980 +               sdhci_spin_lock_irqsave(host, &flags);
 981         }
 982
 983         if (host->ops->platform_send_init_74_clocks)
 984 @@ -1519,7 +1617,7 @@ static void sdhci_do_set_ios(struct sdhc
 985         else
 986                 ctrl &= ~SDHCI_CTRL_HISPD;
 987
 988 -       if (host->version >= SDHCI_SPEC_300 && !(host->ops->uhs_broken)) {
 989 +       if (host->version >= SDHCI_SPEC_300) {
 990                 u16 clk, ctrl_2;
 991
 992                 /* In case of UHS-I modes, set High Speed Enable */
 993 @@ -1617,7 +1715,7 @@ static void sdhci_do_set_ios(struct sdhc
 994                 sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
 995
 996         mmiowb();
 997 -       spin_unlock_irqrestore(&host->lock, flags);
 998 +       sdhci_spin_unlock_irqrestore(host, flags);
 999  }
1000
1001  static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1002 @@ -1665,7 +1763,7 @@ static int sdhci_check_ro(struct sdhci_h
1003         unsigned long flags;
1004         int is_readonly;
1005
1006 -       spin_lock_irqsave(&host->lock, flags);
1007 +       sdhci_spin_lock_irqsave(host, &flags);
1008
1009         if (host->flags & SDHCI_DEVICE_DEAD)
1010                 is_readonly = 0;
1011 @@ -1675,7 +1773,7 @@ static int sdhci_check_ro(struct sdhci_h
1012                 is_readonly = !(sdhci_readl(host, SDHCI_PRESENT_STATE)
1013                                 & SDHCI_WRITE_PROTECT);
1014
1015 -       spin_unlock_irqrestore(&host->lock, flags);
1016 +       sdhci_spin_unlock_irqrestore(host, flags);
1017
1018         /* This quirk needs to be replaced by a callback-function later */
1019         return host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT ?
1020 @@ -1748,9 +1846,9 @@ static void sdhci_enable_sdio_irq(struct
1021         struct sdhci_host *host = mmc_priv(mmc);
1022         unsigned long flags;
1023
1024 -       spin_lock_irqsave(&host->lock, flags);
1025 +       sdhci_spin_lock_irqsave(host, &flags);
1026         sdhci_enable_sdio_irq_nolock(host, enable);
1027 -       spin_unlock_irqrestore(&host->lock, flags);
1028 +       sdhci_spin_unlock_irqrestore(host, flags);
1029  }
1030
1031  static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host,
1032 @@ -2101,7 +2199,7 @@ static void sdhci_card_event(struct mmc_
1033         if (host->ops->card_event)
1034                 host->ops->card_event(host);
1035
1036 -       spin_lock_irqsave(&host->lock, flags);
1037 +       sdhci_spin_lock_irqsave(host, &flags);
1038
1039         /* Check host->mrq first in case we are runtime suspended */
1040         if (host->mrq && !sdhci_do_get_cd(host)) {
1041 @@ -2117,7 +2215,7 @@ static void sdhci_card_event(struct mmc_
1042                 tasklet_schedule(&host->finish_tasklet);
1043         }
1044
1045 -       spin_unlock_irqrestore(&host->lock, flags);
1046 +       sdhci_spin_unlock_irqrestore(host, flags);
1047  }
1048
1049  static const struct mmc_host_ops sdhci_ops = {
1050 @@ -2156,14 +2254,14 @@ static void sdhci_tasklet_finish(unsigne
1051
1052         host = (struct sdhci_host*)param;
1053
1054 -       spin_lock_irqsave(&host->lock, flags);
1055 +       sdhci_spin_lock_irqsave(host, &flags);
1056
1057          /*
1058           * If this tasklet gets rescheduled while running, it will
1059           * be run again afterwards but without any active request.
1060           */
1061         if (!host->mrq) {
1062 -               spin_unlock_irqrestore(&host->lock, flags);
1063 +               sdhci_spin_unlock_irqrestore(host, flags);
1064                 return;
1065         }
1066
1067 @@ -2201,7 +2299,7 @@ static void sdhci_tasklet_finish(unsigne
1068  #endif
1069
1070         mmiowb();
1071 -       spin_unlock_irqrestore(&host->lock, flags);
1072 +       sdhci_spin_unlock_irqrestore(host, flags);
1073
1074         mmc_request_done(host->mmc, mrq);
1075         sdhci_runtime_pm_put(host);
1076 @@ -2214,7 +2312,7 @@ static void sdhci_timeout_timer(unsigned
1077
1078         host = (struct sdhci_host*)data;
1079
1080 -       spin_lock_irqsave(&host->lock, flags);
1081 +       sdhci_spin_lock_irqsave(host, &flags);
1082
1083         if (host->mrq) {
1084                 pr_err("%s: Timeout waiting for hardware "
1085 @@ -2235,7 +2333,7 @@ static void sdhci_timeout_timer(unsigned
1086         }
1087
1088         mmiowb();
1089 -       spin_unlock_irqrestore(&host->lock, flags);
1090 +       sdhci_spin_unlock_irqrestore(host, flags);
1091  }
1092
1093  static void sdhci_tuning_timer(unsigned long data)
1094 @@ -2245,11 +2343,11 @@ static void sdhci_tuning_timer(unsigned
1095
1096         host = (struct sdhci_host *)data;
1097
1098 -       spin_lock_irqsave(&host->lock, flags);
1099 +       sdhci_spin_lock_irqsave(host, &flags);
1100
1101         host->flags |= SDHCI_NEEDS_RETUNING;
1102
1103 -       spin_unlock_irqrestore(&host->lock, flags);
1104 +       sdhci_spin_unlock_irqrestore(host, flags);
1105  }
1106
1107  /*****************************************************************************\
1108 @@ -2473,10 +2571,10 @@ static irqreturn_t sdhci_irq(int irq, vo
1109         u32 intmask, unexpected = 0;
1110         int cardint = 0, max_loops = 16;
1111
1112 -       spin_lock(&host->lock);
1113 +       sdhci_spin_lock(host);
1114
1115         if (host->runtime_suspended) {
1116 -               spin_unlock(&host->lock);
1117 +               sdhci_spin_unlock(host);
1118                 pr_warning("%s: got irq while runtime suspended\n",
1119                        mmc_hostname(host->mmc));
1120                 return IRQ_HANDLED;
1121 @@ -2588,7 +2686,7 @@ again:
1122         if (intmask && --max_loops)
1123                 goto again;
1124  out:
1125 -       spin_unlock(&host->lock);
1126 +       sdhci_spin_unlock(host);
1127
1128         if (unexpected) {
1129                 pr_err("%s: Unexpected interrupt 0x%08x.\n",
1130 @@ -2674,7 +2772,7 @@ int sdhci_resume_host(struct sdhci_host
1131         }
1132
1133         if (!device_may_wakeup(mmc_dev(host->mmc))) {
1134 -               ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1135 +               ret = request_irq(host->irq, sdhci_irq, 0 /*IRQF_SHARED*/,
1136                                   mmc_hostname(host->mmc), host);
1137                 if (ret)
1138                         return ret;
1139 @@ -2750,15 +2848,15 @@ int sdhci_runtime_suspend_host(struct sd
1140                 host->flags &= ~SDHCI_NEEDS_RETUNING;
1141         }
1142
1143 -       spin_lock_irqsave(&host->lock, flags);
1144 +       sdhci_spin_lock_irqsave(host, &flags);
1145         sdhci_mask_irqs(host, SDHCI_INT_ALL_MASK);
1146 -       spin_unlock_irqrestore(&host->lock, flags);
1147 +       sdhci_spin_unlock_irqrestore(host, flags);
1148
1149         synchronize_irq(host->irq);
1150
1151 -       spin_lock_irqsave(&host->lock, flags);
1152 +       sdhci_spin_lock_irqsave(host, &flags);
1153         host->runtime_suspended = true;
1154 -       spin_unlock_irqrestore(&host->lock, flags);
1155 +       sdhci_spin_unlock_irqrestore(host, flags);
1156
1157         return ret;
1158  }
1159 @@ -2784,16 +2882,16 @@ int sdhci_runtime_resume_host(struct sdh
1160         sdhci_do_start_signal_voltage_switch(host, &host->mmc->ios);
1161         if ((host_flags & SDHCI_PV_ENABLED) &&
1162                 !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) {
1163 -               spin_lock_irqsave(&host->lock, flags);
1164 +               sdhci_spin_lock_irqsave(host, &flags);
1165                 sdhci_enable_preset_value(host, true);
1166 -               spin_unlock_irqrestore(&host->lock, flags);
1167 +               sdhci_spin_unlock_irqrestore(host, flags);
1168         }
1169
1170         /* Set the re-tuning expiration flag */
1171         if (host->flags & SDHCI_USING_RETUNING_TIMER)
1172                 host->flags |= SDHCI_NEEDS_RETUNING;
1173
1174 -       spin_lock_irqsave(&host->lock, flags);
1175 +       sdhci_spin_lock_irqsave(host, &flags);
1176
1177         host->runtime_suspended = false;
1178
1179 @@ -2804,7 +2902,7 @@ int sdhci_runtime_resume_host(struct sdh
1180         /* Enable Card Detection */
1181         sdhci_enable_card_detection(host);
1182
1183 -       spin_unlock_irqrestore(&host->lock, flags);
1184 +       sdhci_spin_unlock_irqrestore(host, flags);
1185
1186         return ret;
1187  }
1188 @@ -3300,8 +3398,8 @@ int sdhci_add_host(struct sdhci_host *ho
1189
1190         sdhci_init(host, 0);
1191
1192 -       ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1193 -               mmc_hostname(mmc), host);
1194 +       ret = request_irq(host->irq, sdhci_irq, 0 /*IRQF_SHARED*/,
1195 +                mmc_hostname(mmc), host);
1196         if (ret) {
1197                 pr_err("%s: Failed to request IRQ %d: %d\n",
1198                        mmc_hostname(mmc), host->irq, ret);
1199 @@ -3362,7 +3460,7 @@ void sdhci_remove_host(struct sdhci_host
1200         unsigned long flags;
1201
1202         if (dead) {
1203 -               spin_lock_irqsave(&host->lock, flags);
1204 +               sdhci_spin_lock_irqsave(host, &flags);
1205
1206                 host->flags |= SDHCI_DEVICE_DEAD;
1207
1208 @@ -3374,7 +3472,7 @@ void sdhci_remove_host(struct sdhci_host
1209                         tasklet_schedule(&host->finish_tasklet);
1210                 }
1211
1212 -               spin_unlock_irqrestore(&host->lock, flags);
1213 +               sdhci_spin_unlock_irqrestore(host, flags);
1214         }
1215
1216         sdhci_disable_card_detection(host);
1217 --- a/drivers/mmc/host/sdhci.h
1218 +++ b/drivers/mmc/host/sdhci.h
1219 @@ -300,8 +300,6 @@ struct sdhci_ops {
1220                                       struct mmc_data *data);
1221         unsigned int    (*extra_ints)(struct sdhci_host *host);
1222         unsigned int    (*spurious_crc_acmd51)(struct sdhci_host *host);
1223 -       unsigned int    (*voltage_broken)(struct sdhci_host *host);
1224 -       unsigned int    (*uhs_broken)(struct sdhci_host *host);
1225         unsigned int    (*missing_status)(struct sdhci_host *host);
1226
1227         void    (*hw_reset)(struct sdhci_host *host);
1228 @@ -445,4 +443,10 @@ extern int sdhci_runtime_suspend_host(st
1229  extern int sdhci_runtime_resume_host(struct sdhci_host *host);
1230  #endif
1231
1232 +extern void sdhci_spin_lock_irqsave(struct sdhci_host *host,unsigned long *flags);
1233 +extern void sdhci_spin_unlock_irqrestore(struct sdhci_host *host,unsigned long flags);
1234 +extern void sdhci_spin_lock(struct sdhci_host *host);
1235 +extern void sdhci_spin_unlock(struct sdhci_host *host);
1236 +
1237 +
1238  #endif /* __SDHCI_HW_H */
1239 --- a/include/linux/mmc/host.h
1240 +++ b/include/linux/mmc/host.h
1241 @@ -282,6 +282,7 @@ struct mmc_host {
1242                                  MMC_CAP2_PACKED_WR)
1243  #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)  /* Don't power up before scan */
1244  #define MMC_CAP2_SANITIZE      (1 << 15)               /* Support Sanitize */
1245 +#define MMC_CAP2_FORCE_MULTIBLOCK (1 << 31)    /* Always use multiblock transfers */
1246
1247         mmc_pm_flag_t           pm_caps;        /* supported pm features */
1248
1249 --- a/include/linux/mmc/sdhci.h
1250 +++ b/include/linux/mmc/sdhci.h
1251 @@ -102,6 +102,7 @@ struct sdhci_host {
1252  #define SDHCI_QUIRK2_BROKEN_HS200                      (1<<6)
1253
1254         int irq;                /* Device IRQ */
1255 +       int second_irq;         /* Additional IRQ to disable/enable in low-latency mode */
1256         void __iomem *ioaddr;   /* Mapped address */
1257
1258         const struct sdhci_ops *ops;    /* Low level hw interface */