target/linux/bcm53xx/patches-4.3/043-clk-iproc-Fix-PLL-output-frequency-calculation.patch

   1 From 63243a4da7d0dfa19dcacd0a529782eeb2f86f92 Mon Sep 17 00:00:00 2001
   2 From: Simran Rai <ssimran@broadcom.com>
   3 Date: Mon, 19 Oct 2015 15:27:19 -0700
   4 Subject: [PATCH] clk: iproc: Fix PLL output frequency calculation
   5
   6 This patch affects the clocks that use fractional ndivider in their
   7 PLL output frequency calculation. Instead of 2^20 divide factor, the
   8 clock's ndiv integer shift was used. Fixed the bug by replacing ndiv
   9 integer shift with 2^20 factor.
  10
  11 Signed-off-by: Simran Rai <ssimran@broadcom.com>
  12 Signed-off-by: Ray Jui <rjui@broadcom.com>
  13 Reviewed-by: Scott Branden <sbranden@broadcom.com>
  14 Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support")
  15 Cc: <stable@vger.kernel.org> # v4.1+
  16 Signed-off-by: Michael Turquette <mturquette@baylibre.com>
  17 ---
  18  drivers/clk/bcm/clk-iproc-pll.c | 13 +++++--------
  19  1 file changed, 5 insertions(+), 8 deletions(-)
  20
  21 --- a/drivers/clk/bcm/clk-iproc-pll.c
  22 +++ b/drivers/clk/bcm/clk-iproc-pll.c
  23 @@ -345,8 +345,8 @@ static unsigned long iproc_pll_recalc_ra
  24         struct iproc_pll *pll = clk->pll;
  25         const struct iproc_pll_ctrl *ctrl = pll->ctrl;
  26         u32 val;
  27 -       u64 ndiv;
  28 -       unsigned int ndiv_int, ndiv_frac, pdiv;
  29 +       u64 ndiv, ndiv_int, ndiv_frac;
  30 +       unsigned int pdiv;
  31
  32         if (parent_rate == 0)
  33                 return 0;
  34 @@ -366,22 +366,19 @@ static unsigned long iproc_pll_recalc_ra
  35         val = readl(pll->pll_base + ctrl->ndiv_int.offset);
  36         ndiv_int = (val >> ctrl->ndiv_int.shift) &
  37                 bit_mask(ctrl->ndiv_int.width);
  38 -       ndiv = (u64)ndiv_int << ctrl->ndiv_int.shift;
  39 +       ndiv = ndiv_int << 20;
  40
  41         if (ctrl->flags & IPROC_CLK_PLL_HAS_NDIV_FRAC) {
  42                 val = readl(pll->pll_base + ctrl->ndiv_frac.offset);
  43                 ndiv_frac = (val >> ctrl->ndiv_frac.shift) &
  44                         bit_mask(ctrl->ndiv_frac.width);
  45 -
  46 -               if (ndiv_frac != 0)
  47 -                       ndiv = ((u64)ndiv_int << ctrl->ndiv_int.shift) |
  48 -                               ndiv_frac;
  49 +               ndiv += ndiv_frac;
  50         }
  51
  52         val = readl(pll->pll_base + ctrl->pdiv.offset);
  53         pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width);
  54
  55 -       clk->rate = (ndiv * parent_rate) >> ctrl->ndiv_int.shift;
  56 +       clk->rate = (ndiv * parent_rate) >> 20;
  57
  58         if (pdiv == 0)
  59                 clk->rate *= 2;