target/linux/bcm27xx/patches-5.4/950-0418-ARM-dts-Add-minimal-Raspberry-Pi-4-support.patch

   1 From 19a0ac654994661f63f7c9e099ed91a1210af161 Mon Sep 17 00:00:00 2001
   2 From: Stefan Wahren <wahrenst@gmx.net>
   3 Date: Sun, 6 Oct 2019 15:41:25 +0200
   4 Subject: [PATCH] ARM: dts: Add minimal Raspberry Pi 4 support
   5
   6 This adds minimal support for the new Raspberry Pi 4 without the
   7 fancy stuff like GENET, PCIe, xHCI, 40 bit DMA and V3D. The RPi 4 is
   8 available in 3 different variants (1, 2 and 4 GB RAM), so leave the memory
   9 size to zero and let the bootloader take care of it. The DWC2 is still
  10 usable as peripheral via the USB-C port.
  11
  12 Other differences to the Raspberry Pi 3:
  13 - additional GIC 400 Interrupt controller
  14 - new thermal IP and HWRNG
  15 - additional MMC interface (emmc2)
  16 - additional UART, I2C, SPI and PWM interfaces
  17 - clock stretching bug in I2C IP has been fixed
  18
  19 Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
  20 Acked-by: Eric Anholt <eric@anholt.net>
  21 Acked-by: Florian Fanelli <f.fainelli@gmail.com>
  22 ---
  23  arch/arm/boot/dts/Makefile                    |   1 +
  24  arch/arm/boot/dts/bcm2711-rpi-4-b.dts         | 123 +++
  25  arch/arm/boot/dts/bcm2711.dtsi                | 844 ++++++++++++++++++
  26  .../boot/dts/bcm283x-rpi-usb-peripheral.dtsi  |   7 +
  27  4 files changed, 975 insertions(+)
  28  create mode 100644 arch/arm/boot/dts/bcm2711-rpi-4-b.dts
  29  create mode 100644 arch/arm/boot/dts/bcm2711.dtsi
  30  create mode 100644 arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
  31
  32 --- a/arch/arm/boot/dts/Makefile
  33 +++ b/arch/arm/boot/dts/Makefile
  34 @@ -97,6 +97,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
  35         bcm2837-rpi-3-b.dtb \
  36         bcm2837-rpi-3-b-plus.dtb \
  37         bcm2837-rpi-cm3-io3.dtb \
  38 +       bcm2711-rpi-4-b.dtb \
  39         bcm2835-rpi-zero.dtb \
  40         bcm2835-rpi-zero-w.dtb
  41  dtb-$(CONFIG_ARCH_BCM_5301X) += \
  42 --- /dev/null
  43 +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
  44 @@ -0,0 +1,123 @@
  45 +// SPDX-License-Identifier: GPL-2.0
  46 +/dts-v1/;
  47 +#include "bcm2711.dtsi"
  48 +#include "bcm2835-rpi.dtsi"
  49 +#include "bcm283x-rpi-usb-peripheral.dtsi"
  50 +
  51 +/ {
  52 +       compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
  53 +       model = "Raspberry Pi 4 Model B";
  54 +
  55 +       chosen {
  56 +               /* 8250 auxiliary UART instead of pl011 */
  57 +               stdout-path = "serial1:115200n8";
  58 +       };
  59 +
  60 +       /* Will be filled by the bootloader */
  61 +       memory@0 {
  62 +               device_type = "memory";
  63 +               reg = <0 0 0>;
  64 +       };
  65 +
  66 +       leds {
  67 +               act {
  68 +                       gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
  69 +               };
  70 +
  71 +               pwr {
  72 +                       label = "PWR";
  73 +                       gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
  74 +               };
  75 +       };
  76 +
  77 +       wifi_pwrseq: wifi-pwrseq {
  78 +               compatible = "mmc-pwrseq-simple";
  79 +               reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
  80 +       };
  81 +
  82 +       sd_io_1v8_reg: sd_io_1v8_reg {
  83 +               compatible = "regulator-gpio";
  84 +               regulator-name = "vdd-sd-io";
  85 +               regulator-min-microvolt = <1800000>;
  86 +               regulator-max-microvolt = <3300000>;
  87 +               regulator-boot-on;
  88 +               regulator-always-on;
  89 +               regulator-settling-time-us = <5000>;
  90 +               gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
  91 +               states = <1800000 0x1
  92 +                         3300000 0x0>;
  93 +               status = "okay";
  94 +       };
  95 +};
  96 +
  97 +&firmware {
  98 +       expgpio: gpio {
  99 +               compatible = "raspberrypi,firmware-gpio";
 100 +               gpio-controller;
 101 +               #gpio-cells = <2>;
 102 +               gpio-line-names = "BT_ON",
 103 +                                 "WL_ON",
 104 +                                 "PWR_LED_OFF",
 105 +                                 "GLOBAL_RESET",
 106 +                                 "VDD_SD_IO_SEL",
 107 +                                 "CAM_GPIO",
 108 +                                 "",
 109 +                                 "";
 110 +               status = "okay";
 111 +       };
 112 +};
 113 +
 114 +&pwm1 {
 115 +       pinctrl-names = "default";
 116 +       pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
 117 +       status = "okay";
 118 +};
 119 +
 120 +/* SDHCI is used to control the SDIO for wireless */
 121 +&sdhci {
 122 +       #address-cells = <1>;
 123 +       #size-cells = <0>;
 124 +       pinctrl-names = "default";
 125 +       pinctrl-0 = <&emmc_gpio34>;
 126 +       bus-width = <4>;
 127 +       non-removable;
 128 +       mmc-pwrseq = <&wifi_pwrseq>;
 129 +       status = "okay";
 130 +
 131 +       brcmf: wifi@1 {
 132 +               reg = <1>;
 133 +               compatible = "brcm,bcm4329-fmac";
 134 +       };
 135 +};
 136 +
 137 +/* EMMC2 is used to drive the SD card */
 138 +&emmc2 {
 139 +       vqmmc-supply = <&sd_io_1v8_reg>;
 140 +       broken-cd;
 141 +       status = "okay";
 142 +};
 143 +
 144 +/* uart0 communicates with the BT module */
 145 +&uart0 {
 146 +       pinctrl-names = "default";
 147 +       pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
 148 +       uart-has-rtscts;
 149 +       status = "okay";
 150 +
 151 +       bluetooth {
 152 +               compatible = "brcm,bcm43438-bt";
 153 +               max-speed = <2000000>;
 154 +               shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
 155 +       };
 156 +};
 157 +
 158 +/* uart1 is mapped to the pin header */
 159 +&uart1 {
 160 +       pinctrl-names = "default";
 161 +       pinctrl-0 = <&uart1_gpio14>;
 162 +       status = "okay";
 163 +};
 164 +
 165 +&vchiq {
 166 +       interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 167 +};
 168 --- /dev/null
 169 +++ b/arch/arm/boot/dts/bcm2711.dtsi
 170 @@ -0,0 +1,844 @@
 171 +// SPDX-License-Identifier: GPL-2.0
 172 +#include "bcm283x.dtsi"
 173 +
 174 +#include <dt-bindings/interrupt-controller/arm-gic.h>
 175 +#include <dt-bindings/soc/bcm2835-pm.h>
 176 +
 177 +/ {
 178 +       compatible = "brcm,bcm2711";
 179 +
 180 +       #address-cells = <2>;
 181 +       #size-cells = <1>;
 182 +
 183 +       interrupt-parent = <&gicv2>;
 184 +
 185 +       soc {
 186 +               /*
 187 +                * Defined ranges:
 188 +                *   Common BCM283x peripherals
 189 +                *   BCM2711-specific peripherals
 190 +                *   ARM-local peripherals
 191 +                */
 192 +               ranges = <0x7e000000  0x0 0xfe000000  0x01800000>,
 193 +                        <0x7c000000  0x0 0xfc000000  0x02000000>,
 194 +                        <0x40000000  0x0 0xff800000  0x00800000>;
 195 +               /* Emulate a contiguous 30-bit address range for DMA */
 196 +               dma-ranges = <0xc0000000  0x0 0x00000000  0x3c000000>;
 197 +
 198 +               /*
 199 +                * This node is the provider for the enable-method for
 200 +                * bringing up secondary cores.
 201 +                */
 202 +               local_intc: local_intc@40000000 {
 203 +                       compatible = "brcm,bcm2836-l1-intc";
 204 +                       reg = <0x40000000 0x100>;
 205 +               };
 206 +
 207 +               gicv2: interrupt-controller@40041000 {
 208 +                       interrupt-controller;
 209 +                       #interrupt-cells = <3>;
 210 +                       compatible = "arm,gic-400";
 211 +                       reg =   <0x40041000 0x1000>,
 212 +                               <0x40042000 0x2000>,
 213 +                               <0x40044000 0x2000>,
 214 +                               <0x40046000 0x2000>;
 215 +                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
 216 +                                                IRQ_TYPE_LEVEL_HIGH)>;
 217 +               };
 218 +
 219 +               dma: dma@7e007000 {
 220 +                       compatible = "brcm,bcm2835-dma";
 221 +                       reg = <0x7e007000 0xb00>;
 222 +                       interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
 223 +                                    <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
 224 +                                    <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
 225 +                                    <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
 226 +                                    <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 227 +                                    <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 228 +                                    <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 229 +                                    /* DMA lite 7 - 10 */
 230 +                                    <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
 231 +                                    <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
 232 +                                    <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
 233 +                                    <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
 234 +                       interrupt-names = "dma0",
 235 +                                         "dma1",
 236 +                                         "dma2",
 237 +                                         "dma3",
 238 +                                         "dma4",
 239 +                                         "dma5",
 240 +                                         "dma6",
 241 +                                         "dma7",
 242 +                                         "dma8",
 243 +                                         "dma9",
 244 +                                         "dma10";
 245 +                       #dma-cells = <1>;
 246 +                       brcm,dma-channel-mask = <0x07f5>;
 247 +               };
 248 +
 249 +               pm: watchdog@7e100000 {
 250 +                       compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
 251 +                       #power-domain-cells = <1>;
 252 +                       #reset-cells = <1>;
 253 +                       reg = <0x7e100000 0x114>,
 254 +                             <0x7e00a000 0x24>,
 255 +                             <0x7ec11000 0x20>;
 256 +                       clocks = <&clocks BCM2835_CLOCK_V3D>,
 257 +                                <&clocks BCM2835_CLOCK_PERI_IMAGE>,
 258 +                                <&clocks BCM2835_CLOCK_H264>,
 259 +                                <&clocks BCM2835_CLOCK_ISP>;
 260 +                       clock-names = "v3d", "peri_image", "h264", "isp";
 261 +                       system-power-controller;
 262 +               };
 263 +
 264 +               rng@7e104000 {
 265 +                       interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
 266 +
 267 +                       /* RNG is incompatible with brcm,bcm2835-rng */
 268 +                       status = "disabled";
 269 +               };
 270 +
 271 +               uart2: serial@7e201400 {
 272 +                       compatible = "arm,pl011", "arm,primecell";
 273 +                       reg = <0x7e201400 0x200>;
 274 +                       interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 275 +                       clocks = <&clocks BCM2835_CLOCK_UART>,
 276 +                                <&clocks BCM2835_CLOCK_VPU>;
 277 +                       clock-names = "uartclk", "apb_pclk";
 278 +                       arm,primecell-periphid = <0x00241011>;
 279 +                       status = "disabled";
 280 +               };
 281 +
 282 +               uart3: serial@7e201600 {
 283 +                       compatible = "arm,pl011", "arm,primecell";
 284 +                       reg = <0x7e201600 0x200>;
 285 +                       interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 286 +                       clocks = <&clocks BCM2835_CLOCK_UART>,
 287 +                                <&clocks BCM2835_CLOCK_VPU>;
 288 +                       clock-names = "uartclk", "apb_pclk";
 289 +                       arm,primecell-periphid = <0x00241011>;
 290 +                       status = "disabled";
 291 +               };
 292 +
 293 +               uart4: serial@7e201800 {
 294 +                       compatible = "arm,pl011", "arm,primecell";
 295 +                       reg = <0x7e201800 0x200>;
 296 +                       interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 297 +                       clocks = <&clocks BCM2835_CLOCK_UART>,
 298 +                                <&clocks BCM2835_CLOCK_VPU>;
 299 +                       clock-names = "uartclk", "apb_pclk";
 300 +                       arm,primecell-periphid = <0x00241011>;
 301 +                       status = "disabled";
 302 +               };
 303 +
 304 +               uart5: serial@7e201a00 {
 305 +                       compatible = "arm,pl011", "arm,primecell";
 306 +                       reg = <0x7e201a00 0x200>;
 307 +                       interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 308 +                       clocks = <&clocks BCM2835_CLOCK_UART>,
 309 +                                <&clocks BCM2835_CLOCK_VPU>;
 310 +                       clock-names = "uartclk", "apb_pclk";
 311 +                       arm,primecell-periphid = <0x00241011>;
 312 +                       status = "disabled";
 313 +               };
 314 +
 315 +               spi3: spi@7e204600 {
 316 +                       compatible = "brcm,bcm2835-spi";
 317 +                       reg = <0x7e204600 0x0200>;
 318 +                       interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 319 +                       clocks = <&clocks BCM2835_CLOCK_VPU>;
 320 +                       #address-cells = <1>;
 321 +                       #size-cells = <0>;
 322 +                       status = "disabled";
 323 +               };
 324 +
 325 +               spi4: spi@7e204800 {
 326 +                       compatible = "brcm,bcm2835-spi";
 327 +                       reg = <0x7e204800 0x0200>;
 328 +                       interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 329 +                       clocks = <&clocks BCM2835_CLOCK_VPU>;
 330 +                       #address-cells = <1>;
 331 +                       #size-cells = <0>;
 332 +                       status = "disabled";
 333 +               };
 334 +
 335 +               spi5: spi@7e204a00 {
 336 +                       compatible = "brcm,bcm2835-spi";
 337 +                       reg = <0x7e204a00 0x0200>;
 338 +                       interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 339 +                       clocks = <&clocks BCM2835_CLOCK_VPU>;
 340 +                       #address-cells = <1>;
 341 +                       #size-cells = <0>;
 342 +                       status = "disabled";
 343 +               };
 344 +
 345 +               spi6: spi@7e204c00 {
 346 +                       compatible = "brcm,bcm2835-spi";
 347 +                       reg = <0x7e204c00 0x0200>;
 348 +                       interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 349 +                       clocks = <&clocks BCM2835_CLOCK_VPU>;
 350 +                       #address-cells = <1>;
 351 +                       #size-cells = <0>;
 352 +                       status = "disabled";
 353 +               };
 354 +
 355 +               i2c3: i2c@7e205600 {
 356 +                       compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 357 +                       reg = <0x7e205600 0x200>;
 358 +                       interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 359 +                       clocks = <&clocks BCM2835_CLOCK_VPU>;
 360 +                       #address-cells = <1>;
 361 +                       #size-cells = <0>;
 362 +                       status = "disabled";
 363 +               };
 364 +
 365 +               i2c4: i2c@7e205800 {
 366 +                       compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 367 +                       reg = <0x7e205800 0x200>;
 368 +                       interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 369 +                       clocks = <&clocks BCM2835_CLOCK_VPU>;
 370 +                       #address-cells = <1>;
 371 +                       #size-cells = <0>;
 372 +                       status = "disabled";
 373 +               };
 374 +
 375 +               i2c5: i2c@7e205a00 {
 376 +                       compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 377 +                       reg = <0x7e205a00 0x200>;
 378 +                       interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 379 +                       clocks = <&clocks BCM2835_CLOCK_VPU>;
 380 +                       #address-cells = <1>;
 381 +                       #size-cells = <0>;
 382 +                       status = "disabled";
 383 +               };
 384 +
 385 +               i2c6: i2c@7e205c00 {
 386 +                       compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 387 +                       reg = <0x7e205c00 0x200>;
 388 +                       interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 389 +                       clocks = <&clocks BCM2835_CLOCK_VPU>;
 390 +                       #address-cells = <1>;
 391 +                       #size-cells = <0>;
 392 +                       status = "disabled";
 393 +               };
 394 +
 395 +               pwm1: pwm@7e20c800 {
 396 +                       compatible = "brcm,bcm2835-pwm";
 397 +                       reg = <0x7e20c800 0x28>;
 398 +                       clocks = <&clocks BCM2835_CLOCK_PWM>;
 399 +                       assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
 400 +                       assigned-clock-rates = <10000000>;
 401 +                       #pwm-cells = <2>;
 402 +                       status = "disabled";
 403 +               };
 404 +
 405 +               emmc2: emmc2@7e340000 {
 406 +                       compatible = "brcm,bcm2711-emmc2";
 407 +                       reg = <0x7e340000 0x100>;
 408 +                       interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 409 +                       clocks = <&clocks BCM2711_CLOCK_EMMC2>;
 410 +                       status = "disabled";
 411 +               };
 412 +
 413 +               hvs@7e400000 {
 414 +                       interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 415 +               };
 416 +       };
 417 +
 418 +       arm-pmu {
 419 +               compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";
 420 +               interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 421 +                       <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
 422 +                       <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 423 +                       <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 424 +               interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 425 +       };
 426 +
 427 +       timer {
 428 +               compatible = "arm,armv8-timer";
 429 +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
 430 +                                         IRQ_TYPE_LEVEL_LOW)>,
 431 +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
 432 +                                         IRQ_TYPE_LEVEL_LOW)>,
 433 +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
 434 +                                         IRQ_TYPE_LEVEL_LOW)>,
 435 +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
 436 +                                         IRQ_TYPE_LEVEL_LOW)>;
 437 +               /* This only applies to the ARMv7 stub */
 438 +               arm,cpu-registers-not-fw-configured;
 439 +       };
 440 +
 441 +       cpus: cpus {
 442 +               #address-cells = <1>;
 443 +               #size-cells = <0>;
 444 +               enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
 445 +
 446 +               cpu0: cpu@0 {
 447 +                       device_type = "cpu";
 448 +                       compatible = "arm,cortex-a72";
 449 +                       reg = <0>;
 450 +                       enable-method = "spin-table";
 451 +                       cpu-release-addr = <0x0 0x000000d8>;
 452 +               };
 453 +
 454 +               cpu1: cpu@1 {
 455 +                       device_type = "cpu";
 456 +                       compatible = "arm,cortex-a72";
 457 +                       reg = <1>;
 458 +                       enable-method = "spin-table";
 459 +                       cpu-release-addr = <0x0 0x000000e0>;
 460 +               };
 461 +
 462 +               cpu2: cpu@2 {
 463 +                       device_type = "cpu";
 464 +                       compatible = "arm,cortex-a72";
 465 +                       reg = <2>;
 466 +                       enable-method = "spin-table";
 467 +                       cpu-release-addr = <0x0 0x000000e8>;
 468 +               };
 469 +
 470 +               cpu3: cpu@3 {
 471 +                       device_type = "cpu";
 472 +                       compatible = "arm,cortex-a72";
 473 +                       reg = <3>;
 474 +                       enable-method = "spin-table";
 475 +                       cpu-release-addr = <0x0 0x000000f0>;
 476 +               };
 477 +       };
 478 +};
 479 +
 480 +&clk_osc {
 481 +       clock-frequency = <54000000>;
 482 +};
 483 +
 484 +&clocks {
 485 +       compatible = "brcm,bcm2711-cprman";
 486 +};
 487 +
 488 +&cpu_thermal {
 489 +       coefficients = <(-487) 410040>;
 490 +};
 491 +
 492 +&dsi0 {
 493 +       interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 494 +};
 495 +
 496 +&dsi1 {
 497 +       interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 498 +};
 499 +
 500 +&gpio {
 501 +       compatible = "brcm,bcm2711-gpio";
 502 +       interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
 503 +                    <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
 504 +                    <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
 505 +                    <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
 506 +
 507 +       gpclk0_gpio49: gpclk0_gpio49 {
 508 +               pin-gpclk {
 509 +                       pins = "gpio49";
 510 +                       function = "alt1";
 511 +                       bias-disable;
 512 +               };
 513 +       };
 514 +       gpclk1_gpio50: gpclk1_gpio50 {
 515 +               pin-gpclk {
 516 +                       pins = "gpio50";
 517 +                       function = "alt1";
 518 +                       bias-disable;
 519 +               };
 520 +       };
 521 +       gpclk2_gpio51: gpclk2_gpio51 {
 522 +               pin-gpclk {
 523 +                       pins = "gpio51";
 524 +                       function = "alt1";
 525 +                       bias-disable;
 526 +               };
 527 +       };
 528 +
 529 +       i2c0_gpio46: i2c0_gpio46 {
 530 +               pin-sda {
 531 +                       function = "alt0";
 532 +                       pins = "gpio46";
 533 +                       bias-pull-up;
 534 +               };
 535 +               pin-scl {
 536 +                       function = "alt0";
 537 +                       pins = "gpio47";
 538 +                       bias-disable;
 539 +               };
 540 +       };
 541 +       i2c1_gpio46: i2c1_gpio46 {
 542 +               pin-sda {
 543 +                       function = "alt1";
 544 +                       pins = "gpio46";
 545 +                       bias-pull-up;
 546 +               };
 547 +               pin-scl {
 548 +                       function = "alt1";
 549 +                       pins = "gpio47";
 550 +                       bias-disable;
 551 +               };
 552 +       };
 553 +       i2c3_gpio2: i2c3_gpio2 {
 554 +               pin-sda {
 555 +                       function = "alt5";
 556 +                       pins = "gpio2";
 557 +                       bias-pull-up;
 558 +               };
 559 +               pin-scl {
 560 +                       function = "alt5";
 561 +                       pins = "gpio3";
 562 +                       bias-disable;
 563 +               };
 564 +       };
 565 +       i2c3_gpio4: i2c3_gpio4 {
 566 +               pin-sda {
 567 +                       function = "alt5";
 568 +                       pins = "gpio4";
 569 +                       bias-pull-up;
 570 +               };
 571 +               pin-scl {
 572 +                       function = "alt5";
 573 +                       pins = "gpio5";
 574 +                       bias-disable;
 575 +               };
 576 +       };
 577 +       i2c4_gpio6: i2c4_gpio6 {
 578 +               pin-sda {
 579 +                       function = "alt5";
 580 +                       pins = "gpio6";
 581 +                       bias-pull-up;
 582 +               };
 583 +               pin-scl {
 584 +                       function = "alt5";
 585 +                       pins = "gpio7";
 586 +                       bias-disable;
 587 +               };
 588 +       };
 589 +       i2c4_gpio8: i2c4_gpio8 {
 590 +               pin-sda {
 591 +                       function = "alt5";
 592 +                       pins = "gpio8";
 593 +                       bias-pull-up;
 594 +               };
 595 +               pin-scl {
 596 +                       function = "alt5";
 597 +                       pins = "gpio9";
 598 +                       bias-disable;
 599 +               };
 600 +       };
 601 +       i2c5_gpio10: i2c5_gpio10 {
 602 +               pin-sda {
 603 +                       function = "alt5";
 604 +                       pins = "gpio10";
 605 +                       bias-pull-up;
 606 +               };
 607 +               pin-scl {
 608 +                       function = "alt5";
 609 +                       pins = "gpio11";
 610 +                       bias-disable;
 611 +               };
 612 +       };
 613 +       i2c5_gpio12: i2c5_gpio12 {
 614 +               pin-sda {
 615 +                       function = "alt5";
 616 +                       pins = "gpio12";
 617 +                       bias-pull-up;
 618 +               };
 619 +               pin-scl {
 620 +                       function = "alt5";
 621 +                       pins = "gpio13";
 622 +                       bias-disable;
 623 +               };
 624 +       };
 625 +       i2c6_gpio0: i2c6_gpio0 {
 626 +               pin-sda {
 627 +                       function = "alt5";
 628 +                       pins = "gpio0";
 629 +                       bias-pull-up;
 630 +               };
 631 +               pin-scl {
 632 +                       function = "alt5";
 633 +                       pins = "gpio1";
 634 +                       bias-disable;
 635 +               };
 636 +       };
 637 +       i2c6_gpio22: i2c6_gpio22 {
 638 +               pin-sda {
 639 +                       function = "alt5";
 640 +                       pins = "gpio22";
 641 +                       bias-pull-up;
 642 +               };
 643 +               pin-scl {
 644 +                       function = "alt5";
 645 +                       pins = "gpio23";
 646 +                       bias-disable;
 647 +               };
 648 +       };
 649 +       i2c_slave_gpio8: i2c_slave_gpio8 {
 650 +               pins-i2c-slave {
 651 +                       pins = "gpio8",
 652 +                              "gpio9",
 653 +                              "gpio10",
 654 +                              "gpio11";
 655 +                       function = "alt3";
 656 +               };
 657 +       };
 658 +
 659 +       jtag_gpio48: jtag_gpio48 {
 660 +               pins-jtag {
 661 +                       pins = "gpio48",
 662 +                              "gpio49",
 663 +                              "gpio50",
 664 +                              "gpio51",
 665 +                              "gpio52",
 666 +                              "gpio53";
 667 +                       function = "alt4";
 668 +               };
 669 +       };
 670 +
 671 +       mii_gpio28: mii_gpio28 {
 672 +               pins-mii {
 673 +                       pins = "gpio28",
 674 +                              "gpio29",
 675 +                              "gpio30",
 676 +                              "gpio31";
 677 +                       function = "alt4";
 678 +               };
 679 +       };
 680 +       mii_gpio36: mii_gpio36 {
 681 +               pins-mii {
 682 +                       pins = "gpio36",
 683 +                              "gpio37",
 684 +                              "gpio38",
 685 +                              "gpio39";
 686 +                       function = "alt5";
 687 +               };
 688 +       };
 689 +
 690 +       pcm_gpio50: pcm_gpio50 {
 691 +               pins-pcm {
 692 +                       pins = "gpio50",
 693 +                              "gpio51",
 694 +                              "gpio52",
 695 +                              "gpio53";
 696 +                       function = "alt2";
 697 +               };
 698 +       };
 699 +
 700 +       pwm0_0_gpio12: pwm0_0_gpio12 {
 701 +               pin-pwm {
 702 +                       pins = "gpio12";
 703 +                       function = "alt0";
 704 +                       bias-disable;
 705 +               };
 706 +       };
 707 +       pwm0_0_gpio18: pwm0_0_gpio18 {
 708 +               pin-pwm {
 709 +                       pins = "gpio18";
 710 +                       function = "alt5";
 711 +                       bias-disable;
 712 +               };
 713 +       };
 714 +       pwm1_0_gpio40: pwm1_0_gpio40 {
 715 +               pin-pwm {
 716 +                       pins = "gpio40";
 717 +                       function = "alt0";
 718 +                       bias-disable;
 719 +               };
 720 +       };
 721 +       pwm0_1_gpio13: pwm0_1_gpio13 {
 722 +               pin-pwm {
 723 +                       pins = "gpio13";
 724 +                       function = "alt0";
 725 +                       bias-disable;
 726 +               };
 727 +       };
 728 +       pwm0_1_gpio19: pwm0_1_gpio19 {
 729 +               pin-pwm {
 730 +                       pins = "gpio19";
 731 +                       function = "alt5";
 732 +                       bias-disable;
 733 +               };
 734 +       };
 735 +       pwm1_1_gpio41: pwm1_1_gpio41 {
 736 +               pin-pwm {
 737 +                       pins = "gpio41";
 738 +                       function = "alt0";
 739 +                       bias-disable;
 740 +               };
 741 +       };
 742 +       pwm0_1_gpio45: pwm0_1_gpio45 {
 743 +               pin-pwm {
 744 +                       pins = "gpio45";
 745 +                       function = "alt0";
 746 +                       bias-disable;
 747 +               };
 748 +       };
 749 +       pwm0_0_gpio52: pwm0_0_gpio52 {
 750 +               pin-pwm {
 751 +                       pins = "gpio52";
 752 +                       function = "alt1";
 753 +                       bias-disable;
 754 +               };
 755 +       };
 756 +       pwm0_1_gpio53: pwm0_1_gpio53 {
 757 +               pin-pwm {
 758 +                       pins = "gpio53";
 759 +                       function = "alt1";
 760 +                       bias-disable;
 761 +               };
 762 +       };
 763 +
 764 +       rgmii_gpio35: rgmii_gpio35 {
 765 +               pin-start-stop {
 766 +                       pins = "gpio35";
 767 +                       function = "alt4";
 768 +               };
 769 +               pin-rx-ok {
 770 +                       pins = "gpio36";
 771 +                       function = "alt4";
 772 +               };
 773 +       };
 774 +       rgmii_irq_gpio34: rgmii_irq_gpio34 {
 775 +               pin-irq {
 776 +                       pins = "gpio34";
 777 +                       function = "alt5";
 778 +               };
 779 +       };
 780 +       rgmii_irq_gpio39: rgmii_irq_gpio39 {
 781 +               pin-irq {
 782 +                       pins = "gpio39";
 783 +                       function = "alt4";
 784 +               };
 785 +       };
 786 +       rgmii_mdio_gpio28: rgmii_mdio_gpio28 {
 787 +               pins-mdio {
 788 +                       pins = "gpio28",
 789 +                              "gpio29";
 790 +                       function = "alt5";
 791 +               };
 792 +       };
 793 +       rgmii_mdio_gpio37: rgmii_mdio_gpio37 {
 794 +               pins-mdio {
 795 +                       pins = "gpio37",
 796 +                              "gpio38";
 797 +                       function = "alt4";
 798 +               };
 799 +       };
 800 +
 801 +       spi0_gpio46: spi0_gpio46 {
 802 +               pins-spi {
 803 +                       pins = "gpio46",
 804 +                              "gpio47",
 805 +                              "gpio48",
 806 +                              "gpio49";
 807 +                       function = "alt2";
 808 +               };
 809 +       };
 810 +       spi2_gpio46: spi2_gpio46 {
 811 +               pins-spi {
 812 +                       pins = "gpio46",
 813 +                              "gpio47",
 814 +                              "gpio48",
 815 +                              "gpio49",
 816 +                              "gpio50";
 817 +                       function = "alt5";
 818 +               };
 819 +       };
 820 +       spi3_gpio0: spi3_gpio0 {
 821 +               pins-spi {
 822 +                       pins = "gpio0",
 823 +                              "gpio1",
 824 +                              "gpio2",
 825 +                              "gpio3";
 826 +                       function = "alt3";
 827 +               };
 828 +       };
 829 +       spi4_gpio4: spi4_gpio4 {
 830 +               pins-spi {
 831 +                       pins = "gpio4",
 832 +                              "gpio5",
 833 +                              "gpio6",
 834 +                              "gpio7";
 835 +                       function = "alt3";
 836 +               };
 837 +       };
 838 +       spi5_gpio12: spi5_gpio12 {
 839 +               pins-spi {
 840 +                       pins = "gpio12",
 841 +                              "gpio13",
 842 +                              "gpio14",
 843 +                              "gpio15";
 844 +                       function = "alt3";
 845 +               };
 846 +       };
 847 +       spi6_gpio18: spi6_gpio18 {
 848 +               pins-spi {
 849 +                       pins = "gpio18",
 850 +                              "gpio19",
 851 +                              "gpio20",
 852 +                              "gpio21";
 853 +                       function = "alt3";
 854 +               };
 855 +       };
 856 +
 857 +       uart2_gpio0: uart2_gpio0 {
 858 +               pin-tx {
 859 +                       pins = "gpio0";
 860 +                       function = "alt4";
 861 +                       bias-disable;
 862 +               };
 863 +               pin-rx {
 864 +                       pins = "gpio1";
 865 +                       function = "alt4";
 866 +                       bias-pull-up;
 867 +               };
 868 +       };
 869 +       uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 {
 870 +               pin-cts {
 871 +                       pins = "gpio2";
 872 +                       function = "alt4";
 873 +                       bias-pull-up;
 874 +               };
 875 +               pin-rts {
 876 +                       pins = "gpio3";
 877 +                       function = "alt4";
 878 +                       bias-disable;
 879 +               };
 880 +       };
 881 +       uart3_gpio4: uart3_gpio4 {
 882 +               pin-tx {
 883 +                       pins = "gpio4";
 884 +                       function = "alt4";
 885 +                       bias-disable;
 886 +               };
 887 +               pin-rx {
 888 +                       pins = "gpio5";
 889 +                       function = "alt4";
 890 +                       bias-pull-up;
 891 +               };
 892 +       };
 893 +       uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 {
 894 +               pin-cts {
 895 +                       pins = "gpio6";
 896 +                       function = "alt4";
 897 +                       bias-pull-up;
 898 +               };
 899 +               pin-rts {
 900 +                       pins = "gpio7";
 901 +                       function = "alt4";
 902 +                       bias-disable;
 903 +               };
 904 +       };
 905 +       uart4_gpio8: uart4_gpio8 {
 906 +               pin-tx {
 907 +                       pins = "gpio8";
 908 +                       function = "alt4";
 909 +                       bias-disable;
 910 +               };
 911 +               pin-rx {
 912 +                       pins = "gpio9";
 913 +                       function = "alt4";
 914 +                       bias-pull-up;
 915 +               };
 916 +       };
 917 +       uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 {
 918 +               pin-cts {
 919 +                       pins = "gpio10";
 920 +                       function = "alt4";
 921 +                       bias-pull-up;
 922 +               };
 923 +               pin-rts {
 924 +                       pins = "gpio11";
 925 +                       function = "alt4";
 926 +                       bias-disable;
 927 +               };
 928 +       };
 929 +       uart5_gpio12: uart5_gpio12 {
 930 +               pin-tx {
 931 +                       pins = "gpio12";
 932 +                       function = "alt4";
 933 +                       bias-disable;
 934 +               };
 935 +               pin-rx {
 936 +                       pins = "gpio13";
 937 +                       function = "alt4";
 938 +                       bias-pull-up;
 939 +               };
 940 +       };
 941 +       uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 {
 942 +               pin-cts {
 943 +                       pins = "gpio14";
 944 +                       function = "alt4";
 945 +                       bias-pull-up;
 946 +               };
 947 +               pin-rts {
 948 +                       pins = "gpio15";
 949 +                       function = "alt4";
 950 +                       bias-disable;
 951 +               };
 952 +       };
 953 +};
 954 +
 955 +&i2c0 {
 956 +       compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 957 +       interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 958 +};
 959 +
 960 +&i2c1 {
 961 +       compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 962 +       interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 963 +};
 964 +
 965 +&mailbox {
 966 +       interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 967 +};
 968 +
 969 +&sdhci {
 970 +       interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 971 +};
 972 +
 973 +&sdhost {
 974 +       interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 975 +};
 976 +
 977 +&spi {
 978 +       interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 979 +};
 980 +
 981 +&spi1 {
 982 +       interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 983 +};
 984 +
 985 +&spi2 {
 986 +       interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 987 +};
 988 +
 989 +&system_timer {
 990 +       interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
 991 +                    <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
 992 +                    <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
 993 +                    <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 994 +};
 995 +
 996 +&txp {
 997 +       interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 998 +};
 999 +
1000 +&uart0 {
1001 +       interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1002 +};
1003 +
1004 +&uart1 {
1005 +       interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
1006 +};
1007 +
1008 +&usb {
1009 +       interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1010 +};
1011 +
1012 +&vec {
1013 +       interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
1014 +};
1015 --- /dev/null
1016 +++ b/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi
1017 @@ -0,0 +1,7 @@
1018 +// SPDX-License-Identifier: GPL-2.0
1019 +&usb {
1020 +       dr_mode = "peripheral";
1021 +       g-rx-fifo-size = <256>;
1022 +       g-np-tx-fifo-size = <32>;
1023 +       g-tx-fifo-size = <256 256 512 512 512 768 768>;
1024 +};