1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
6 compatible = "qca,qca9560";
12 bootargs = "console=ttyS0,115200n8";
21 compatible = "mips,mips74Kc";
22 clocks = <&pll ATH79_CLK_CPU>;
28 compatible = "fixed-clock";
30 clock-output-names = "ref";
31 clock-frequency = <25000000>;
36 ddr_ctrl: memory-controller@18000000 {
37 compatible = "qca,qca9560-ddr-controller",
38 "qca,ar7240-ddr-controller";
39 reg = <0x18000000 0x100>;
41 #qca,ddr-wb-channel-cells = <1>;
45 compatible = "ns16550a";
46 reg = <0x18020000 0x20>;
50 clocks = <&pll ATH79_CLK_REF>;
61 compatible = "qca,qca9560-gpio",
63 reg = <0x18040000 0x28>;
72 #interrupt-cells = <2>;
75 pinmux: pinmux@1804002c {
76 compatible = "pinctrl-single";
78 reg = <0x1804002c 0x44>;
82 pinctrl-single,bit-per-mux;
83 pinctrl-single,register-width = <32>;
84 pinctrl-single,function-mask = <0x1>;
87 jtag_disable_pins: pinmux_jtag_disable_pins {
88 pinctrl-single,bits = <0x40 0x2 0x2>;
92 pll: pll-controller@18050000 {
93 compatible = "qca,qca9560-pll", "syscon";
94 reg = <0x18050000 0x50>;
97 clock-output-names = "cpu", "ddr", "ahb";
103 compatible = "qca,ar7130-wdt";
104 reg = <0x18060008 0x8>;
108 clocks = <&pll ATH79_CLK_AHB>;
112 rst: reset-controller@1806001c {
113 compatible = "qca,qca9560-reset",
115 reg = <0x1806001c 0x4>;
118 interrupt-parent = <&cpuintc>;
120 intc3: interrupt-controller {
121 compatible = "qca,ar9340-intc";
123 interrupt-parent = <&cpuintc>;
126 interrupt-controller;
127 #interrupt-cells = <1>;
129 qca,int-status-addr = <0xac>;
130 qca,pending-bits = <0x1f000>, /* pcie rc */
131 <0x1000000>, /* usb1 */
132 <0x10000000>; /* usb2 */
136 rst2: reset-controller@180600c0 {
137 compatible = "qca,qca9560-reset",
140 reg = <0x180600c0 0x4>;
146 gmac: gmac@18070000 {
147 compatible = "qca,qca9560-gmac";
148 reg = <0x18070000 0x64>;
151 wmac: wmac@18100000 {
152 compatible = "qca,qca9560-wmac";
153 reg = <0x18100000 0x10000>;
155 interrupt-parent = <&cpuintc>;
161 pcie: pcie-controller@18250000 {
162 compatible = "qcom,ar7240-pci";
163 #address-cells = <3>;
165 bus-range = <0x0 0x0>;
166 reg = <0x18250000 0x1000>, /* CRP */
167 <0x18280000 0x100>, /* CTRL */
168 <0x16000000 0x1000>; /* CFG */
169 reg-names = "crp_base", "ctrl_base", "cfg_base";
170 ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
171 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
172 interrupt-parent = <&intc3>;
175 resets = <&rst 6>, <&rst 7>;
176 reset-names = "hc", "phy";
178 interrupt-controller;
179 #interrupt-cells = <1>;
181 interrupt-map-mask = <0 0 0 1>;
182 interrupt-map = <0 0 0 0 &pcie 0>;
187 compatible = "generic-ehci";
188 reg = <0x1b000000 0x1d8>;
190 interrupt-parent = <&intc3>;
194 reset-names = "usb-host";
196 has-transaction-translator;
197 caps-offset = <0x100>;
199 phy-names = "usb-phy0";
206 compatible = "generic-ehci";
207 reg = <0x1b400000 0x1d8>;
209 interrupt-parent = <&intc3>;
213 reset-names = "usb-host";
215 has-transaction-translator;
216 caps-offset = <0x100>;
218 phy-names = "usb-phy1";
225 compatible = "qca,ar934x-spi";
226 reg = <0x1f000000 0x1c>;
228 clocks = <&pll ATH79_CLK_AHB>;
232 #address-cells = <1>;
238 compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
240 reset-names = "usb-phy", "usb-suspend-override";
241 resets = <&rst 4>, <&rst 3>;
249 compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
251 reset-names = "usb-phy", "usb-suspend-override";
252 resets = <&rst2 4>, <&rst2 3>;
262 reset-names = "mdio";
266 compatible = "qca,qca9560-eth", "syscon";
268 pll-data = <0x03000000 0x00000101 0x00001919>;
269 pll-reg = <0 0x48 0>;
279 reset-names = "mdio";
282 builtin_switch: switch0@1f {
283 compatible = "qca,ar8229";
286 reset-names = "switch";
289 qca,mib-poll-interval = <500>;
292 #address-cells = <1>;
295 swphy0: ethernet-phy@0 {
300 swphy4: ethernet-phy@4 {
309 compatible = "qca,qca9560-eth", "syscon";