1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
6 compatible = "qca,qca9560";
17 compatible = "mips,mips74Kc";
18 clocks = <&pll ATH79_CLK_CPU>;
24 compatible = "fixed-clock";
26 clock-output-names = "ref";
27 clock-frequency = <25000000>;
32 ddr_ctrl: memory-controller@18000000 {
33 compatible = "qca,qca9560-ddr-controller",
34 "qca,ar7240-ddr-controller";
35 reg = <0x18000000 0x100>;
37 #qca,ddr-wb-channel-cells = <1>;
41 compatible = "ns16550a";
42 reg = <0x18020000 0x20>;
46 clocks = <&pll ATH79_CLK_REF>;
57 compatible = "qca,qca9560-gpio",
59 reg = <0x18040000 0x28>;
68 #interrupt-cells = <2>;
71 pinmux: pinmux@1804002c {
72 compatible = "pinctrl-single";
74 reg = <0x1804002c 0x40>;
78 pinctrl-single,bit-per-mux;
79 pinctrl-single,register-width = <32>;
80 pinctrl-single,function-mask = <0x1>;
83 jtag_disable_pins: pinmux_jtag_disable_pins {
84 pinctrl-single,bits = <0x40 0x2 0x2>;
88 pll: pll-controller@18050000 {
89 compatible = "qca,qca9560-pll", "syscon";
90 reg = <0x18050000 0x50>;
93 clock-output-names = "cpu", "ddr", "ahb";
99 compatible = "qca,ar7130-wdt";
100 reg = <0x18060008 0x8>;
104 clocks = <&pll ATH79_CLK_AHB>;
108 rst: reset-controller@1806001c {
109 compatible = "qca,qca9560-reset",
112 reg = <0x1806001c 0x4>;
115 interrupt-parent = <&cpuintc>;
117 intc3: interrupt-controller@3 {
118 compatible = "qca,ar9340-intc";
120 interrupt-parent = <&cpuintc>;
123 interrupt-controller;
124 #interrupt-cells = <1>;
126 qca,int-status-addr = <0xac>;
127 qca,pending-bits = <0x1f000>, /* pcie rc */
128 <0x1000000>, /* usb1 */
129 <0x10000000>; /* usb2 */
133 rst2: reset-controller@180600c0 {
134 compatible = "qca,qca9560-reset",
137 reg = <0x180600c0 0x4>;
142 wmac: wmac@18100000 {
143 compatible = "qca,qca9560-wmac";
144 reg = <0x18100000 0x10000>;
146 interrupt-parent = <&cpuintc>;
152 pcie: pcie-controller@18250000 {
153 compatible = "qcom,ar7240-pci";
154 #address-cells = <3>;
156 bus-range = <0x0 0x0>;
157 reg = <0x18250000 0x1000>, /* CRP */
158 <0x18280000 0x100>, /* CTRL */
159 <0x16000000 0x1000>; /* CFG */
160 reg-names = "crp_base", "ctrl_base", "cfg_base";
161 ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
162 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
163 interrupt-parent = <&intc3>;
166 interrupt-controller;
167 #interrupt-cells = <1>;
169 interrupt-map-mask = <0 0 0 1>;
170 interrupt-map = <0 0 0 0 &pcie 0>;
176 compatible = "generic-ehci";
177 reg = <0x1b000000 0x1d8>;
179 interrupt-parent = <&intc3>;
183 reset-names = "usb-host";
185 has-transaction-translator;
186 caps-offset = <0x100>;
188 phy-names = "usb-phy0";
195 compatible = "generic-ehci";
196 reg = <0x1b400000 0x1d8>;
198 interrupt-parent = <&intc3>;
202 reset-names = "usb-host";
204 has-transaction-translator;
205 caps-offset = <0x100>;
207 phy-names = "usb-phy1";
214 compatible = "qca,qca9560-spi", "qca,ar7100-spi";
215 reg = <0x1f000000 0x10>;
217 clocks = <&pll ATH79_CLK_AHB>;
222 #address-cells = <1>;
228 compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
230 reset-names = "usb-phy", "usb-suspend-override";
231 resets = <&rst 4>, <&rst 3>;
239 compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
241 reset-names = "usb-phy", "usb-suspend-override";
242 resets = <&rst2 4>, <&rst2 3>;
252 reset-names = "mdio";
256 compatible = "qca,qca9560-eth", "syscon", "simple-mfd";
258 pll-data = <0x03000000 0x00000101 0x00001919>;
259 pll-reg = <0 0x48 0>;
269 reset-names = "mdio";
272 builtin_switch: switch0@1f {
273 compatible = "qca,ar8229-builtin";
274 #address-cells = <1>;
282 swphy0: ethernet-phy@0 {
287 swphy4: ethernet-phy@4 {
296 compatible = "qca,qca9560-eth", "syscon", "simple-mfd";