ath79: make TP-Link revision naming consistent
[oweals/openwrt.git] / target / linux / ath79 / dts / qca9563_dlink_dir-859-a1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "qca956x.dtsi"
8
9 / {
10         model = "D-Link DIR-859 A1";
11         compatible = "dlink,dir-859-a1", "qca,qca9563";
12
13         aliases {
14                 led-boot = &power;
15                 led-failsafe = &power;
16                 led-running = &power;
17                 led-upgrade = &power;
18         };
19
20         chosen {
21                 bootargs = "console=ttyS0,115200n8";
22         };
23
24         leds {
25                 compatible = "gpio-leds";
26
27                 wps {
28                         label = "dir-859-a1:green:wps";
29                         gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
30                 };
31
32                 power: power {
33                         label = "dir-859-a1:green:power";
34                         gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
35                 };
36
37                 internet {
38                         label = "dir-859-a1:green:internet";
39                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
40                 };
41
42                 wlan {
43                         label = "dir-859-a1:green:wlan";
44                         gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
45                         linux,default-trigger = "phy0tpt";
46                 };
47         };
48
49         keys {
50                 compatible = "gpio-keys-polled";
51                 poll-interval = <20>;
52
53                 wps {
54                         linux,code = <KEY_RESTART>;
55                         gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
56                         debounce-interval = <60>;
57                 };
58
59                 reset {
60                         linux,code = <KEY_RESTART>;
61                         gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
62                         debounce-interval = <60>;
63                 };
64         };
65
66         gpio-export {
67                 compatible = "gpio-export";
68                 #size-cells = <0>;
69
70                 gpio_switch_reset {
71                         gpio-export,name = "dir-859-a1:reset:switch";
72                         gpio-export,output = <1>;
73                         gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
74                 };
75         };
76 };
77
78 &uart {
79         status = "okay";
80 };
81
82 &gpio {
83         status = "okay";
84 };
85
86 &pcie {
87         status = "okay";
88 };
89
90 &spi {
91         num-cs = <1>;
92
93         status = "okay";
94
95         flash@0 {
96                 compatible = "jedec,spi-nor";
97                 reg = <0>;
98                 spi-max-frequency = <30000000>;
99
100                 partitions {
101                         compatible = "fixed-partitions";
102                         #address-cells = <1>;
103                         #size-cells = <1>;
104
105                         partition@0 {
106                                 label = "bootloader";
107                                 reg = <0x000000 0x40000>;
108                                 read-only;
109                         };
110
111                         partition@40000 {
112                                 label = "bdcfg";
113                                 reg = <0x040000 0x10000>;
114                                 read-only;
115                         };
116
117                         partition@50000 {
118                                 label = "devdata";
119                                 reg = <0x050000 0x10000>;
120                                 read-only;
121                         };
122
123                         partition@60000 {
124                                 label = "devconf";
125                                 reg = <0x060000 0x10000>;
126                                 read-only;
127                         };
128
129                         partition@70000 {
130                                 compatible = "seama";
131                                 label = "firmware";
132                                 reg = <0x070000 0xf80000>;
133                         };
134
135                         art: partition@ff0000 {
136                                 label = "art";
137                                 reg = <0xff0000 0x010000>;
138                                 read-only;
139                         };
140                 };
141         };
142 };
143
144 &mdio0 {
145         status = "okay";
146
147         phy-mask = <0>;
148
149         phy0: ethernet-phy@0 {
150                 reg = <0>;
151                 phy-mode = "sgmii";
152
153                 qca,ar8327-initvals = <
154                         0x04 0x00080080 /* PORT0 PAD MODE CTRL */
155                         0x10 0x81000080 /* POWER_ON_STRIP */
156                         0x50 0xcc35cc35 /* LED_CTRL0 */
157                         0x54 0xcb37cb37 /* LED_CTRL1 */
158                         0x58 0x00000000 /* LED_CTRL2 */
159                         0x5c 0x00f3cf00 /* LED_CTRL3 */
160                         0x7c 0x0000007e /* PORT0_STATUS */
161                         >;
162         };
163 };
164
165 &eth0 {
166         status = "okay";
167
168         pll-data = <0x03000101 0x00000101 0x00001919>;
169
170         phy-mode = "sgmii";
171         phy-handle = <&phy0>;
172 };
173
174 &wmac {
175         status = "okay";
176         qca,no-eeprom;
177 };