target/linux/ath79/dts/qca9558_openmesh_om5p-ac-v2.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6
   7 #include "qca9557.dtsi"
   8
   9 / {
  10         compatible = "openmesh,om5p-ac-v2", "qca,qca9557";
  11         model = "OpenMesh OM5P-AC V2";
  12
  13         extosc: ref {
  14                 compatible = "fixed-clock";
  15                 #clock-cells = <0>;
  16                 clock-output-names = "ref";
  17                 clock-frequency = <40000000>;
  18         };
  19
  20         leds {
  21                 compatible = "gpio-leds";
  22
  23                 power {
  24                         label = "om5pac:blue:power";
  25                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  26                         default-state = "off";
  27                 };
  28
  29                 wifi_green {
  30                         label = "om5pac:green:wifi";
  31                         gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
  32                         default-state = "off";
  33                 };
  34
  35                 wifi_yellow {
  36                         label = "om5pac:yellow:wifi";
  37                         gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  38                         default-state = "off";
  39                 };
  40
  41                 wifi_red {
  42                         label = "om5pac:red:wifi";
  43                         gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
  44                         default-state = "off";
  45                 };
  46         };
  47
  48         keys {
  49                 compatible = "gpio-keys-polled";
  50                 poll-interval = <100>;
  51
  52                 button0 {
  53                         label = "reset";
  54                         linux,code = <KEY_RESTART>;
  55                         gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
  56                 };
  57         };
  58
  59         gpio-export {
  60                 compatible = "gpio-export";
  61                 #size-cells = <0>;
  62
  63                 gpio_pa_dcdc {
  64                         gpio-export,name = "om5pac:pa_dcdc";
  65                         gpio-export,output = <1>;
  66                         gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
  67                 };
  68                 gpio_pa_high {
  69                         gpio-export,name = "om5pac:pa_high";
  70                         gpio-export,output = <1>;
  71                         gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
  72                 };
  73         };
  74 };
  75
  76 &pinmux {
  77         pinmux_pa_dcdc_pins {
  78                 pinctrl-single,bits = <0x0 0xff00 0x0>;
  79         };
  80
  81         pinmux_pa_high_pins {
  82                 pinctrl-single,bits = <0x10 0xff 0x0>;
  83         };
  84 };
  85
  86 &pcie0 {
  87         status = "okay";
  88 };
  89
  90 &uart {
  91         status = "okay";
  92 };
  93
  94 &pll {
  95         clocks = <&extosc>;
  96 };
  97
  98 &spi {
  99         status = "okay";
 100         num-cs = <1>;
 101
 102         flash@0 {
 103                 compatible = "jedec,spi-nor";
 104                 reg = <0>;
 105                 spi-max-frequency = <25000000>;
 106
 107                 partitions {
 108                         compatible = "fixed-partitions";
 109                         #address-cells = <1>;
 110                         #size-cells = <1>;
 111
 112                         partition@0 {
 113                                 label = "u-boot";
 114                                 reg = <0x000000 0x040000>;
 115                                 read-only;
 116                         };
 117
 118                         partition@1 {
 119                                 label = "u-boot-env";
 120                                 reg = <0x040000 0x010000>;
 121                         };
 122
 123                         partition@2 {
 124                                 label = "firmware";
 125                                 reg = <0x850000 0x7a0000>;
 126                         };
 127
 128                         partition@3 {
 129                                 label = "ART";
 130                                 reg = <0xff0000 0x010000>;
 131                                 read-only;
 132                         };
 133                 };
 134         };
 135 };
 136
 137 &mdio0 {
 138         status = "okay";
 139
 140         phy4: ethernet-phy@4 {
 141                 reg = <4>;
 142                 phy-mode = "rgmii-id";
 143         };
 144 };
 145
 146 &mdio1 {
 147         status = "okay";
 148
 149         phy1: ethernet-phy@1 {
 150                 reg = <1>;
 151                 phy-mode = "sgmii";
 152         };
 153 };
 154
 155 &eth0 {
 156         status = "okay";
 157
 158         pll-data = <0x82000101 0x80000101 0x80001313>;
 159
 160         phy-handle = <&phy4>;
 161         phy-mode = "rgmii";
 162 };
 163
 164 &eth1 {
 165         status = "okay";
 166
 167         pll-data = <0x03000101 0x80000101 0x80001313>;
 168
 169         phy-handle = <&phy1>;
 170         phy-mode = "sgmii";
 171 };