1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
6 compatible = "qca,qca9557";
17 compatible = "mips,mips24Kc";
18 clocks = <&pll ATH79_CLK_CPU>;
25 ddr_ctrl: memory-controller@18000000 {
26 compatible = "qca,ar9557-ddr-controller",
27 "qca,ar7240-ddr-controller";
28 reg = <0x18000000 0x100>;
30 #qca,ddr-wb-channel-cells = <1>;
34 compatible = "ns16550a";
35 reg = <0x18020000 0x20>;
39 clocks = <&pll ATH79_CLK_REF>;
50 compatible = "qca,ar9557-gpio",
52 reg = <0x18040000 0x28>;
61 #interrupt-cells = <2>;
64 pinmux: pinmux@1804002c {
65 compatible = "pinctrl-single";
67 reg = <0x1804002c 0x40>;
71 pinctrl-single,bit-per-mux;
72 pinctrl-single,register-width = <32>;
73 pinctrl-single,function-mask = <0x1>;
76 jtag_disable_pins: pinmux_jtag_disable_pins {
77 pinctrl-single,bits = <0x40 0x2 0x2>;
81 pll: pll-controller@18050000 {
82 compatible = "qca,ar9557-pll",
84 reg = <0x18050000 0x20>;
87 clock-output-names = "cpu", "ddr", "ahb";
91 compatible = "qca,ar7130-wdt";
92 reg = <0x18060008 0x8>;
96 clocks = <&pll ATH79_CLK_AHB>;
100 rst: reset-controller@1806001c {
101 compatible = "qca,ar9557-reset",
104 reg = <0x1806001c 0x4>;
107 interrupt-parent = <&cpuintc>;
109 intc2: interrupt-controller@2 {
110 compatible = "qcom,qca9556-intc";
114 interrupt-controller;
115 #interrupt-cells = <1>;
117 qcom,pending-bits = <0x1f0>, /* pcie rc1 */
121 intc3: interrupt-controller@3 {
122 compatible = "qcom,qca9556-intc";
126 interrupt-controller;
127 #interrupt-cells = <1>;
129 qcom,pending-bits = <0x1f000>, /* pcie rc2 */
130 <0x1000000>, /* usb1 */
131 <0x10000000>; /* usb2 */
135 pcie0: pcie-controller@180c0000 {
136 compatible = "qcom,ar7240-pci";
137 #address-cells = <3>;
139 bus-range = <0x0 0x0>;
140 reg = <0x180c0000 0x1000>, /* CRP */
141 <0x180f0000 0x100>, /* CTRL */
142 <0x14000000 0x1000>; /* CFG */
143 reg-names = "crp_base", "ctrl_base", "cfg_base";
144 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
145 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
146 interrupt-parent = <&intc2>;
149 interrupt-controller;
150 #interrupt-cells = <1>;
152 interrupt-map-mask = <0 0 0 1>;
153 interrupt-map = <0 0 0 0 &pcie0 0>;
159 compatible = "qca,ar9557-spi", "qca,ar7100-spi";
160 reg = <0x1f000000 0x10>;
162 clocks = <&pll ATH79_CLK_AHB>;
167 #address-cells = <1>;
175 reset-names = "mdio";
179 compatible = "qca,qca9550-eth", "syscon";
181 pll-data = <0x82000101 0x80000101 0x80001313>;
190 reset-names = "mdio";
194 compatible = "qca,qca9550-eth", "syscon";
196 pll-data = <0x82000101 0x80000101 0x80001313>;