target/linux/ath79/dts/qca9533.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 #include <dt-bindings/clock/ath79-clk.h>
   3 #include "ath79.dtsi"
   4
   5 / {
   6         compatible = "qca,qca9533";
   7
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10
  11         cpus {
  12                 #address-cells = <1>;
  13                 #size-cells = <0>;
  14
  15                 cpu@0 {
  16                         device_type = "cpu";
  17                         compatible = "mips,mips24Kc";
  18                         clocks = <&pll ATH79_CLK_CPU>;
  19                         reg = <0>;
  20                 };
  21         };
  22
  23         extosc: ref {
  24                 compatible = "fixed-clock";
  25                 #clock-cells = <0>;
  26                 clock-output-names = "ref";
  27                 clock-frequency = <25000000>;
  28         };
  29
  30         ahb {
  31                 apb {
  32                         ddr_ctrl: memory-controller@18000000 {
  33                                 compatible = "qca,ar9530-ddr-controller",
  34                                                 "qca,ar7240-ddr-controller";
  35                                 reg = <0x18000000 0x128>;
  36
  37                                 #qca,ddr-wb-channel-cells = <1>;
  38                         };
  39
  40                         uart: uart@18020000 {
  41                                 compatible = "ns16550a";
  42                                 reg = <0x18020000 0x20>;
  43
  44                                 interrupts = <3>;
  45
  46                                 clocks = <&pll ATH79_CLK_REF>;
  47                                 clock-names = "uart";
  48
  49                                 reg-io-width = <4>;
  50                                 reg-shift = <2>;
  51                                 no-loopback-test;
  52
  53                                 status = "disabled";
  54                         };
  55
  56                         usb_phy: usb-phy@18030000 {
  57                                 compatible = "qca,ar7200-usb-phy";
  58                                 reg = <0x18030000 0x100>;
  59                                 #phy-cells = <0>;
  60
  61                                 reset-names = "usb-phy", "usb-suspend-override";
  62                                 resets = <&rst 4>, <&rst 3>;
  63
  64                                 status = "disabled";
  65                         };
  66
  67                         gpio: gpio@18040000 {
  68                                 compatible = "qca,ar9530-gpio",
  69                                                 "qca,ar9340-gpio";
  70                                 reg = <0x18040000 0x28>;
  71
  72                                 interrupts = <2>;
  73                                 ngpios = <20>;
  74
  75                                 gpio-controller;
  76                                 #gpio-cells = <2>;
  77
  78                                 interrupt-controller;
  79                                 #interrupt-cells = <2>;
  80                         };
  81
  82                         pinmux: pinmux@1804002c {
  83                                 compatible = "pinctrl-single";
  84
  85                                 reg = <0x1804002c 0x48>;
  86
  87                                 #size-cells = <0>;
  88
  89                                 pinctrl-single,bit-per-mux;
  90                                 pinctrl-single,register-width = <32>;
  91                                 pinctrl-single,function-mask = <0x1>;
  92                                 #pinctrl-cells = <2>;
  93
  94                                 jtag_disable_pins: pinmux_jtag_disable_pins {
  95                                         pinctrl-single,bits = <0x40 0x2 0x2>;
  96                                 };
  97                         };
  98
  99                         pll: pll-controller@18050000 {
 100                                 compatible = "qca,qca9530-pll", "syscon";
 101                                 reg = <0x18050000 0x48>;
 102
 103                                 #clock-cells = <1>;
 104                                 clock-output-names = "cpu", "ddr", "ahb";
 105                                 clocks = <&extosc>;
 106                         };
 107
 108                         wdt: wdt@18060008 {
 109                                 compatible = "qca,qca9530-wdt", "qca,ar7130-wdt";
 110                                 reg = <0x18060008 0x8>;
 111
 112                                 interrupts = <4>;
 113
 114                                 clocks = <&pll ATH79_CLK_AHB>;
 115                                 clock-names = "wdt";
 116                         };
 117
 118                         rst: reset-controller@1806001c {
 119                                 compatible = "qca,qca9530-reset",
 120                                                 "qca,ar7100-reset";
 121                                 reg = <0x1806001c 0xac>;
 122
 123                                 #reset-cells = <1>;
 124
 125                                 intc2: interrupt-controller@2 {
 126                                         compatible = "qca,ar9340-intc";
 127
 128                                         interrupt-parent = <&cpuintc>;
 129                                         interrupts = <2>;
 130
 131                                         interrupt-controller;
 132                                         #interrupt-cells = <1>;
 133
 134                                         qca,int-status-addr = <0xac>;
 135                                         qca,pending-bits = <0xf>,       /* wmac */
 136                                                         <0x1f0>;        /* pcie rc1 */
 137
 138                                         qca,ddr-wb-channel-interrupts = <0>, <1>;
 139                                         qca,ddr-wb-channels = <&ddr_ctrl 4>, <&ddr_ctrl 3>;
 140                                 };
 141                         };
 142
 143                         pcie0: pcie-controller@180c0000 {
 144                                 compatible = "qcom,ar7240-pci";
 145                                 #address-cells = <3>;
 146                                 #size-cells = <2>;
 147                                 bus-range = <0x0 0x0>;
 148                                 reg = <0x180c0000 0x1000>, /* CRP */
 149                                       <0x180f0000 0x100>,  /* CTRL */
 150                                       <0x14000000 0x1000>; /* CFG */
 151                                 reg-names = "crp_base", "ctrl_base", "cfg_base";
 152                                 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000        /* pci memory */
 153                                           0x1000000 0 0x00000000 0x0000000 0 0x000001>;         /* io space */
 154                                 interrupt-parent = <&intc2>;
 155                                 interrupts = <1>;
 156
 157                                 interrupt-controller;
 158                                 #interrupt-cells = <1>;
 159
 160                                 interrupt-map-mask = <0 0 0 1>;
 161                                 interrupt-map = <0 0 0 0 &pcie0 0>;
 162                                 status = "disabled";
 163                         };
 164
 165                         gmac: gmac@18070000 {
 166                                 compatible = "qca,ar9330-gmac";
 167                                 reg = <0x18070000 0x4>;
 168                         };
 169
 170                         wmac: wmac@18100000 {
 171                                 compatible = "qca,qca9530-wmac";
 172                                 reg = <0x18100000 0x230000>;
 173
 174                                 interrupt-parent = <&intc2>;
 175                                 interrupts = <0>;
 176
 177                                 status = "disabled";
 178                         };
 179                 };
 180
 181                 usb0: usb@1b000000 {
 182                         compatible = "generic-ehci";
 183                         reg = <0x1b000000 0x1000>;
 184
 185                         interrupts = <3>;
 186                         resets = <&rst 5>;
 187                         reset-names = "usb-host";
 188                         dr_mode = "host";
 189
 190                         has-transaction-translator;
 191                         caps-offset = <0x100>;
 192
 193                         phy-names = "usb-phy";
 194                         phys = <&usb_phy>;
 195
 196                         status = "disabled";
 197                 };
 198
 199                 spi: spi@1f000000 {
 200                         compatible = "qca,ar9530-spi", "qca,ar7100-spi";
 201                         reg = <0x1f000000 0x10>;
 202
 203                         clocks = <&pll ATH79_CLK_AHB>;
 204                         clock-names = "ahb";
 205
 206                         status = "disabled";
 207
 208                         #address-cells = <1>;
 209                         #size-cells = <0>;
 210                 };
 211
 212         };
 213
 214 };
 215
 216 &cpuintc {
 217         qca,ddr-wb-channel-interrupts = <3>, <4>, <5>;
 218         qca,ddr-wb-channels = <&ddr_ctrl 2>, <&ddr_ctrl 0>,
 219                                                 <&ddr_ctrl 1>;
 220 };
 221
 222 &eth0 {
 223         compatible = "qca,qca9530-eth", "syscon";
 224         pll-data = <0x82000101 0x80000101 0x80001313>;
 225         reg = <0x19000000 0x200
 226                 0x18070000 0x4>;
 227         pll-reg = <0x4 0x2c 17>;
 228         pll-handle = <&pll>;
 229
 230         reset-names = "mac";
 231         resets = <&rst 9>;
 232
 233         phy-mode = "mii";
 234 };
 235
 236
 237 &mdio1 {
 238         status = "okay";
 239         resets = <&rst 23>;
 240         reset-names = "mdio";
 241         builtin-switch;
 242
 243         builtin_switch: switch0@1f {
 244                 compatible = "qca,ar8229-builtin";
 245                 #address-cells = <1>;
 246                 #size-cells = <0>;
 247
 248                 reg = <0x1f>;
 249                 phy-mode = "gmii";
 250                 phy4-mii-enable;
 251
 252                 mdio-bus {
 253                         swphy0: ethernet-phy@0 {
 254                                 reg = <0>;
 255                                 phy-mode = "mii";
 256                         };
 257
 258                         swphy4: ethernet-phy@4 {
 259                                 reg = <4>;
 260                                 phy-mode = "mii";
 261                         };
 262                 };
 263         };
 264 };
 265
 266 &eth1 {
 267         status = "okay";
 268
 269         compatible = "qca,qca9530-eth", "syscon", "simple-mfd";
 270         resets = <&rst 13>;
 271         reset-names = "mac";
 272
 273         phy-mode = "gmii";
 274
 275         fixed-link {
 276                 speed = <1000>;
 277                 full-duplex;
 278         };
 279 };