treewide: fix some cosmetic glitches in dts files
[oweals/openwrt.git] / target / linux / ath79 / dts / ar9344_pcs_cr5000.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "ar9344.dtsi"
8
9 / {
10         model = "PowerCloud Systems CR5000";
11         compatible = "pcs,cr5000", "qca,ar9344";
12
13         aliases {
14                 serial0 = &uart;
15                 led-boot = &status;
16                 led-failsafe = &status;
17                 led-running = &status;
18                 led-upgrade = &status;
19         };
20
21         keys {
22                 compatible = "gpio-keys-polled";
23                 poll-interval = <20>;
24
25                 pinctrl-names = "default";
26                 pinctrl-0 = <&jtag_disable_pins>;
27
28                 reset {
29                         label = "Reset button";
30                         linux,code = <KEY_RESTART>;
31                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
32                         debounce-interval = <60>;
33                 };
34
35                 wps {
36                         label = "WPS button";
37                         linux,code = <KEY_WPS_BUTTON>;
38                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
39                         debounce-interval = <60>;
40                 };
41         };
42
43         leds {
44                 compatible = "gpio-leds";
45
46                 status: power {
47                         label = "pcs:amber:power";
48                         gpios = <&gpio 2 GPIO_ACTIVE_LOW>,
49                                 <&gpio 4 GPIO_ACTIVE_LOW>;
50                         default-state = "on";
51                 };
52
53                 wlan2g {
54                         label = "pcs:blue:wlan";
55                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
56                         default-state = "off";
57                         linux,default-trigger = "phy0tpt";
58                 };
59
60                 wps_white {
61                         label = "pcs:white:wps";
62                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
63                         default-state = "off";
64                 };
65         };
66 };
67
68 &ref {
69         clock-frequency = <25000000>;
70 };
71
72 &uart {
73         status = "okay";
74 };
75
76 &gpio {
77         status = "okay";
78 };
79
80 &spi {
81         num-cs = <1>;
82
83         status = "okay";
84
85         flash@0 {
86                 compatible = "jedec,spi-nor";
87                 reg = <0>;
88                 spi-max-frequency = <25000000>;
89
90                 partitions {
91                         compatible = "fixed-partitions";
92                         #address-cells = <1>;
93                         #size-cells = <1>;
94
95                         uboot: partition@0 {
96                                 label = "u-boot";
97                                 reg = <0x000000 0x040000>;
98                                 read-only;
99                         };
100
101                         partition@40000 {
102                                 label = "u-boot-env";
103                                 reg = <0x040000 0x010000>;
104                                 read-only;
105                         };
106
107                         partition@50000 {
108                                 label = "firmware";
109                                 reg = <0x050000 0x07a0000>;
110                         };
111
112                         art: partition@7f0000 {
113                                 label = "art";
114                                 reg = <0x7f0000 0x010000>;
115                                 read-only;
116                         };
117                 };
118         };
119 };
120
121 &usb {
122         status = "okay";
123         #address-cells = <1>;
124         #size-cells = <0>;
125
126         hub_port1: port@1 {
127                 reg = <1>;
128                 #trigger-source-cells = <0>;
129         };
130 };
131
132 &usb_phy {
133         status = "okay";
134 };
135
136 &pcie {
137         status = "okay";
138
139         ath9k: wifi@0,0 {
140                 compatible = "pci168c,0030";
141                 reg = <0x0000 0 0 0 0>;
142                 mtd-mac-address = <&art 0x5002>;
143                 #gpio-cells = <2>;
144                 gpio-controller;
145         };
146 };
147
148 &mdio0 {
149         status = "okay";
150
151         phy-mask = <0>;
152
153         phy0: ethernet-phy@0 {
154                 reg = <0>;
155                 phy-mode = "rgmii";
156                 qca,ar8327-initvals = <
157                         0x04 0x07600000 /* PORT0 PAD MODE CTRL */
158                         0x10 0x81000080 /* POWER_ON_STRAP */
159                         0x50 0xcc35cc35 /* LED_CTRL0 */
160                         0x54 0xca35ca35 /* LED_CTRL1 */
161                         0x58 0xc935c935 /* LED_CTRL2 */
162                         0x5c 0x03ffff00 /* LED_CTRL3 */
163                         0x7c 0x0000007e /* PORT0_STATUS */
164                 >;
165         };
166 };
167
168 &eth0 {
169         #address-cells = <1>;
170         #size-cells = <0>;
171         status = "okay";
172
173         /* default for ar934x, except for 1000M */
174         pll-data = <0x06000000 0x00000101 0x00001616>;
175
176         mtd-mac-address = <&art 0x0>;
177
178         phy-mode = "rgmii";
179         phy-handle = <&phy0>;
180
181
182         aliases {
183                 ag0 = &eth1;
184         };
185
186         port@0 {
187                 compatible = "swconfig,port";
188                 reg = <0>;
189                 swconfig,segment = "lan";
190                 swconfig,portmap = <1 1>;
191         };
192
193         port@1 {
194                 compatible = "swconfig,port";
195                 reg = <1>;
196                 swconfig,segment = "lan";
197                 swconfig,portmap = <2 2>;
198         };
199
200         port@2 {
201                 compatible = "swconfig,port";
202                 reg = <2>;
203                 swconfig,segment = "lan";
204                 swconfig,portmap = <3 3>;
205         };
206
207         port@3 {
208                 compatible = "swconfig,port";
209                 reg = <3>;
210                 swconfig,segment = "lan";
211                 swconfig,portmap = <4 4>;
212         };
213
214         port@4 {
215                 compatible = "swconfig,port";
216                 reg = <4>;
217                 swconfig,segment = "wan";
218                 swconfig,portmap = <5 5>;
219         };
220 };
221
222 &wmac {
223         status = "okay";
224
225         mtd-cal-data = <&art 0x1000>;
226         mtd-mac-address = <&art 0x1002>;
227 };