target/linux/ath79/dts/ar9344_pcs_cr5000.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6
   7 #include "ar9344.dtsi"
   8
   9 / {
  10         model = "PowerCloud Systems CR5000";
  11         compatible = "pcs,cr5000", "qca,ar9344";
  12
  13         aliases {
  14                 serial0 = &uart;
  15                 led-boot = &status;
  16                 led-failsafe = &status;
  17                 led-running = &status;
  18                 led-upgrade = &status;
  19         };
  20
  21         keys {
  22                 compatible = "gpio-keys-polled";
  23                 poll-interval = <20>;
  24
  25                 pinctrl-names = "default";
  26                 pinctrl-0 = <&jtag_disable_pins>;
  27
  28                 reset {
  29                         label = "Reset button";
  30                         linux,code = <KEY_RESTART>;
  31                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  32                         debounce-interval = <60>;
  33                 };
  34
  35                 wps {
  36                         label = "WPS button";
  37                         linux,code = <KEY_WPS_BUTTON>;
  38                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
  39                         debounce-interval = <60>;
  40                 };
  41         };
  42
  43         leds {
  44                 compatible = "gpio-leds";
  45
  46                 status: power {
  47                         label = "pcs:amber:power";
  48                         gpios = <&gpio 2 GPIO_ACTIVE_LOW>,
  49                                 <&gpio 4 GPIO_ACTIVE_LOW>;
  50                         default-state = "on";
  51                 };
  52
  53                 wlan2g {
  54                         label = "pcs:blue:wlan";
  55                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  56                         default-state = "off";
  57                         linux,default-trigger = "phy0tpt";
  58                 };
  59
  60                 wps_white {
  61                         label = "pcs:white:wps";
  62                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  63                         default-state = "off";
  64                 };
  65         };
  66
  67 };
  68
  69 &ref {
  70         clock-frequency = <25000000>;
  71 };
  72
  73 &uart {
  74         status = "okay";
  75 };
  76
  77 &gpio {
  78         status = "okay";
  79 };
  80
  81 &spi {
  82         num-cs = <1>;
  83
  84         status = "okay";
  85
  86         flash@0 {
  87                 compatible = "jedec,spi-nor";
  88                 reg = <0>;
  89                 spi-max-frequency = <25000000>;
  90
  91                 partitions {
  92                         compatible = "fixed-partitions";
  93                         #address-cells = <1>;
  94                         #size-cells = <1>;
  95
  96                         uboot: partition@0 {
  97                                 label = "u-boot";
  98                                 reg = <0x000000 0x040000>;
  99                                 read-only;
 100                         };
 101
 102                         partition@40000 {
 103                                 label = "u-boot-env";
 104                                 reg = <0x040000 0x010000>;
 105                                 read-only;
 106                         };
 107
 108                         partition@50000 {
 109                                 label = "firmware";
 110                                 reg = <0x050000 0x07a0000>;
 111                         };
 112
 113                         art: partition@7f0000 {
 114                                 label = "art";
 115                                 reg = <0x7f0000 0x010000>;
 116                                 read-only;
 117                         };
 118                 };
 119         };
 120 };
 121
 122 &usb {
 123         status = "okay";
 124         #address-cells = <1>;
 125         #size-cells = <0>;
 126
 127         hub_port1: port@1 {
 128                 reg = <1>;
 129                 #trigger-source-cells = <0>;
 130         };
 131 };
 132
 133 &usb_phy {
 134         status = "okay";
 135 };
 136
 137 &pcie {
 138         status = "okay";
 139
 140         ath9k: wifi@0,0 {
 141                 compatible = "pci168c,0030";
 142                 reg = <0x0000 0 0 0 0>;
 143                 mtd-mac-address = <&art 0x5002>;
 144                 #gpio-cells = <2>;
 145                 gpio-controller;
 146         };
 147 };
 148
 149 &mdio0 {
 150         status = "okay";
 151
 152         phy-mask = <0>;
 153
 154         phy0: ethernet-phy@0 {
 155                 reg = <0>;
 156                 phy-mode = "rgmii";
 157                 qca,ar8327-initvals = <
 158                         0x04 0x07600000 /* PORT0 PAD MODE CTRL */
 159                         0x10 0x81000080 /* POWER_ON_STRAP */
 160                         0x50 0xcc35cc35 /* LED_CTRL0 */
 161                         0x54 0xca35ca35 /* LED_CTRL1 */
 162                         0x58 0xc935c935 /* LED_CTRL2 */
 163                         0x5c 0x03ffff00 /* LED_CTRL3 */
 164                         0x7c 0x0000007e /* PORT0_STATUS */
 165                 >;
 166         };
 167 };
 168
 169 &eth0 {
 170         #address-cells = <1>;
 171         #size-cells = <0>;
 172         status = "okay";
 173
 174         /* default for ar934x, except for 1000M */
 175         pll-data = <0x06000000 0x00000101 0x00001616>;
 176
 177         mtd-mac-address = <&art 0x0>;
 178
 179         phy-mode = "rgmii";
 180         phy-handle = <&phy0>;
 181
 182
 183         aliases {
 184                 ag0 = &eth1;
 185         };
 186
 187         port@0 {
 188                 compatible = "swconfig,port";
 189                 reg = <0>;
 190                 swconfig,segment = "lan";
 191                 swconfig,portmap = <1 1>;
 192         };
 193
 194         port@1 {
 195                 compatible = "swconfig,port";
 196                 reg = <1>;
 197                 swconfig,segment = "lan";
 198                 swconfig,portmap = <2 2>;
 199         };
 200
 201         port@2 {
 202                 compatible = "swconfig,port";
 203                 reg = <2>;
 204                 swconfig,segment = "lan";
 205                 swconfig,portmap = <3 3>;
 206         };
 207
 208         port@3 {
 209                 compatible = "swconfig,port";
 210                 reg = <3>;
 211                 swconfig,segment = "lan";
 212                 swconfig,portmap = <4 4>;
 213         };
 214
 215         port@4 {
 216                 compatible = "swconfig,port";
 217                 reg = <4>;
 218                 swconfig,segment = "wan";
 219                 swconfig,portmap = <5 5>;
 220         };
 221
 222 };
 223
 224 &wmac {
 225         status = "okay";
 226
 227         mtd-cal-data = <&art 0x1000>;
 228         mtd-mac-address = <&art 0x1002>;
 229 };