target/linux/ath79/dts/ar9344_ocedo_raccoon.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6
   7 #include "ar9344.dtsi"
   8
   9 / {
  10         model = "OCEDO Raccoon";
  11         compatible = "ocedo,raccoon", "qca,ar9344";
  12
  13         aliases {
  14                 led-status = &system;
  15         };
  16
  17         leds {
  18                 compatible = "gpio-leds";
  19
  20                 power {
  21                         label = "raccoon:green:power";
  22                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  23                         default-state = "on";
  24                 };
  25
  26                 wlan2g {
  27                         label = "raccoon:yellow:wlan24";
  28                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  29                         default-state = "off";
  30                         linux,default-trigger = "phy0tpt";
  31                 };
  32
  33                 system: system {
  34                         label = "raccoon:blue:sys";
  35                         gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
  36                 };
  37         };
  38
  39         ath9k-leds {
  40                 compatible = "gpio-leds";
  41
  42                 wlan5g {
  43                         label = "raccoon:red:wlan5";
  44                         gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
  45                         default-state = "off";
  46                         linux,default-trigger = "phy1tpt";
  47                 };
  48         };
  49
  50         keys {
  51                 compatible = "gpio-keys-polled";
  52                 #address-cells = <1>;
  53                 #size-cells = <0>;
  54                 poll-interval = <20>;
  55
  56                 reset {
  57                         linux,code = <KEY_RESTART>;
  58                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  59                         debounce-interval = <60>;
  60                 };
  61         };
  62 };
  63
  64 &ref {
  65         clock-frequency = <40000000>;
  66 };
  67
  68 &uart {
  69         status = "okay";
  70 };
  71
  72 &gpio {
  73         status = "okay";
  74 };
  75
  76 &spi {
  77         num-cs = <1>;
  78
  79         status = "okay";
  80
  81         flash@0 {
  82                 #address-cells = <1>;
  83                 #size-cells = <1>;
  84                 compatible = "jedec,spi-nor";
  85                 reg = <0>;
  86                 spi-max-frequency = <25000000>;
  87
  88                 partitions {
  89                         compatible = "fixed-partitions";
  90                         #address-cells = <1>;
  91                         #size-cells = <1>;
  92
  93                         uboot: partition@0 {
  94                                 label = "u-boot";
  95                                 reg = <0x000000 0x040000>;
  96                                 read-only;
  97                         };
  98
  99                         partition@40000 {
 100                                 label = "u-boot-env";
 101                                 reg = <0x040000 0x010000>;
 102                         };
 103
 104                         partition@50000 {
 105                                 label = "firmware";
 106                                 reg = <0x050000 0x740000>;
 107                         };
 108
 109                         partition@790000 {
 110                                 label = "vendor";
 111                                 reg = <0x790000 0x740000>;
 112                                 read-only;
 113                         };
 114
 115                         partition@ed0000 {
 116                                 label = "data";
 117                                 reg = <0xed0000 0x110000>;
 118                                 read-only;
 119                         };
 120
 121                         partition@fe0000 {
 122                                 label = "id";
 123                                 reg = <0xfe0000 0x010000>;
 124                                 read-only;
 125                         };
 126
 127                         art: partition@ff0000 {
 128                                 label = "art";
 129                                 reg = <0xff0000 0x010000>;
 130                                 read-only;
 131                         };
 132                 };
 133         };
 134 };
 135
 136 &pcie {
 137         status = "okay";
 138
 139         ath9k: wifi@168c,0030 {
 140                 compatible = "pci168c,0030";
 141                 reg = <0x0000 0 0 0 0>;
 142                 mtd-mac-address = <&art 0xc>;
 143                 qca,no-eeprom;
 144                 #gpio-cells = <2>;
 145                 gpio-controller;
 146         };
 147 };
 148
 149 &wmac {
 150         status = "okay";
 151
 152         mtd-cal-data = <&art 0x1000>;
 153         mtd-mac-address = <&art 0x6>;
 154 };
 155
 156 &mdio0 {
 157         status = "okay";
 158
 159         phy-mask = <0>;
 160
 161         phy0: ethernet-phy@0 {
 162                 reg = <0>;
 163                 phy-mode = "rgmii";
 164         };
 165 };
 166
 167 &eth0 {
 168         status = "okay";
 169
 170         /* default for ar934x, except for 1000M */
 171         pll-data = <0x06000000 0x00000101 0x00001616>;
 172
 173         mtd-mac-address = <&art 0x0>;
 174
 175         phy-mode = "rgmii";
 176         phy-handle = <&phy0>;
 177 };