ath79: add WNDR3700 and WNDR3700v2
[oweals/openwrt.git] / target / linux / ath79 / dts / ar9344_ocedo_raccoon.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "ar9344.dtsi"
8
9 / {
10         model = "OCEDO Raccoon";
11         compatible = "ocedo,raccoon", "qca,ar9344";
12
13         chosen {
14                 bootargs = "console=ttyS0,115200n8";
15         };
16
17         aliases {
18                 led-status = &system;
19         };
20
21         leds {
22                 compatible = "gpio-leds";
23
24                 power {
25                         label = "raccoon:green:power";
26                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
27                         default-state = "on";
28                 };
29
30                 wlan2g {
31                         label = "raccoon:yellow:wlan24";
32                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
33                         default-state = "off";
34                         linux,default-trigger = "phy0tpt";
35                 };
36
37                 system: system {
38                         label = "raccoon:blue:sys";
39                         gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
40                 };
41         };
42
43         ath9k-leds {
44                 compatible = "gpio-leds";
45
46                 wlan5g {
47                         label = "raccoon:red:wlan5";
48                         gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
49                         default-state = "off";
50                         linux,default-trigger = "phy1tpt";
51                 };
52         };
53
54         keys {
55                 compatible = "gpio-keys-polled";
56                 poll-interval = <20>;
57
58                 reset {
59                         linux,code = <KEY_RESTART>;
60                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
61                         debounce-interval = <60>;
62                 };
63         };
64 };
65
66 &ref {
67         clock-frequency = <40000000>;
68 };
69
70 &uart {
71         status = "okay";
72 };
73
74 &gpio {
75         status = "okay";
76 };
77
78 &spi {
79         num-cs = <1>;
80
81         status = "okay";
82
83         flash@0 {
84                 compatible = "jedec,spi-nor";
85                 reg = <0>;
86                 spi-max-frequency = <25000000>;
87
88                 partitions {
89                         compatible = "fixed-partitions";
90                         #address-cells = <1>;
91                         #size-cells = <1>;
92
93                         uboot: partition@0 {
94                                 label = "u-boot";
95                                 reg = <0x000000 0x040000>;
96                                 read-only;
97                         };
98
99                         partition@40000 {
100                                 label = "u-boot-env";
101                                 reg = <0x040000 0x010000>;
102                         };
103
104                         partition@50000 {
105                                 label = "firmware";
106                                 reg = <0x050000 0x740000>;
107                         };
108
109                         partition@790000 {
110                                 label = "vendor";
111                                 reg = <0x790000 0x740000>;
112                                 read-only;
113                         };
114
115                         partition@ed0000 {
116                                 label = "data";
117                                 reg = <0xed0000 0x110000>;
118                                 read-only;
119                         };
120
121                         partition@fe0000 {
122                                 label = "id";
123                                 reg = <0xfe0000 0x010000>;
124                                 read-only;
125                         };
126
127                         art: partition@ff0000 {
128                                 label = "art";
129                                 reg = <0xff0000 0x010000>;
130                                 read-only;
131                         };
132                 };
133         };
134 };
135
136 &pcie {
137         status = "okay";
138
139         ath9k: wifi@0,0 {
140                 compatible = "pci168c,0030";
141                 reg = <0x0000 0 0 0 0>;
142                 mtd-mac-address = <&art 0xc>;
143                 qca,no-eeprom;
144                 #gpio-cells = <2>;
145                 gpio-controller;
146         };
147 };
148
149 &wmac {
150         status = "okay";
151
152         mtd-cal-data = <&art 0x1000>;
153         mtd-mac-address = <&art 0x6>;
154 };
155
156 &mdio0 {
157         status = "okay";
158
159         phy-mask = <0>;
160
161         phy0: ethernet-phy@0 {
162                 reg = <0>;
163                 phy-mode = "rgmii";
164         };
165 };
166
167 &eth0 {
168         status = "okay";
169
170         /* default for ar934x, except for 1000M */
171         pll-data = <0x06000000 0x00000101 0x00001616>;
172
173         mtd-mac-address = <&art 0x0>;
174
175         phy-mode = "rgmii";
176         phy-handle = <&phy0>;
177 };