target/linux/ath79/dts/ar9344.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ar934x.dtsi"
   4
   5 / {
   6         compatible = "qca,ar9344";
   7 };
   8
   9 &apb {
  10         pcie: pcie-controller@180c0000 {
  11                 compatible = "qcom,ar9340-pci", "qcom,ar7240-pci";
  12                 #address-cells = <3>;
  13                 #size-cells = <2>;
  14                 bus-range = <0x0 0x0>;
  15                 reg = <0x180c0000 0x1000>, /* CRP */
  16                                 <0x180f0000 0x100>, /* CTRL */
  17                                 <0x14000000 0x1000>; /* CFG */
  18                 reg-names = "crp_base", "ctrl_base", "cfg_base";
  19                 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
  20                                 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
  21                 interrupt-parent = <&cpuintc>;
  22                 interrupts = <2>;
  23
  24                 interrupt-controller;
  25                 #interrupt-cells = <1>;
  26
  27                 interrupt-map-mask = <0 0 0 1>;
  28                 interrupt-map = <0 0 0 0 &pcie 0>;
  29
  30                 status = "disabled";
  31         };
  32 };