1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 compatible = "qca,ar9344";
10 qca,ddr-wb-channel-interrupts = <3>, <4>, <5>;
11 qca,ddr-wb-channels = <&ddr_ctrl 2>, <&ddr_ctrl 0>,
16 intc2: interrupt-controller {
17 compatible = "qca,ar9340-intc";
19 interrupt-parent = <&cpuintc>;
23 #interrupt-cells = <1>;
25 qca,int-status-addr = <0xac>;
26 qca,pending-bits = <0xf>, /* wmac */
27 <0x1f0>; /* pcie rc1 */
29 qca,ddr-wb-channel-interrupts = <0>, <1>;
30 qca,ddr-wb-channels = <&ddr_ctrl 4>, <&ddr_ctrl 3>;
35 pcie: pcie-controller@180c0000 {
36 compatible = "qcom,ar9340-pci", "qcom,ar7240-pci";
39 bus-range = <0x0 0x0>;
40 reg = <0x180c0000 0x1000>, /* CRP */
41 <0x180f0000 0x100>, /* CTRL */
42 <0x14000000 0x1000>; /* CFG */
43 reg-names = "crp_base", "ctrl_base", "cfg_base";
44 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
45 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
46 interrupt-parent = <&intc2>;
50 #interrupt-cells = <1>;
52 interrupt-map-mask = <0 0 0 1>;
53 interrupt-map = <0 0 0 0 &pcie 0>;
60 interrupt-parent = <&intc2>;