target/linux/ath79/dts/ar9330.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 #include <dt-bindings/clock/ath79-clk.h>
   3 #include "ath79.dtsi"
   4
   5 / {
   6         compatible = "qca,ar9330";
   7
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10
  11         cpus {
  12                 #address-cells = <1>;
  13                 #size-cells = <0>;
  14
  15                 cpu@0 {
  16                         device_type = "cpu";
  17                         compatible = "mips,mips24Kc";
  18                         clocks = <&pll ATH79_CLK_CPU>;
  19                         reg = <0>;
  20                 };
  21         };
  22
  23         chosen {
  24                 bootargs = "console=ttyATH0,115200";
  25         };
  26
  27         ahb {
  28                 apb {
  29                         ddr_ctrl: memory-controller@18000000 {
  30                                 compatible = "qca,ar7240-ddr-controller";
  31                                 reg = <0x18000000 0x100>;
  32
  33                                 #qca,ddr-wb-channel-cells = <1>;
  34                         };
  35
  36                         uart: uart@18020000 {
  37                                 compatible = "qca,ar9330-uart";
  38                                 reg = <0x18020000 0x14>;
  39
  40                                 interrupts = <3>;
  41
  42                                 clocks = <&pll ATH79_CLK_REF>;
  43                                 clock-names = "uart";
  44
  45                                 status = "disabled";
  46                         };
  47
  48                         gpio: gpio@18040000 {
  49                                 compatible = "qca,ar7100-gpio";
  50                                 reg = <0x18040000 0x34>;
  51                                 interrupts = <2>;
  52
  53                                 ngpios = <30>;
  54
  55                                 gpio-controller;
  56                                 #gpio-cells = <2>;
  57
  58                                 interrupt-controller;
  59                                 #interrupt-cells = <2>;
  60
  61                                 status = "disabled";
  62                         };
  63
  64                         pinmux: pinmux@18040028 {
  65                                 compatible = "pinctrl-single";
  66                                 reg = <0x18040028 0x8>;
  67
  68                                 pinctrl-single,bit-per-mux;
  69                                 pinctrl-single,register-width = <32>;
  70                                 pinctrl-single,function-mask = <0x1>;
  71                                 #pinctrl-cells = <2>;
  72
  73                                 jtag_disable_pins: pinmux_jtag_disable_pins {
  74                                         pinctrl-single,bits = <0x0 0x1 0x1>;
  75                                 };
  76
  77                                 switch_led_disable_pins: pinmux_switch_led_disable_pins {
  78                                         pinctrl-single,bits = <0x0 0x0 0xf8>;
  79                                 };
  80                         };
  81
  82                         pll: pll-controller@18050000 {
  83                                 compatible = "qca,ar9330-pll";
  84                                 reg = <0x18050000 0x100>;
  85
  86                                 #clock-cells = <1>;
  87                         };
  88
  89                         wdt: wdt@18060008 {
  90                                 compatible = "qca,ar7130-wdt";
  91                                 reg = <0x18060008 0x8>;
  92
  93                                 interrupts = <4>;
  94
  95                                 clocks = <&pll ATH79_CLK_AHB>;
  96                                 clock-names = "wdt";
  97                         };
  98
  99                         rst: reset-controller@1806001c {
 100                                 compatible = "qca,ar7100-reset";
 101                                 reg = <0x1806001c 0x4>;
 102
 103                                 #reset-cells = <1>;
 104                         };
 105                 };
 106
 107                 usb: usb@1b000000 {
 108                         compatible = "chipidea,usb2";
 109                         reg = <0x1b000000 0x200>;
 110
 111                         interrupts = <3>;
 112                         resets = <&rst 5>;
 113                         reset-names = "usb-host";
 114
 115                         phy-names = "usb-phy";
 116                         phys = <&usb_phy>;
 117
 118                         status = "disabled";
 119                 };
 120
 121                 spi: spi@1f000000 {
 122                         compatible = "qca,ar7100-spi";
 123                         reg = <0x1f000000 0x10>;
 124
 125                         clocks = <&pll ATH79_CLK_AHB>;
 126                         clock-names = "ahb";
 127
 128                         #address-cells = <1>;
 129                         #size-cells = <0>;
 130
 131                         status = "disabled";
 132                 };
 133
 134                 gmac: gmac@18070000 {
 135                         compatible = "qca,ar9330-gmac";
 136                         reg = <0x18070000 0x4>;
 137                 };
 138
 139                 wmac: wmac@18100000 {
 140                         compatible = "qca,ar9330-wmac";
 141                         reg = <0x18100000 0x20000>;
 142
 143                         interrupts = <2>;
 144
 145                         status = "disabled";
 146                 };
 147         };
 148
 149         usb_phy: usb-phy {
 150                 compatible = "qca,ar7200-usb-phy";
 151
 152                 reset-names = "usb-phy", "usb-suspend-override";
 153                 resets = <&rst 4>, <&rst 3>;
 154
 155                 #phy-cells = <0>;
 156
 157                 status = "disabled";
 158         };
 159 };
 160
 161 &cpuintc {
 162         qca,ddr-wb-channel-interrupts = <2>, <3>;
 163         qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
 164 };
 165
 166 &eth0 {
 167         compatible = "qca,ar9330-eth", "syscon";
 168
 169         pll-data = <0x00110000 0x00001099 0x00991099>;
 170
 171         resets = <&rst 9>;
 172         reset-names = "mac";
 173         phy-mode = "mii";
 174         phy-handle = <&swphy4>;
 175 };
 176
 177 &mdio1 {
 178         status = "okay";
 179         compatible = "qca,ar9330-mdio";
 180
 181         resets = <&rst 23>;
 182         reset-names = "mdio";
 183         builtin-switch;
 184
 185         builtin_switch: switch0@1f {
 186                 compatible = "qca,ar7240sw";
 187                 reg = <0x1f>;
 188                 resets = <&rst 8>;
 189                 reset-names = "switch";
 190                 qca,mib-poll-interval = <500>;
 191
 192                 mdio-bus {
 193                         #address-cells = <1>;
 194                         #size-cells = <0>;
 195
 196                         swphy4: ethernet-phy@4 {
 197                                 reg = <4>;
 198                                 phy-mode = "mii";
 199                         };
 200                 };
 201         };
 202 };
 203
 204 &eth1 {
 205         compatible = "qca,ar9330-eth", "syscon";
 206
 207         pll-data = <0x00110000 0x00001099 0x00991099>;
 208         phy-mode = "gmii";
 209
 210         resets = <&rst 13>;
 211         reset-names = "mac";
 212
 213         fixed-link {
 214                 speed = <1000>;
 215                 full-duplex;
 216         };
 217 };