1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
6 compatible = "qca,ar9330";
17 compatible = "mips,mips24Kc";
18 clocks = <&pll ATH79_CLK_CPU>;
24 bootargs = "console=ttyATH0,115200";
29 ddr_ctrl: memory-controller@18000000 {
30 compatible = "qca,ar7240-ddr-controller";
31 reg = <0x18000000 0x100>;
33 #qca,ddr-wb-channel-cells = <1>;
37 compatible = "qca,ar9330-uart";
38 reg = <0x18020000 0x14>;
42 clocks = <&pll ATH79_CLK_REF>;
49 compatible = "qca,ar7100-gpio";
50 reg = <0x18040000 0x34>;
59 #interrupt-cells = <2>;
64 pll: pll-controller@18050000 {
65 compatible = "qca,ar9330-pll";
66 reg = <0x18050000 0x100>;
71 rst: reset-controller@1806001c {
72 compatible = "qca,ar7100-reset";
73 reg = <0x1806001c 0x4>;
80 compatible = "chipidea,usb2";
81 reg = <0x1b000000 0x200>;
85 reset-names = "usb-host";
87 phy-names = "usb-phy";
94 compatible = "qca,ar7100-spi";
95 reg = <0x1f000000 0x10>;
97 clocks = <&pll ATH79_CLK_AHB>;
100 #address-cells = <1>;
106 gmac: gmac@18070000 {
107 compatible = "qca,ar9330-gmac";
108 reg = <0x18070000 0x4>;
111 wmac: gmac@18100000 {
112 compatible = "qca,ar9330-wmac";
113 reg = <0x18100000 0x20000>;
122 compatible = "qca,ar7200-usb-phy";
124 reset-names = "usb-phy", "usb-suspend-override";
125 resets = <&rst 4>, <&rst 3>;
134 qca,ddr-wb-channel-interrupts = <2>, <3>;
135 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
139 compatible = "qca,ar9330-eth", "syscon";
141 pll-data = <0x00110000 0x00001099 0x00991099>;
151 reset-names = "mdio";
156 reset-names = "mdio";
162 compatible = "qca,ar9330-eth", "syscon";
164 pll-data = <0x00110000 0x00001099 0x00991099>;