1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
6 compatible = "qca,ar9330";
17 compatible = "mips,mips24Kc";
18 clocks = <&pll ATH79_CLK_CPU>;
24 bootargs = "console=ttyATH0,115200";
29 ddr_ctrl: memory-controller@18000000 {
30 compatible = "qca,ar7240-ddr-controller";
31 reg = <0x18000000 0x100>;
33 #qca,ddr-wb-channel-cells = <1>;
37 compatible = "qca,ar9330-uart";
38 reg = <0x18020000 0x14>;
42 clocks = <&pll ATH79_CLK_REF>;
49 compatible = "qca,ar7100-gpio";
50 reg = <0x18040000 0x34>;
59 #interrupt-cells = <2>;
64 pinmux: pinmux@18040028 {
65 compatible = "pinctrl-single";
66 reg = <0x18040028 0x8>;
68 pinctrl-single,bit-per-mux;
69 pinctrl-single,register-width = <32>;
70 pinctrl-single,function-mask = <0x1>;
73 jtag_disable_pins: pinmux_jtag_disable_pins {
74 pinctrl-single,bits = <0x0 0x1 0x1>;
77 switch_led_pins: pinmux_switch_led_pins {
78 pinctrl-single,bits = <0x0 0x1f 0xf8>;
82 pll: pll-controller@18050000 {
83 compatible = "qca,ar9330-pll";
84 reg = <0x18050000 0x100>;
89 rst: reset-controller@1806001c {
90 compatible = "qca,ar7100-reset";
91 reg = <0x1806001c 0x4>;
98 compatible = "chipidea,usb2";
99 reg = <0x1b000000 0x200>;
103 reset-names = "usb-host";
105 phy-names = "usb-phy";
112 compatible = "qca,ar7100-spi";
113 reg = <0x1f000000 0x10>;
115 clocks = <&pll ATH79_CLK_AHB>;
118 #address-cells = <1>;
124 gmac: gmac@18070000 {
125 compatible = "qca,ar9330-gmac";
126 reg = <0x18070000 0x4>;
129 wmac: wmac@18100000 {
130 compatible = "qca,ar9330-wmac";
131 reg = <0x18100000 0x20000>;
140 compatible = "qca,ar7200-usb-phy";
142 reset-names = "usb-phy", "usb-suspend-override";
143 resets = <&rst 4>, <&rst 3>;
152 qca,ddr-wb-channel-interrupts = <2>, <3>;
153 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
157 compatible = "qca,ar9330-eth", "syscon";
159 pll-data = <0x00110000 0x00001099 0x00991099>;
169 reset-names = "mdio";
174 reset-names = "mdio";
180 compatible = "qca,ar9330-eth", "syscon";
182 pll-data = <0x00110000 0x00001099 0x00991099>;