1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ath79-clk.h>
6 compatible = "qca,ar9132";
12 bootargs = "console=ttyS0,115200";
21 compatible = "mips,mips24Kc";
22 clocks = <&pll ATH79_CLK_CPU>;
27 cpuintc: interrupt-controller {
28 compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";
31 #interrupt-cells = <1>;
33 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
34 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
35 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
39 compatible = "simple-bus";
45 interrupt-parent = <&cpuintc>;
48 compatible = "simple-bus";
54 interrupt-parent = <&miscintc>;
56 ddr_ctrl: memory-controller@18000000 {
57 compatible = "qca,ar9132-ddr-controller",
58 "qca,ar7240-ddr-controller";
59 reg = <0x18000000 0x100>;
61 #qca,ddr-wb-channel-cells = <1>;
65 compatible = "ns8250";
66 reg = <0x18020000 0x20>;
69 clocks = <&pll ATH79_CLK_AHB>;
80 compatible = "qca,ar9132-gpio",
82 reg = <0x18040000 0x30>;
91 #interrupt-cells = <2>;
94 pll: pll-controller@18050000 {
95 compatible = "qca,ar9132-pll",
97 reg = <0x18050000 0x20>;
100 /* The board must provides the ref clock */
103 clock-output-names = "cpu", "ddr", "ahb";
107 compatible = "qca,ar7130-wdt";
108 reg = <0x18060008 0x8>;
112 clocks = <&pll ATH79_CLK_AHB>;
116 miscintc: interrupt-controller@18060010 {
117 compatible = "qca,ar9132-misc-intc",
118 "qca,ar7100-misc-intc";
119 reg = <0x18060010 0x8>;
121 interrupt-parent = <&cpuintc>;
124 interrupt-controller;
125 #interrupt-cells = <1>;
128 rst: reset-controller@1806001c {
129 compatible = "qca,ar9132-reset",
131 reg = <0x1806001c 0x4>;
138 compatible = "qca,ar7100-ehci", "generic-ehci";
139 reg = <0x1b000100 0x100>;
144 has-transaction-translator;
153 compatible = "qca,ar9132-spi", "qca,ar7100-spi";
154 reg = <0x1f000000 0x10>;
156 clocks = <&pll ATH79_CLK_AHB>;
161 #address-cells = <1>;
165 wmac: wmac@180c0000 {
166 compatible = "qca,ar9130-wmac";
167 reg = <0x180c0000 0x230000>;
176 compatible = "qca,ar7200-usb-phy";
178 reset-names = "usb-phy", "usb-suspend-override";
179 resets = <&rst 4>, <&rst 3>;
188 compatible = "qca,ar9130-eth", "syscon";
189 reg = <0x19000000 0x200
191 pll-data = <0x1a000000 0x13000a44 0x00441099>;
192 pll-reg = <0x4 0x10 17>;
194 resets = <&rst 8>, <&rst 9>;
195 reset-names = "phy", "mac";