target/linux/ath79/dts/ar9132.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <dt-bindings/clock/ath79-clk.h>
   3
   4 / {
   5         compatible = "qca,ar9132";
   6
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9
  10         chosen {
  11                 bootargs = "console=ttyS0,115200";
  12         };
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 cpu@0 {
  19                         device_type = "cpu";
  20                         compatible = "mips,mips24Kc";
  21                         clocks = <&pll ATH79_CLK_CPU>;
  22                         reg = <0>;
  23                 };
  24         };
  25
  26         cpuintc: interrupt-controller {
  27                 compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";
  28
  29                 interrupt-controller;
  30                 #interrupt-cells = <1>;
  31
  32                 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
  33                 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
  34                                         <&ddr_ctrl 0>, <&ddr_ctrl 1>;
  35         };
  36
  37         ahb {
  38                 compatible = "simple-bus";
  39                 ranges;
  40
  41                 #address-cells = <1>;
  42                 #size-cells = <1>;
  43
  44                 interrupt-parent = <&cpuintc>;
  45
  46                 apb {
  47                         compatible = "simple-bus";
  48                         ranges;
  49
  50                         #address-cells = <1>;
  51                         #size-cells = <1>;
  52
  53                         interrupt-parent = <&miscintc>;
  54
  55                         ddr_ctrl: memory-controller@18000000 {
  56                                 compatible = "qca,ar9132-ddr-controller",
  57                                                 "qca,ar7240-ddr-controller";
  58                                 reg = <0x18000000 0x100>;
  59
  60                                 #qca,ddr-wb-channel-cells = <1>;
  61                         };
  62
  63                         uart: uart@18020000 {
  64                                 compatible = "ns8250";
  65                                 reg = <0x18020000 0x20>;
  66                                 interrupts = <3>;
  67
  68                                 clocks = <&pll ATH79_CLK_AHB>;
  69                                 clock-names = "uart";
  70
  71                                 reg-io-width = <4>;
  72                                 reg-shift = <2>;
  73                                 no-loopback-test;
  74
  75                                 status = "disabled";
  76                         };
  77
  78                         gpio: gpio@18040000 {
  79                                 compatible = "qca,ar9132-gpio",
  80                                                 "qca,ar7100-gpio";
  81                                 reg = <0x18040000 0x30>;
  82                                 interrupts = <2>;
  83
  84                                 ngpios = <22>;
  85
  86                                 gpio-controller;
  87                                 #gpio-cells = <2>;
  88
  89                                 interrupt-controller;
  90                                 #interrupt-cells = <2>;
  91                         };
  92
  93                         pll: pll-controller@18050000 {
  94                                 compatible = "qca,ar9132-pll",
  95                                                 "qca,ar9130-pll";
  96                                 reg = <0x18050000 0x20>;
  97
  98                                 clock-names = "ref";
  99                                 /* The board must provides the ref clock */
 100
 101                                 #clock-cells = <1>;
 102                                 clock-output-names = "cpu", "ddr", "ahb";
 103                         };
 104
 105                         wdt: wdt@18060008 {
 106                                 compatible = "qca,ar7130-wdt";
 107                                 reg = <0x18060008 0x8>;
 108
 109                                 interrupts = <4>;
 110
 111                                 clocks = <&pll ATH79_CLK_AHB>;
 112                                 clock-names = "wdt";
 113                         };
 114
 115                         miscintc: interrupt-controller@18060010 {
 116                                 compatible = "qca,ar9132-misc-intc",
 117                                            "qca,ar7100-misc-intc";
 118                                 reg = <0x18060010 0x8>;
 119
 120                                 interrupt-parent = <&cpuintc>;
 121                                 interrupts = <6>;
 122
 123                                 interrupt-controller;
 124                                 #interrupt-cells = <1>;
 125                         };
 126
 127                         rst: reset-controller@1806001c {
 128                                 compatible = "qca,ar9132-reset",
 129                                                 "qca,ar7100-reset";
 130                                 reg = <0x1806001c 0x4>;
 131
 132                                 #reset-cells = <1>;
 133                         };
 134                 };
 135
 136                 usb: usb@1b000100 {
 137                         compatible = "qca,ar7100-ehci", "generic-ehci";
 138                         reg = <0x1b000100 0x100>;
 139
 140                         interrupts = <3>;
 141                         resets = <&rst 5>;
 142
 143                         has-transaction-translator;
 144
 145                         phy-names = "usb";
 146                         phys = <&usb_phy>;
 147
 148                         status = "disabled";
 149                 };
 150
 151                 spi: spi@1f000000 {
 152                         compatible = "qca,ar9132-spi", "qca,ar7100-spi";
 153                         reg = <0x1f000000 0x10>;
 154
 155                         clocks = <&pll ATH79_CLK_AHB>;
 156                         clock-names = "ahb";
 157
 158                         status = "disabled";
 159
 160                         #address-cells = <1>;
 161                         #size-cells = <0>;
 162                 };
 163         };
 164
 165         usb_phy: usb-phy {
 166                 compatible = "qca,ar7200-usb-phy";
 167
 168                 reset-names = "usb-phy", "usb-suspend-override";
 169                 resets = <&rst 4>, <&rst 3>;
 170
 171                 #phy-cells = <0>;
 172
 173                 status = "disabled";
 174         };
 175 };