ath79: add TP-Link TL-WR703N port
[oweals/openwrt.git] / target / linux / ath79 / dts / ar7241_ubnt_xm.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 #include "ar7241.dtsi"
7
8 / {
9         compatible = "ubnt,xm", "qca,ar7241";
10         model = "Ubiquiti Networks XM (rev 1.0) board";
11
12         memory@0 {
13                 device_type = "memory";
14                 reg = <0x0 0x2000000>;
15         };
16
17 /*      extosc: ref {
18                 compatible = "fixed-clock";
19                 #clock-cells = <0>;
20                 clock-frequency = <40000000>;
21         };
22 */
23         keys {
24                 compatible = "gpio-keys-polled";
25                 #address-cells = <1>;
26                 #size-cells = <0>;
27
28                 poll-interval = <20>;
29                 button@0 {
30                         label = "reset";
31                         linux,code = <KEY_RESTART>;
32                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
33                         debounce-interval = <60>;
34                 };
35         };
36
37         leds {
38                 compatible = "gpio-leds";
39                 led@0 {
40                         label = "ubnt:red:link1";
41                         gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
42                 };
43
44                 led@1 {
45                         label = "ubnt:orange:link2";
46                         gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
47                 };
48
49                 led@2 {
50                         label = "ubnt:green:link3";
51                         gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
52                 };
53
54                 led@3 {
55                         label = "ubnt:green:link4";
56                         gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
57                 };
58         };
59 };
60
61 &uart {
62         status = "okay";
63 };
64
65 /*&pll {
66         clocks = <&extosc>;
67 };*/
68
69 &spi {
70         status = "okay";
71         num-cs = <1>;
72
73         flash@0 {
74                 #address-cells = <1>;
75                 #size-cells = <1>;
76                 compatible = "mx25l6405d";
77                 reg = <0>;
78                 spi-max-frequency = <25000000>;
79
80                 partitions {
81                         compatible = "fixed-partitions";
82                         #address-cells = <1>;
83                         #size-cells = <1>;
84
85                         partition@0 {
86                                 label = "u-boot";
87                                 reg = <0x000000 0x040000>;
88                                 read-only;
89                         };
90
91                         partition@1 {
92                                 label = "u-boot-env";
93                                 reg = <0x040000 0x010000>;
94                         };
95
96                         partition@2 {
97                                 label = "firmware";
98                                 reg = <0x050000 0x750000>;
99                         };
100
101                         partition@3 {
102                                 label = "board_config";
103                                 reg = <0x7a0000 0x010000>;
104                                 read-only;
105                         };
106
107                         partition@4 {
108                                 label = "cfg";
109                                 reg = <0x7b0000 0x040000>;
110                                 read-only;
111                         };
112
113                         art: partition@5 {
114                                 label = "art";
115                                 reg = <0x7f0000 0x010000>;
116                                 read-only;
117                         };
118                 };
119         };
120 };
121
122 &pcie {
123         status = "okay";
124
125         ath9k@0000 {
126                 reg = <0x0000 0 0 0 0>;
127                 qca,no-eeprom;
128         };
129 };
130
131 &mdio0 {
132         status = "okay";
133
134         phy4: ethernet-phy@4 {
135                 reg = <4>;
136                 phy-mode = "mii";
137         };
138 };
139
140 &eth0 {
141         status = "okay";
142
143         mtd-mac-address = <&art 0x0>;
144
145         phy-mode = "mii";
146         phy-handle = <&phy4>;
147 };
148
149 &eth1 {
150         status = "okay";
151
152         mtd-mac-address = <&art 0x6>;
153 };