1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
6 compatible = "qca,ar7100";
14 compatible = "mips,mips24Kc";
15 clocks = <&pll ATH79_CLK_CPU>;
22 ddr_ctrl: memory-controller@18000000 {
23 compatible = "qca,ar7100-ddr-controller";
24 reg = <0x18000000 0x100>;
26 #qca,ddr-wb-channel-cells = <1>;
30 compatible = "ns16550a";
31 reg = <0x18020000 0x20>;
34 clocks = <&pll ATH79_CLK_AHB>;
44 usb_phy: usb-phy@18030000 {
45 compatible = "qca,ar7100-usb-phy";
46 reg = <0x18030000 0x10>;
48 reset-names = "usb-phy", "usb-host", "usb-ohci-dll";
49 resets = <&rst 4>, <&rst 5>, <&rst 6>;
57 compatible = "qca,ar7100-gpio";
58 reg = <0x18040000 0x30>;
67 #interrupt-cells = <2>;
70 pll: pll-controller@18050000 {
71 compatible = "qca,ar7100-pll", "syscon";
72 reg = <0x18050000 0x20>;
75 /* The board must provides the ref clock */
78 clock-output-names = "cpu", "ddr", "ahb";
82 compatible = "qca,ar7130-wdt";
83 reg = <0x18060008 0x8>;
87 clocks = <&pll ATH79_CLK_AHB>;
91 pci_intc: interrupt-controller@18060018 {
92 compatible = "qca,ar7100-misc-intc";
93 reg = <0x18060018 0x4>;
94 interrupt-parent = <&cpuintc>;
97 #interrupt-cells = <1>;
100 rst: reset-controller@18060024 {
101 compatible = "qca,ar7100-reset";
102 reg = <0x18060024 0x4>;
107 pcie0: pcie-controller@17010000 {
108 compatible = "qca,ar7100-pci";
109 #address-cells = <3>;
111 bus-range = <0x0 0x0>;
112 reg = <0x17010000 0x100>;
113 reg-names = "cfg_base";
114 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 /* pci memory */
115 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
117 interrupt-parent = <&pci_intc>;
120 #interrupt-cells = <1>;
122 interrupt-map-mask = <0xf800 0 0 0>;
123 interrupt-map = <0x8800 0 0 0 &pci_intc 0
124 0x9000 0 0 0 &pci_intc 1
125 0x9800 0 0 0 &pci_intc 2>;
133 compatible = "generic-ehci";
134 reg = <0x1b000000 0x1000>;
136 interrupt-parent = <&cpuintc>;
139 phy-names = "usb-phy";
148 compatible = "generic-ohci";
149 reg = <0x1c000000 0x1000>;
151 interrupt-parent = <&miscintc>;
154 phy-names = "usb-phy";
161 compatible = "qca,ar7100-spi";
162 reg = <0x1f000000 0x10>;
164 clocks = <&pll ATH79_CLK_AHB>;
167 #address-cells = <1>;
175 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
176 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
177 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
181 compatible = "qca,ar7100-misc-intc";
185 compatible = "qca,ar7100-eth", "syscon";
186 reg = <0x19000000 0x200
189 pll-data = <0x00110000 0x00001099 0x00991099>;
190 pll-reg = <0x4 0x10 17>;
204 compatible = "qca,ar7100-eth", "syscon";
205 reg = <0x1a000000 0x200
208 pll-data = <0x00110000 0x00001099 0x00991099>;
209 pll-reg = <0x4 0x14 19>;