Merge branch 'v1.4' into v1.5
[librecmc/librecmc.git] / target / linux / ar71xx / patches-4.4 / 911-add-ar300m-nand-support.patch
1 --- a/drivers/mtd/nand/Kconfig
2 +++ b/drivers/mtd/nand/Kconfig
3 @@ -566,4 +566,12 @@ config MTD_NAND_AR934X_HW_ECC
4         bool "Hardware ECC support for the AR934X NAND Controller (EXPERIMENTAL)"
5         depends on MTD_NAND_AR934X
6  
7 +config MTD_NAND_ATH79
8 +       tristate "Nand flash support for Qualcomm-Atheros SoCs 71xx & 9xxx"
9 +       default n
10 +       depends on MTD_NAND
11 +       help
12 +               Enables the driver for NAND flash controller on Qualcomm-Atheros System on Chips
13 +               This controller is used on families AR71xx and AR9xxx.
14 +
15  endif # MTD_NAND
16 --- a/drivers/mtd/nand/Makefile
17 +++ b/drivers/mtd/nand/Makefile
18 @@ -10,6 +10,7 @@ obj-$(CONFIG_MTD_SM_COMMON)           += sm_comm
19  
20  obj-$(CONFIG_MTD_NAND_CAFE)            += cafe_nand.o
21  obj-$(CONFIG_MTD_NAND_AMS_DELTA)       += ams-delta.o
22 +obj-$(CONFIG_MTD_NAND_ATH79)           += ath79_spinand.o
23  obj-$(CONFIG_MTD_NAND_DENALI)          += denali.o
24  obj-$(CONFIG_MTD_NAND_DENALI_PCI)      += denali_pci.o
25  obj-$(CONFIG_MTD_NAND_DENALI_DT)       += denali_dt.o
26 --- a/drivers/mtd/nand/nand_ids.c
27 +++ b/drivers/mtd/nand/nand_ids.c
28 @@ -52,6 +52,30 @@ struct nand_flash_dev nand_flash_ids[] =
29                 { .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} },
30                   SZ_8K, SZ_8K, SZ_2M, 0, 6, 640, NAND_ECC_INFO(40, SZ_1K),
31                   4 },
32 +       {"GD5F1GQ4U 1G 3.3V 8-bit",
33 +               { .id = {0xc8, 0xb1} },
34 +                 SZ_2K, SZ_128, SZ_128K, 0, 2, 128, NAND_ECC_INFO(4, SZ_512) },
35 +       {"GD5F2GQ4U 2G 3.3V 8-bit",
36 +               { .id = {0xc8, 0xb2} },
37 +                 SZ_2K, SZ_256, SZ_128K, 0, 2, 128, NAND_ECC_INFO(4, SZ_512) },
38 +       {"GD5F1GQ4R 1G 1.8V 8-bit",
39 +               { .id = {0xc8, 0xa1} },
40 +                 SZ_2K, SZ_128, SZ_128K, 0, 2, 128, NAND_ECC_INFO(4, SZ_512) },
41 +       {"GD5F2GQ4R 2G 1.8V 8-bit",
42 +               { .id = {0xc8, 0xa2} },
43 +                 SZ_2K, SZ_256, SZ_128K, 0, 2, 128, NAND_ECC_INFO(4, SZ_512) },
44 +       {"MX35LF1G4EAB 1G 3.3V 8-bit",
45 +               { .id = {0xc2, 0x12} },
46 +                 SZ_2K, SZ_128, SZ_128K, 0, 2, 64, NAND_ECC_INFO(4, SZ_512) },
47 +       {"MX35LF2G4EAB 2G 3.3V 8-bit",
48 +               { .id = {0xc2, 0x22} },
49 +                 SZ_2K, SZ_256, SZ_128K, 0, 2, 64, NAND_ECC_INFO(4, SZ_512) },
50 +       {"W25N01GV 1G 3.3V 8-bit",
51 +               { .id = {0xef, 0xaa} },
52 +                 SZ_2K, SZ_128, SZ_128K, 0, 2, 64, NAND_ECC_INFO(4, SZ_512) },
53 +       {"HYF1GQ4UAACAE-P1 128MiB 3.3V 8-bit",
54 +               { .id = { 0xc9, 0x59 }},
55 +                 SZ_2K, SZ_128, SZ_128K, 0, 2, SZ_128, NAND_ECC_INFO(4, SZ_512) },
56  
57         LEGACY_ID_NAND("NAND 4MiB 5V 8-bit",   0x6B, 4, SZ_8K, SP_OPTIONS),
58         LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),
59 @@ -181,6 +205,9 @@ struct nand_manufacturers nand_manuf_ids
60         {NAND_MFR_SANDISK, "SanDisk"},
61         {NAND_MFR_INTEL, "Intel"},
62         {NAND_MFR_ATO, "ATO"},
63 +       {NAND_MFR_GIGADEVICE, "Giga Device"},
64 +       {NAND_MFR_WINBOND, "Winbond"},
65 +       {NAND_MFR_HEYANGTEK, "HeYang Tek"},
66         {0x0, "Unknown"}
67  };
68  
69 --- a/include/linux/mtd/nand.h
70 +++ b/include/linux/mtd/nand.h
71 @@ -732,6 +732,9 @@ struct nand_chip {
72  #define NAND_MFR_MICRON                0x2c
73  #define NAND_MFR_AMD           0x01
74  #define NAND_MFR_MACRONIX      0xc2
75 +#define NAND_MFR_GIGADEVICE    0xc8
76 +#define NAND_MFR_WINBOND       0xef
77 +#define NAND_MFR_HEYANGTEK     0xc9
78  #define NAND_MFR_EON           0x92
79  #define NAND_MFR_SANDISK       0x45
80  #define NAND_MFR_INTEL         0x89