target/linux/ar71xx/files/drivers/net/phy/rtl8366_smi.c

   1 /*
   2  * Platform driver for the Realtek RTL8366 ethernet switch
   3  *
   4  * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published
   9  * by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/delay.h>
  17 #include <linux/gpio.h>
  18 #include <linux/spinlock.h>
  19 #include <linux/skbuff.h>
  20 #include <linux/switch.h>
  21 #include <linux/phy.h>
  22 #include <linux/rtl8366_smi.h>
  23
  24 /* #define DEBUG 1 */
  25
  26 #ifdef DEBUG
  27 #include <linux/debugfs.h>
  28 #endif
  29
  30 #define RTL8366_SMI_DRIVER_NAME "rtl8366-smi"
  31 #define RTL8366_SMI_DRIVER_DESC "Realtek RTL8366 switch driver"
  32 #define RTL8366_SMI_DRIVER_VER  "0.1.1"
  33
  34 #define RTL8366S_PHY_NO_MAX                 4
  35 #define RTL8366S_PHY_PAGE_MAX               7
  36 #define RTL8366S_PHY_ADDR_MAX               31
  37
  38 #define RTL8366_CHIP_GLOBAL_CTRL_REG        0x0000
  39 #define RTL8366_CHIP_CTRL_VLAN              (1 << 13)
  40
  41 #define RTL8366_RESET_CTRL_REG              0x0100
  42 #define RTL8366_CHIP_CTRL_RESET_HW          1
  43 #define RTL8366_CHIP_CTRL_RESET_SW          (1 << 1)
  44
  45 #define RTL8366S_CHIP_VERSION_CTRL_REG      0x0104
  46 #define RTL8366S_CHIP_VERSION_MASK          0xf
  47 #define RTL8366S_CHIP_ID_REG                0x0105
  48 #define RTL8366S_CHIP_ID_8366               0x8366
  49
  50 /* PHY registers control */
  51 #define RTL8366S_PHY_ACCESS_CTRL_REG        0x8028
  52 #define RTL8366S_PHY_ACCESS_DATA_REG        0x8029
  53
  54 #define RTL8366S_PHY_CTRL_READ              1
  55 #define RTL8366S_PHY_CTRL_WRITE             0
  56
  57 #define RTL8366S_PHY_REG_MASK               0x1f
  58 #define RTL8366S_PHY_PAGE_OFFSET            5
  59 #define RTL8366S_PHY_PAGE_MASK              (0x7 << 5)
  60 #define RTL8366S_PHY_NO_OFFSET              9
  61 #define RTL8366S_PHY_NO_MASK                (0x1f << 9)
  62
  63 #define RTL8366_SMI_ACK_RETRY_COUNT         5
  64 #define RTL8366_SMI_CLK_DELAY               10 /* nsec */
  65
  66 /* LED control registers */
  67 #define RTL8366_LED_BLINKRATE_REG           0x0420
  68 #define RTL8366_LED_BLINKRATE_BIT           0
  69 #define RTL8366_LED_BLINKRATE_MASK          0x0007
  70
  71 #define RTL8366_LED_CTRL_REG                0x0421
  72 #define RTL8366_LED_0_1_CTRL_REG            0x0422
  73 #define RTL8366_LED_2_3_CTRL_REG            0x0423
  74
  75 #define RTL8366S_MIB_COUNT                  33
  76 #define RTL8366S_GLOBAL_MIB_COUNT           1
  77 #define RTL8366S_MIB_COUNTER_PORT_OFFSET    0x0040
  78 #define RTL8366S_MIB_COUNTER_BASE           0x1000
  79 #define RTL8366S_MIB_CTRL_REG               0x11F0
  80 #define RTL8366S_MIB_CTRL_USER_MASK         0x01FF
  81 #define RTL8366S_MIB_CTRL_BUSY_MASK         0x0001
  82 #define RTL8366S_MIB_CTRL_RESET_MASK        0x0002
  83
  84 #define RTL8366S_MIB_CTRL_GLOBAL_RESET_MASK 0x0004
  85 #define RTL8366S_MIB_CTRL_PORT_RESET_BIT    0x0003
  86 #define RTL8366S_MIB_CTRL_PORT_RESET_MASK   0x01FC
  87
  88
  89 #define RTL8366S_PORT_VLAN_CTRL_BASE        0x0058
  90 #define RTL8366S_VLAN_TABLE_READ_BASE       0x018B
  91 #define RTL8366S_VLAN_TABLE_WRITE_BASE      0x0185
  92
  93 #define RTL8366S_VLAN_TB_CTRL_REG           0x010F
  94
  95 #define RTL8366S_TABLE_ACCESS_CTRL_REG      0x0180
  96 #define RTL8366S_TABLE_VLAN_READ_CTRL       0x0E01
  97 #define RTL8366S_TABLE_VLAN_WRITE_CTRL      0x0F01
  98
  99 #define RTL8366S_VLAN_MEMCONF_BASE          0x0016
 100
 101
 102 #define RTL8366S_PORT_LINK_STATUS_BASE      0x0060
 103 #define RTL8366S_PORT_STATUS_SPEED_MASK     0x0003
 104 #define RTL8366S_PORT_STATUS_DUPLEX_MASK    0x0004
 105 #define RTL8366S_PORT_STATUS_LINK_MASK      0x0010
 106 #define RTL8366S_PORT_STATUS_TXPAUSE_MASK   0x0020
 107 #define RTL8366S_PORT_STATUS_RXPAUSE_MASK   0x0040
 108 #define RTL8366S_PORT_STATUS_AN_MASK        0x0080
 109
 110
 111 #define RTL8366_PORT_NUM_CPU                5
 112 #define RTL8366_NUM_PORTS                   6
 113 #define RTL8366_NUM_VLANS                   16
 114 #define RTL8366_NUM_LEDGROUPS               4
 115 #define RTL8366_NUM_VIDS                    4096
 116 #define RTL8366S_PRIORITYMAX                7
 117 #define RTL8366S_FIDMAX                     7
 118
 119
 120 #define RTL8366_PORT_1                      (1 << 0) /* In userspace port 0 */
 121 #define RTL8366_PORT_2                      (1 << 1) /* In userspace port 1 */
 122 #define RTL8366_PORT_3                      (1 << 2) /* In userspace port 2 */
 123 #define RTL8366_PORT_4                      (1 << 3) /* In userspace port 3 */
 124
 125 #define RTL8366_PORT_UNKNOWN                (1 << 4) /* No known connection */
 126 #define RTL8366_PORT_CPU                    (1 << 5) /* CPU port */
 127
 128 #define RTL8366_PORT_ALL                    (RTL8366_PORT_1 |       \
 129                                              RTL8366_PORT_2 |       \
 130                                              RTL8366_PORT_3 |       \
 131                                              RTL8366_PORT_4 |       \
 132                                              RTL8366_PORT_UNKNOWN | \
 133                                              RTL8366_PORT_CPU)
 134
 135 #define RTL8366_PORT_ALL_BUT_CPU            (RTL8366_PORT_1 |       \
 136                                              RTL8366_PORT_2 |       \
 137                                              RTL8366_PORT_3 |       \
 138                                              RTL8366_PORT_4 |       \
 139                                              RTL8366_PORT_UNKNOWN)
 140
 141 #define RTL8366_PORT_ALL_EXTERNAL           (RTL8366_PORT_1 |       \
 142                                              RTL8366_PORT_2 |       \
 143                                              RTL8366_PORT_3 |       \
 144                                              RTL8366_PORT_4)
 145
 146 #define RTL8366_PORT_ALL_INTERNAL           (RTL8366_PORT_UNKNOWN | \
 147                                              RTL8366_PORT_CPU)
 148
 149 struct rtl8366s_vlanconfig {
 150         u16     reserved2:1;
 151         u16     priority:3;
 152         u16     vid:12;
 153
 154         u16     reserved1:1;
 155         u16     fid:3;
 156         u16     untag:6;
 157         u16     member:6;
 158 };
 159
 160 struct rtl8366s_vlan4kentry {
 161         u16     reserved1:4;
 162         u16     vid:12;
 163
 164         u16     reserved2:1;
 165         u16     fid:3;
 166         u16     untag:6;
 167         u16     member:6;
 168 };
 169
 170 static const char *MIBCOUNTERS[] = { "IfInOctets                        ",
 171                                      "EtherStatsOctets                  ",
 172                                      "EtherStatsUnderSizePkts           ",
 173                                      "EtherFregament                    ",
 174                                      "EtherStatsPkts64Octets            ",
 175                                      "EtherStatsPkts65to127Octets       ",
 176                                      "EtherStatsPkts128to255Octets      ",
 177                                      "EtherStatsPkts256to511Octets      ",
 178                                      "EtherStatsPkts512to1023Octets     ",
 179                                      "EtherStatsPkts1024to1518Octets    ",
 180                                      "EtherOversizeStats                ",
 181                                      "EtherStatsJabbers                 ",
 182                                      "IfInUcastPkts                     ",
 183                                      "EtherStatsMulticastPkts           ",
 184                                      "EtherStatsBroadcastPkts           ",
 185                                      "EtherStatsDropEvents              ",
 186                                      "Dot3StatsFCSErrors                ",
 187                                      "Dot3StatsSymbolErrors             ",
 188                                      "Dot3InPauseFrames                 ",
 189                                      "Dot3ControlInUnknownOpcodes       ",
 190                                      "IfOutOctets                       ",
 191                                      "Dot3StatsSingleCollisionFrames    ",
 192                                      "Dot3StatMultipleCollisionFrames   ",
 193                                      "Dot3sDeferredTransmissions        ",
 194                                      "Dot3StatsLateCollisions           ",
 195                                      "EtherStatsCollisions              ",
 196                                      "Dot3StatsExcessiveCollisions      ",
 197                                      "Dot3OutPauseFrames                ",
 198                                      "Dot1dBasePortDelayExceededDiscards",
 199                                      "Dot1dTpPortInDiscards             ",
 200                                      "IfOutUcastPkts                    ",
 201                                      "IfOutMulticastPkts                ",
 202                                      "IfOutBroadcastPkts                ",
 203                                      NULL };
 204
 205 struct rtl8366_smi {
 206         struct platform_device             *pdev;
 207         struct rtl8366_smi_platform_data   *pdata;
 208         spinlock_t                         lock;
 209         struct mii_bus                     *mii_bus;
 210         struct switch_dev                  dev;
 211         int                                mii_irq[PHY_MAX_ADDR];
 212 #ifdef DEBUG
 213         struct dentry                      *debugfs_root;
 214 #endif
 215 };
 216
 217 #ifdef DEBUG
 218 u16 g_dbg_reg;
 219 #endif
 220
 221 #define to_rtl8366(_dev) container_of(_dev, struct rtl8366_smi, dev)
 222
 223 static inline void rtl8366_smi_clk_delay(struct rtl8366_smi *smi)
 224 {
 225         ndelay(RTL8366_SMI_CLK_DELAY);
 226 }
 227
 228 static void rtl8366_smi_start(struct rtl8366_smi *smi)
 229 {
 230         unsigned int sda = smi->pdata->gpio_sda;
 231         unsigned int sck = smi->pdata->gpio_sck;
 232
 233         /*
 234          * Set GPIO pins to output mode, with initial state:
 235          * SCK = 0, SDA = 1
 236          */
 237         gpio_direction_output(sck, 0);
 238         gpio_direction_output(sda, 1);
 239         rtl8366_smi_clk_delay(smi);
 240
 241         /* CLK 1: 0 -> 1, 1 -> 0 */
 242         gpio_set_value(sck, 1);
 243         rtl8366_smi_clk_delay(smi);
 244         gpio_set_value(sck, 0);
 245         rtl8366_smi_clk_delay(smi);
 246
 247         /* CLK 2: */
 248         gpio_set_value(sck, 1);
 249         rtl8366_smi_clk_delay(smi);
 250         gpio_set_value(sda, 0);
 251         rtl8366_smi_clk_delay(smi);
 252         gpio_set_value(sck, 0);
 253         rtl8366_smi_clk_delay(smi);
 254         gpio_set_value(sda, 1);
 255 }
 256
 257 static void rtl8366_smi_stop(struct rtl8366_smi *smi)
 258 {
 259         unsigned int sda = smi->pdata->gpio_sda;
 260         unsigned int sck = smi->pdata->gpio_sck;
 261
 262         rtl8366_smi_clk_delay(smi);
 263         gpio_set_value(sda, 0);
 264         gpio_set_value(sck, 1);
 265         rtl8366_smi_clk_delay(smi);
 266         gpio_set_value(sda, 1);
 267         rtl8366_smi_clk_delay(smi);
 268         gpio_set_value(sck, 1);
 269         rtl8366_smi_clk_delay(smi);
 270         gpio_set_value(sck, 0);
 271         rtl8366_smi_clk_delay(smi);
 272         gpio_set_value(sck, 1);
 273
 274         /* add a click */
 275         rtl8366_smi_clk_delay(smi);
 276         gpio_set_value(sck, 0);
 277         rtl8366_smi_clk_delay(smi);
 278         gpio_set_value(sck, 1);
 279
 280         /* set GPIO pins to input mode */
 281         gpio_direction_input(sda);
 282         gpio_direction_input(sck);
 283 }
 284
 285 static void rtl8366_smi_write_bits(struct rtl8366_smi *smi, u32 data, u32 len)
 286 {
 287         unsigned int sda = smi->pdata->gpio_sda;
 288         unsigned int sck = smi->pdata->gpio_sck;
 289
 290         for (; len > 0; len--) {
 291                 rtl8366_smi_clk_delay(smi);
 292
 293                 /* prepare data */
 294                 if ( data & ( 1 << (len - 1)) )
 295                         gpio_set_value(sda, 1);
 296                 else
 297                         gpio_set_value(sda, 0);
 298                 rtl8366_smi_clk_delay(smi);
 299
 300                 /* clocking */
 301                 gpio_set_value(sck, 1);
 302                 rtl8366_smi_clk_delay(smi);
 303                 gpio_set_value(sck, 0);
 304         }
 305 }
 306
 307 static void rtl8366_smi_read_bits(struct rtl8366_smi *smi, u32 len, u32 *data)
 308 {
 309         unsigned int sda = smi->pdata->gpio_sda;
 310         unsigned int sck = smi->pdata->gpio_sck;
 311
 312         gpio_direction_input(sda);
 313
 314         for (*data = 0; len > 0; len--) {
 315                 u32 u;
 316
 317                 rtl8366_smi_clk_delay(smi);
 318
 319                 /* clocking */
 320                 gpio_set_value(sck, 1);
 321                 rtl8366_smi_clk_delay(smi);
 322                 u = gpio_get_value(sda);
 323                 gpio_set_value(sck, 0);
 324
 325                 *data |= (u << (len - 1));
 326         }
 327
 328         gpio_direction_output(sda, 0);
 329 }
 330
 331 static int rtl8366_smi_wait_for_ack(struct rtl8366_smi *smi)
 332 {
 333         int retry_cnt;
 334
 335         retry_cnt = 0;
 336         do {
 337                 u32 ack;
 338
 339                 rtl8366_smi_read_bits(smi, 1, &ack);
 340                 if (ack == 0)
 341                         break;
 342
 343                 if (++retry_cnt > RTL8366_SMI_ACK_RETRY_COUNT)
 344                         return -EIO;
 345         } while (1);
 346
 347         return 0;
 348 }
 349
 350 static int rtl8366_smi_write_byte(struct rtl8366_smi *smi, u8 data)
 351 {
 352         rtl8366_smi_write_bits(smi, data, 8);
 353         return rtl8366_smi_wait_for_ack(smi);
 354 }
 355
 356 static int rtl8366_smi_read_byte0(struct rtl8366_smi *smi, u8 *data)
 357 {
 358         u32 t;
 359
 360         /* read data */
 361         rtl8366_smi_read_bits(smi, 8, &t);
 362         *data = (t & 0xff);
 363
 364         /* send an ACK */
 365         rtl8366_smi_write_bits(smi, 0x00, 1);
 366
 367         return 0;
 368 }
 369
 370 static int rtl8366_smi_read_byte1(struct rtl8366_smi *smi, u8 *data)
 371 {
 372         u32 t;
 373
 374         /* read data */
 375         rtl8366_smi_read_bits(smi, 8, &t);
 376         *data = (t & 0xff);
 377
 378         /* send an ACK */
 379         rtl8366_smi_write_bits(smi, 0x01, 1);
 380
 381         return 0;
 382 }
 383
 384 static int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
 385 {
 386         unsigned long flags;
 387         u8 lo = 0;
 388         u8 hi = 0;
 389         int ret;
 390
 391         spin_lock_irqsave(&smi->lock, flags);
 392
 393         rtl8366_smi_start(smi);
 394
 395         /* send READ command */
 396         ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x01);
 397         if (ret)
 398                 goto out;
 399
 400         /* set ADDR[7:0] */
 401         ret = rtl8366_smi_write_byte(smi, addr & 0xff);
 402         if (ret)
 403                 goto out;
 404
 405         /* set ADDR[15:8] */
 406         ret = rtl8366_smi_write_byte(smi, addr >> 8);
 407         if (ret)
 408                 goto out;
 409
 410         /* read DATA[7:0] */
 411         rtl8366_smi_read_byte0(smi, &lo);
 412         /* read DATA[15:8] */
 413         rtl8366_smi_read_byte1(smi, &hi);
 414
 415         *data = ((u32) lo) | (((u32) hi) << 8);
 416
 417         ret = 0;
 418
 419  out:
 420         rtl8366_smi_stop(smi);
 421         spin_unlock_irqrestore(&smi->lock, flags);
 422
 423         return ret;
 424 }
 425
 426 static int rtl8366_smi_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data)
 427 {
 428         unsigned long flags;
 429         int ret;
 430
 431         spin_lock_irqsave(&smi->lock, flags);
 432
 433         rtl8366_smi_start(smi);
 434
 435         /* send WRITE command */
 436         ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x00);
 437         if (ret)
 438                 goto out;
 439
 440         /* set ADDR[7:0] */
 441         ret = rtl8366_smi_write_byte(smi, addr & 0xff);
 442         if (ret)
 443                 goto out;
 444
 445         /* set ADDR[15:8] */
 446         ret = rtl8366_smi_write_byte(smi, addr >> 8);
 447         if (ret)
 448                 goto out;
 449
 450         /* write DATA[7:0] */
 451         ret = rtl8366_smi_write_byte(smi, data & 0xff);
 452         if (ret)
 453                 goto out;
 454
 455         /* write DATA[15:8] */
 456         ret = rtl8366_smi_write_byte(smi, data >> 8);
 457         if (ret)
 458                 goto out;
 459
 460         ret = 0;
 461
 462  out:
 463         rtl8366_smi_stop(smi);
 464         spin_unlock_irqrestore(&smi->lock, flags);
 465
 466         return ret;
 467 }
 468
 469 static int rtl8366_smi_read_phy_reg(struct rtl8366_smi *smi,
 470                                     u32 phy_no, u32 page, u32 addr, u32 *data)
 471 {
 472         u32 reg;
 473         int ret;
 474
 475         if (phy_no > RTL8366S_PHY_NO_MAX)
 476                 return -EINVAL;
 477
 478         if (page > RTL8366S_PHY_PAGE_MAX)
 479                 return -EINVAL;
 480
 481         if (addr > RTL8366S_PHY_ADDR_MAX)
 482                 return -EINVAL;
 483
 484         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 485                                     RTL8366S_PHY_CTRL_READ);
 486         if (ret)
 487                 return ret;
 488
 489         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 490               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 491               (addr & RTL8366S_PHY_REG_MASK);
 492
 493         ret = rtl8366_smi_write_reg(smi, reg, 0);
 494         if (ret)
 495                 return ret;
 496
 497         ret = rtl8366_smi_read_reg(smi, RTL8366S_PHY_ACCESS_DATA_REG, data);
 498         if (ret)
 499                 return ret;
 500
 501         return 0;
 502 }
 503
 504 static int rtl8366_smi_write_phy_reg(struct rtl8366_smi *smi,
 505                                      u32 phy_no, u32 page, u32 addr, u32 data)
 506 {
 507         u32 reg;
 508         int ret;
 509
 510         if (phy_no > RTL8366S_PHY_NO_MAX)
 511                 return -EINVAL;
 512
 513         if (page > RTL8366S_PHY_PAGE_MAX)
 514                 return -EINVAL;
 515
 516         if (addr > RTL8366S_PHY_ADDR_MAX)
 517                 return -EINVAL;
 518
 519         ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
 520                                     RTL8366S_PHY_CTRL_WRITE);
 521         if (ret)
 522                 return ret;
 523
 524         reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
 525               ((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
 526               (addr & RTL8366S_PHY_REG_MASK);
 527
 528         ret = rtl8366_smi_write_reg(smi, reg, data);
 529         if (ret)
 530                 return ret;
 531
 532         return 0;
 533 }
 534
 535 static int rtl8366_get_mib_counter(struct rtl8366_smi *smi, int counter,
 536                                    int port, unsigned long long *val)
 537 {
 538         int i;
 539         int err;
 540         u32 addr, data, regoffset;
 541         u64 mibvalue;
 542
 543         /* address offset to MIBs counter */
 544         const u16 mibLength[RTL8366S_MIB_COUNT] = {4, 4, 2, 2, 2, 2, 2, 2, 2,
 545                                                    2, 2, 2, 2, 2, 2, 2, 2, 2,
 546                                                    2, 2, 4, 2, 2, 2, 2, 2, 2,
 547                                                    2, 2, 2, 2, 2, 2};
 548
 549         if (port > RTL8366_NUM_PORTS || counter >= RTL8366S_MIB_COUNT)
 550                 return -EINVAL;
 551
 552         i = 0;
 553         regoffset = RTL8366S_MIB_COUNTER_PORT_OFFSET * (port);
 554
 555         while (i < counter) {
 556                 regoffset += mibLength[i];
 557                 i++;
 558         }
 559
 560         addr = RTL8366S_MIB_COUNTER_BASE + regoffset;
 561
 562
 563         /* writing access counter address first */
 564         /* then ASIC will prepare 64bits counter wait for being retrived */
 565         data = 0;/* writing data will be discard by ASIC */
 566         err = rtl8366_smi_write_reg(smi, addr, data);
 567         if (err)
 568                 return err;
 569
 570         /* read MIB control register */
 571         err =  rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
 572         if (err)
 573                 return err;
 574
 575         if (data & RTL8366S_MIB_CTRL_BUSY_MASK)
 576                 return -EBUSY;
 577
 578         if (data & RTL8366S_MIB_CTRL_RESET_MASK)
 579                 return -EIO;
 580
 581         mibvalue = 0;
 582         addr = addr + mibLength[counter] - 1;
 583         i = mibLength[counter];
 584
 585         while (i) {
 586                 err = rtl8366_smi_read_reg(smi, addr, &data);
 587                 if (err)
 588                         return err;
 589
 590                 mibvalue = (mibvalue << 16) | (data & 0xFFFF);
 591
 592                 addr--;
 593                 i--;
 594         }
 595
 596         *val = mibvalue;
 597         return 0;
 598 }
 599
 600 static int rtl8366s_get_vlan_4k_entry(struct rtl8366_smi *smi,
 601                                       struct rtl8366s_vlan4kentry *vlan4k)
 602 {
 603         int err;
 604         u32 data;
 605         u32 vid;
 606         u16 *tableaddr;
 607
 608         vid = vlan4k->vid;
 609
 610         if (vid >= RTL8366_NUM_VIDS)
 611                 return -EINVAL;
 612
 613         tableaddr = (u16 *)vlan4k;
 614
 615         /* write VID */
 616         data = *tableaddr;
 617         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 618         if (err)
 619                 return err;
 620
 621         /* write table access control word */
 622         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 623                                     RTL8366S_TABLE_VLAN_READ_CTRL);
 624         if (err)
 625                 return err;
 626
 627         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE, &data);
 628         if (err)
 629                 return err;
 630
 631         *tableaddr = data;
 632         tableaddr++;
 633
 634         err = rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TABLE_READ_BASE + 1,
 635                                    &data);
 636         if (err)
 637                 return err;
 638
 639         *tableaddr = data;
 640         vlan4k->vid = vid;
 641
 642         return 0;
 643 }
 644
 645 static int rtl8366s_set_vlan_4k_entry(struct rtl8366_smi *smi,
 646                                       const struct rtl8366s_vlan4kentry *vlan4k)
 647 {
 648         int err;
 649         u32 data;
 650         u16 *tableaddr;
 651
 652         if (vlan4k->vid >= RTL8366_NUM_VIDS ||
 653             vlan4k->member > RTL8366_PORT_ALL ||
 654             vlan4k->untag > RTL8366_PORT_ALL ||
 655             vlan4k->fid > RTL8366S_FIDMAX)
 656                 return -EINVAL;
 657
 658         tableaddr = (u16 *)vlan4k;
 659
 660         data = *tableaddr;
 661
 662         err = rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE, data);
 663         if (err)
 664                 return err;
 665
 666         tableaddr++;
 667
 668         data = *tableaddr;
 669
 670         rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TABLE_WRITE_BASE + 1, data);
 671
 672
 673         /* write table access control word */
 674         err = rtl8366_smi_write_reg(smi, RTL8366S_TABLE_ACCESS_CTRL_REG,
 675                                     RTL8366S_TABLE_VLAN_WRITE_CTRL);
 676         if (err)
 677                 return err;
 678
 679         return 0;
 680 }
 681
 682 static int rtl8366s_get_vlan_member_config(struct rtl8366_smi *smi, u32 index,
 683                                            struct rtl8366s_vlanconfig
 684                                            *vlanmconf)
 685 {
 686         int err;
 687         u32 addr;
 688         u32 data;
 689         u16 *tableaddr;
 690
 691         if (index >= RTL8366_NUM_VLANS)
 692                 return -EINVAL;
 693
 694         tableaddr = (u16 *)vlanmconf;
 695
 696         addr = RTL8366S_VLAN_MEMCONF_BASE + (index << 1);
 697
 698         err = rtl8366_smi_read_reg(smi, addr, &data);
 699         if (err)
 700                 return err;
 701
 702         *tableaddr = data;
 703         tableaddr++;
 704
 705         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index << 1);
 706
 707         err = rtl8366_smi_read_reg(smi, addr, &data);
 708         if (err)
 709                 return err;
 710
 711         *tableaddr = data;
 712
 713         return 0;
 714 }
 715
 716 static int rtl8366s_set_vlan_member_config(struct rtl8366_smi *smi, u32 index,
 717                                            const struct rtl8366s_vlanconfig
 718                                            *vlanmconf)
 719 {
 720         int err;
 721         u32 addr;
 722         u32 data;
 723         u16 *tableaddr;
 724
 725         if (index >= RTL8366_NUM_VLANS ||
 726            vlanmconf->vid >= RTL8366_NUM_VIDS ||
 727            vlanmconf->priority > RTL8366S_PRIORITYMAX ||
 728            vlanmconf->member > RTL8366_PORT_ALL ||
 729            vlanmconf->untag > RTL8366_PORT_ALL ||
 730            vlanmconf->fid > RTL8366S_FIDMAX)
 731                 return -EINVAL;
 732
 733         addr = RTL8366S_VLAN_MEMCONF_BASE + (index << 1);
 734
 735
 736         tableaddr = (u16 *)vlanmconf;
 737         data = *tableaddr;
 738
 739         err = rtl8366_smi_write_reg(smi, addr, data);
 740         if (err)
 741                 return err;
 742
 743         addr = RTL8366S_VLAN_MEMCONF_BASE + 1 + (index << 1);
 744
 745         tableaddr++;
 746         data = *tableaddr;
 747
 748         err = rtl8366_smi_write_reg(smi, addr, data);
 749         if (err)
 750                 return err;
 751
 752         return 0;
 753 }
 754
 755 static int rtl8366_get_port_vlan_index(struct rtl8366_smi *smi, int port,
 756                                        int *val)
 757 {
 758         int err;
 759         u32 addr;
 760         u32 data;
 761
 762         /* bits mapping to port vlan control register of port n */
 763         const u16 bits[RTL8366_NUM_PORTS] = { 0x000F, 0x00F0, 0x0F00,
 764                                              0xF000, 0x000F, 0x00F0 };
 765         /* bits offset to port vlan control register of port n */
 766         const u16 bitoffset[RTL8366_NUM_PORTS] = { 0, 4, 8, 12, 0, 4 };
 767         /* address offset to port vlan control register of port n */
 768         const u16 addroffset[RTL8366_NUM_PORTS] = { 0, 0, 0, 0, 1, 1 };
 769
 770         if (port >= RTL8366_NUM_PORTS)
 771                 return -EINVAL;
 772
 773         addr = RTL8366S_PORT_VLAN_CTRL_BASE + addroffset[port];
 774
 775         err = rtl8366_smi_read_reg(smi, addr, &data);
 776         if (err)
 777                 return err;
 778
 779         *val = (data & bits[port]) >> bitoffset[port];
 780
 781         return 0;
 782
 783 }
 784
 785 static int rtl8366_get_vlan_port_pvid(struct rtl8366_smi *smi, int port,
 786                                       int *val)
 787 {
 788         int err;
 789         int index;
 790         struct rtl8366s_vlanconfig vlanMC;
 791
 792         memset(&vlanMC, '\0', sizeof(struct rtl8366s_vlanconfig));
 793
 794         err = rtl8366_get_port_vlan_index(smi, port, &index);
 795         if (err)
 796                 return err;
 797
 798         err = rtl8366s_get_vlan_member_config(smi, index, &vlanMC);
 799         if (err)
 800                 return err;
 801
 802         *val = vlanMC.vid;
 803         return 0;
 804 }
 805
 806 static int rtl8366_set_port_vlan_index(struct rtl8366_smi *smi, int port,
 807                                        int index)
 808 {
 809         int err;
 810         u32 addr;
 811         u32 data;
 812         u32 vlan_data;
 813         u32 bits;
 814
 815         /* bits mapping to port vlan control register of port n */
 816         const u16 bitmasks[6] = { 0x000F, 0x00F0, 0x0F00,
 817                                  0xF000, 0x000F, 0x00F0 };
 818         /* bits offset to port vlan control register of port n */
 819         const u16 bitOff[6] = { 0, 4, 8, 12, 0, 4 };
 820         /* address offset to port vlan control register of port n */
 821         const u16 addrOff[6] = { 0, 0, 0, 0, 1, 1 };
 822
 823         if (port >= RTL8366_NUM_PORTS || index >= RTL8366_NUM_VLANS)
 824                 return -EINVAL;
 825
 826         addr = RTL8366S_PORT_VLAN_CTRL_BASE + addrOff[port];
 827
 828         bits = bitmasks[port];
 829
 830         data = (index << bitOff[port]) & bits;
 831
 832         err = rtl8366_smi_read_reg(smi, addr, &vlan_data);
 833         if (err)
 834                 return err;
 835
 836         vlan_data &= ~(vlan_data & bits);
 837         vlan_data |= data;
 838
 839         err = rtl8366_smi_write_reg(smi, addr, vlan_data);
 840         if (err)
 841                 return err;
 842
 843         return 0;
 844 }
 845
 846 static int rtl8366_set_vlan_port_pvid(struct rtl8366_smi *smi, int port,
 847                                       int val)
 848 {
 849         int i;
 850         struct rtl8366s_vlanconfig vlanMC;
 851         struct rtl8366s_vlan4kentry vlan4K;
 852
 853         if (port >= RTL8366_NUM_PORTS || val >= RTL8366_NUM_VIDS)
 854                 return -EINVAL;
 855
 856
 857
 858         /* Updating the 4K entry; lookup it and change the port member set */
 859         memset(&vlan4K, '\0', sizeof(struct rtl8366s_vlan4kentry));
 860         vlan4K.vid = val;
 861         rtl8366s_get_vlan_4k_entry(smi, &vlan4K);
 862         vlan4K.member |= ((1 << port) | RTL8366_PORT_CPU);
 863         vlan4K.untag = RTL8366_PORT_ALL_BUT_CPU;
 864         rtl8366s_set_vlan_4k_entry(smi, &vlan4K);
 865
 866         /* For the 16 entries more work needs to be done. First see if such
 867            VID is already there and change it */
 868         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 869                 memset(&vlanMC, '\0', sizeof(struct rtl8366s_vlanconfig));
 870                 rtl8366s_get_vlan_member_config(smi, i, &vlanMC);
 871
 872                 /* Try to find an existing vid and update port member set */
 873                 if (val == vlanMC.vid) {
 874                         vlanMC.member |= ((1 << port) | RTL8366_PORT_CPU);
 875                         rtl8366s_set_vlan_member_config(smi, i, &vlanMC);
 876
 877                         /* Now update PVID register settings */
 878                         rtl8366_set_port_vlan_index(smi, port, i);
 879
 880                         return 0;
 881                 }
 882         }
 883
 884         /* PVID could not be found from vlan table. Replace unused (one that
 885            has no member ports) with new one */
 886         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
 887                 memset(&vlanMC, '\0', sizeof(struct rtl8366s_vlanconfig));
 888                 rtl8366s_get_vlan_member_config(smi, i, &vlanMC);
 889
 890                 /* See if this vlan member configuration is unused. It is
 891                    unused if member set contains no ports or CPU port only */
 892                 if (!vlanMC.member || vlanMC.member == RTL8366_PORT_CPU) {
 893                         vlanMC.vid = val;
 894                         vlanMC.priority = 0;
 895                         vlanMC.untag = RTL8366_PORT_ALL_BUT_CPU;
 896                         vlanMC.member = ((1 << port) | RTL8366_PORT_CPU);
 897                         vlanMC.fid = 0;
 898
 899                         rtl8366s_set_vlan_member_config(smi, i, &vlanMC);
 900
 901                         /* Now update PVID register settings */
 902                         rtl8366_set_port_vlan_index(smi, port, i);
 903
 904                         return 0;
 905                 }
 906         }
 907
 908         dev_err(&smi->pdev->dev, "All 16 vlan member configurations are in "
 909                 "use\n");
 910         return -EINVAL;
 911 }
 912
 913
 914 static int rtl8366_vlan_set_vlan(struct rtl8366_smi *smi, int enable)
 915 {
 916         u32 data = 0;
 917         rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
 918
 919         data &= ~(data & RTL8366_CHIP_CTRL_VLAN);
 920         if (enable)
 921                 data |= RTL8366_CHIP_CTRL_VLAN;
 922
 923         return rtl8366_smi_write_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, data);
 924 }
 925
 926 static int rtl8366_vlan_set_4ktable(struct rtl8366_smi *smi, int enable)
 927 {
 928         u32 data = 0;
 929         rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, &data);
 930
 931         data &= ~(data & 1);
 932         if (enable)
 933                 data |= 1;
 934
 935         return rtl8366_smi_write_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, data);
 936 }
 937
 938 static int rtl8366s_reset_vlan(struct rtl8366_smi *smi)
 939 {
 940         int i;
 941         struct rtl8366s_vlan4kentry vlan4K;
 942         struct rtl8366s_vlanconfig vlanMC;
 943
 944         /* clear 16 VLAN member configuration */
 945         for (i = 0; i < RTL8366_NUM_VLANS; i++) {
 946                 vlanMC.vid = 0;
 947                 vlanMC.priority = 0;
 948                 vlanMC.member = 0;
 949                 vlanMC.untag = 0;
 950                 vlanMC.fid = 0;
 951                 if (rtl8366s_set_vlan_member_config(smi, i, &vlanMC) != 0)
 952                         return -EIO;
 953         }
 954
 955         /* Set a default VLAN with vid 1 to 4K table for all ports */
 956         vlan4K.vid = 1;
 957         vlan4K.member = RTL8366_PORT_ALL;
 958         vlan4K.untag = RTL8366_PORT_ALL;
 959         vlan4K.fid = 0;
 960         if (rtl8366s_set_vlan_4k_entry(smi, &vlan4K) != 0)
 961                 return -EIO;
 962
 963         /* Set all ports PVID to default VLAN */
 964         for (i = 0; i < RTL8366_NUM_PORTS; i++) {
 965                 if (rtl8366_set_vlan_port_pvid(smi, i, 0) != 0)
 966                         return -EIO;
 967         }
 968
 969         return 0;
 970 }
 971
 972 #ifdef DEBUG
 973 static int rtl8366_debugfs_open(struct inode *inode, struct file *file)
 974 {
 975         file->private_data = inode->i_private;
 976         return 0;
 977 }
 978
 979 static ssize_t rtl8366_read_debugfs_mibs(struct file *file,
 980                                          char __user *user_buf,
 981                                          size_t count, loff_t *ppos)
 982 {
 983         char buf[4096];
 984         int i, j, len = 0;
 985         struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
 986
 987         len += snprintf(buf + len, sizeof(buf) - len, "MIB Counters:\n");
 988         len += snprintf(buf + len, sizeof(buf) - len, "Counter"
 989                         "                            "
 990                         "Port 0 \t\t Port 1 \t\t Port 2 \t\t Port 3 \t\t "
 991                         "Port 4\n");
 992
 993         for (i = 0; i < 33; ++i) {
 994
 995                 len += snprintf(buf + len, sizeof(buf) - len, "%d:%s ",
 996                                 i, MIBCOUNTERS[i]);
 997                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
 998                         unsigned long long counter = 0;
 999
1000                         if (!rtl8366_get_mib_counter(smi, i, j, &counter))
1001                                 len += snprintf(buf + len, sizeof(buf) - len,
1002                                                 "[%llu]", counter);
1003                         else
1004                                 len += snprintf(buf + len, sizeof(buf) - len,
1005                                                 "[error]");
1006
1007                         if (j != RTL8366_NUM_PORTS - 1) {
1008                                 if (counter < 100000)
1009                                         len += snprintf(buf + len,
1010                                                         sizeof(buf) - len,
1011                                                         "\t");
1012
1013                                 len += snprintf(buf + len, sizeof(buf) - len,
1014                                                 "\t");
1015                         }
1016                 }
1017                 len += snprintf(buf + len, sizeof(buf) - len, "\n");
1018         }
1019
1020         len += snprintf(buf + len, sizeof(buf) - len, "\n");
1021
1022         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1023 }
1024
1025 static ssize_t rtl8366_read_debugfs_vlan(struct file *file,
1026                                          char __user *user_buf,
1027                                          size_t count, loff_t *ppos)
1028 {
1029         char buf[4096];
1030         int i, j, len = 0;
1031         struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
1032
1033         len += snprintf(buf + len, sizeof(buf) - len, "VLAN Member Config:\n");
1034         len += snprintf(buf + len, sizeof(buf) - len,
1035                         "\t id \t vid \t prio \t member \t untag  \t fid "
1036                         "\tports\n");
1037
1038         for (i = 0; i < RTL8366_NUM_VLANS; ++i) {
1039                 struct rtl8366s_vlanconfig vlanMC;
1040                 memset(&vlanMC, '\0', sizeof(struct rtl8366s_vlanconfig));
1041                 rtl8366s_get_vlan_member_config(smi, i, &vlanMC);
1042
1043                 len += snprintf(buf + len, sizeof(buf) - len,
1044                                 "\t[%d] \t %d \t %d \t 0x%04x \t 0x%04x \t %d "
1045                                 "\t", i, vlanMC.vid, vlanMC.priority,
1046                                 vlanMC.member, vlanMC.untag, vlanMC.fid);
1047
1048                 for (j = 0; j < RTL8366_NUM_PORTS; ++j) {
1049                         int index = 0;
1050                         if (!rtl8366_get_port_vlan_index(smi, j, &index)) {
1051                                 if (index == i)
1052                                         len += snprintf(buf + len,
1053                                                         sizeof(buf) - len,
1054                                                         "%d", j);
1055                         }
1056                 }
1057                 len += snprintf(buf + len, sizeof(buf) - len, "\n");
1058         }
1059
1060         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1061 }
1062
1063 static ssize_t rtl8366_read_debugfs_reg(struct file *file,
1064                                         char __user *user_buf,
1065                                         size_t count, loff_t *ppos)
1066 {
1067         u32 t, reg = g_dbg_reg;
1068         int err, len = 0;
1069         char buf[512];
1070         struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
1071
1072         memset(buf, '\0', sizeof(buf));
1073
1074         err = rtl8366_smi_read_reg(smi, reg, &t);
1075         if (err) {
1076                 len += snprintf(buf, sizeof(buf),
1077                                 "Read failed (reg: 0x%04x)\n", reg);
1078                 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1079         }
1080
1081         len += snprintf(buf, sizeof(buf), "reg = 0x%04x, val = 0x%04x\n",
1082                         reg, t);
1083
1084         return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1085 }
1086
1087 static ssize_t rtl8366_write_debugfs_reg(struct file *file,
1088                                          const char __user *user_buf,
1089                                          size_t count, loff_t *ppos)
1090 {
1091         unsigned long data;
1092         u32 reg = g_dbg_reg;
1093         int err;
1094         char buf[50];
1095         size_t len;
1096         struct rtl8366_smi *smi = (struct rtl8366_smi *)file->private_data;
1097
1098         len = min(count, sizeof(buf) - 1);
1099         if (copy_from_user(buf, user_buf, len)) {
1100                 dev_err(&smi->pdev->dev, "copy from user failed\n");
1101                 return -EFAULT;
1102         }
1103
1104         buf[len] = '\0';
1105         if (len > 0 && buf[len - 1] == '\n')
1106                 buf[len - 1] = '\0';
1107
1108
1109         if (strict_strtoul(buf, 16, &data)) {
1110                 dev_err(&smi->pdev->dev, "Invalid reg value %s\n", buf);
1111         } else {
1112                 err = rtl8366_smi_write_reg(smi, reg, data);
1113                 if (err) {
1114                         dev_err(&smi->pdev->dev,
1115                                 "writing reg 0x%04x val 0x%04lx failed\n",
1116                                 reg, data);
1117                 }
1118         }
1119
1120         return count;
1121 }
1122
1123 static const struct file_operations fops_rtl8366_regs = {
1124         .read = rtl8366_read_debugfs_reg,
1125         .write = rtl8366_write_debugfs_reg,
1126         .open = rtl8366_debugfs_open,
1127         .owner = THIS_MODULE
1128 };
1129
1130 static const struct file_operations fops_rtl8366_vlan = {
1131         .read = rtl8366_read_debugfs_vlan,
1132         .open = rtl8366_debugfs_open,
1133         .owner = THIS_MODULE
1134 };
1135
1136 static const struct file_operations fops_rtl8366_mibs = {
1137         .read = rtl8366_read_debugfs_mibs,
1138         .open = rtl8366_debugfs_open,
1139         .owner = THIS_MODULE
1140 };
1141
1142 static void rtl8366_debugfs_init(struct rtl8366_smi *smi)
1143 {
1144         struct dentry *node;
1145         struct dentry *root;
1146
1147         if (!smi->debugfs_root)
1148                 smi->debugfs_root = debugfs_create_dir("rtl8366s", NULL);
1149
1150         if (!smi->debugfs_root) {
1151                 dev_err(&smi->pdev->dev, "Unable to create debugfs dir\n");
1152                 return;
1153         }
1154         root = smi->debugfs_root;
1155
1156         node = debugfs_create_x16("reg", S_IRUGO | S_IWUSR, root, &g_dbg_reg);
1157         if (!node) {
1158                 dev_err(&smi->pdev->dev, "Creating debugfs file reg failed\n");
1159                 return;
1160         }
1161
1162         node = debugfs_create_file("val", S_IRUGO | S_IWUSR, root, smi,
1163                                    &fops_rtl8366_regs);
1164         if (!node) {
1165                 dev_err(&smi->pdev->dev, "Creating debugfs file val failed\n");
1166                 return;
1167         }
1168
1169         node = debugfs_create_file("vlan", S_IRUSR, root, smi,
1170                                    &fops_rtl8366_vlan);
1171         if (!node) {
1172                 dev_err(&smi->pdev->dev, "Creating debugfs file vlan "
1173                         "failed\n");
1174                 return;
1175         }
1176
1177         node = debugfs_create_file("mibs", S_IRUSR, root, smi,
1178                                    &fops_rtl8366_mibs);
1179         if (!node) {
1180                 dev_err(&smi->pdev->dev, "Creating debugfs file mibs "
1181                         "xfailed\n");
1182                 return;
1183         }
1184 }
1185
1186 static void rtl8366_debugfs_remove(struct rtl8366_smi *smi)
1187 {
1188         if (smi->debugfs_root) {
1189                 debugfs_remove_recursive(smi->debugfs_root);
1190                 smi->debugfs_root = NULL;
1191         }
1192 }
1193
1194 #else
1195 static inline void rtl8366_debugfs_init(struct rtl8366_smi *smi) {}
1196 static inline void rtl8366_debugfs_remove(struct rtl8366_smi *smi) {}
1197 #endif
1198
1199 static int rtl8366_global_reset_mibs(struct switch_dev *dev,
1200                                      const struct switch_attr *attr,
1201                                      struct switch_val *val)
1202 {
1203         u32 data = 0;
1204         struct rtl8366_smi *smi = to_rtl8366(dev);
1205
1206         if (val->value.i == 1) {
1207                 rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
1208                 data |= (1 << 2);
1209                 rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
1210         }
1211
1212         return 0;
1213 }
1214
1215 static int rtl8366_get_vlan(struct switch_dev *dev,
1216                             const struct switch_attr *attr,
1217                             struct switch_val *val)
1218 {
1219         u32 data;
1220         struct rtl8366_smi *smi = to_rtl8366(dev);
1221
1222         if (attr->ofs == 1) {
1223                 rtl8366_smi_read_reg(smi, RTL8366_CHIP_GLOBAL_CTRL_REG, &data);
1224
1225                 if (data & RTL8366_CHIP_CTRL_VLAN)
1226                         val->value.i = 1;
1227                 else
1228                         val->value.i = 0;
1229         } else if (attr->ofs == 2) {
1230                 rtl8366_smi_read_reg(smi, RTL8366S_VLAN_TB_CTRL_REG, &data);
1231
1232                 if (data & 0x0001)
1233                         val->value.i = 1;
1234                 else
1235                         val->value.i = 0;
1236         }
1237
1238         return 0;
1239 }
1240
1241 static int rtl8366_global_get_blinkrate(struct switch_dev *dev,
1242                                         const struct switch_attr *attr,
1243                                         struct switch_val *val)
1244 {
1245         u32 data;
1246         struct rtl8366_smi *smi = to_rtl8366(dev);
1247         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1248
1249         val->value.i = (data & (RTL8366_LED_BLINKRATE_MASK));
1250
1251         return 0;
1252 }
1253
1254 static int rtl8366_global_set_blinkrate(struct switch_dev *dev,
1255                                         const struct switch_attr *attr,
1256                                         struct switch_val *val)
1257 {
1258         u32 data;
1259         struct rtl8366_smi *smi = to_rtl8366(dev);
1260
1261         if (val->value.i >= 6)
1262                 return -EINVAL;
1263
1264         rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1265
1266         data &= ~(data & RTL8366_LED_BLINKRATE_MASK);
1267         data |= val->value.i;
1268
1269         rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1270
1271         return 0;
1272 }
1273
1274 static int rtl8366_set_vlan(struct switch_dev *dev,
1275                             const struct switch_attr *attr,
1276                             struct switch_val *val)
1277 {
1278         struct rtl8366_smi *smi = to_rtl8366(dev);
1279
1280         if (attr->ofs == 1)
1281                 return rtl8366_vlan_set_vlan(smi, val->value.i);
1282         else
1283                 return rtl8366_vlan_set_4ktable(smi, val->value.i);
1284 }
1285
1286 static int rtl8366_init_vlan(struct switch_dev *dev,
1287                              const struct switch_attr *attr,
1288                              struct switch_val *val)
1289 {
1290         struct rtl8366_smi *smi = to_rtl8366(dev);
1291         return rtl8366s_reset_vlan(smi);
1292 }
1293
1294 static int rtl8366_attr_get_port_link(struct switch_dev *dev,
1295                                       const struct switch_attr *attr,
1296                                       struct switch_val *val)
1297 {
1298         char buf[1024];
1299         u32 len = 0, data = 0;
1300         int speed, duplex, link, txpause, rxpause, nway;
1301         struct rtl8366_smi *smi = to_rtl8366(dev);
1302
1303         if (val->port_vlan >= RTL8366_NUM_PORTS)
1304                 return -EINVAL;
1305
1306         memset(buf, '\0', sizeof(buf));
1307         rtl8366_smi_read_reg(smi, RTL8366S_PORT_LINK_STATUS_BASE +
1308                              (val->port_vlan >> 1),
1309                              &data);
1310
1311         if (val->port_vlan & 0x1)
1312                 data = data >> 8;
1313
1314         speed = (data & RTL8366S_PORT_STATUS_SPEED_MASK);
1315         duplex = (data & RTL8366S_PORT_STATUS_DUPLEX_MASK) >> 2;
1316         link = (data & RTL8366S_PORT_STATUS_LINK_MASK) >> 4;
1317         txpause = (data & RTL8366S_PORT_STATUS_TXPAUSE_MASK) >> 5;
1318         rxpause = (data & RTL8366S_PORT_STATUS_RXPAUSE_MASK) >> 6;
1319         nway = (data & RTL8366S_PORT_STATUS_AN_MASK) >> 7;
1320
1321         len += snprintf(buf + len, sizeof(buf) - len, "Port %d: ",
1322                         val->port_vlan);
1323
1324         if (link)
1325                 len += snprintf(buf + len, sizeof(buf) - len,
1326                                 "Link UP, Speed: ");
1327         else
1328                 len += snprintf(buf + len, sizeof(buf) - len,
1329                                 "Link DOWN, Speed: ");
1330
1331         if (speed == 0)
1332                 len += snprintf(buf + len, sizeof(buf) - len, "10Base-TX ");
1333         else if (speed == 1)
1334                 len += snprintf(buf + len, sizeof(buf) - len, "100Base-TX ");
1335         else if (speed == 2)
1336                 len += snprintf(buf + len, sizeof(buf) - len, "1000Base-TX ");
1337
1338         if (duplex)
1339                 len += snprintf(buf + len, sizeof(buf) - len, "Full-Duplex, ");
1340         else
1341                 len += snprintf(buf + len, sizeof(buf) - len, "Half-Duplex, ");
1342
1343         if (txpause)
1344                 len += snprintf(buf + len, sizeof(buf) - len, "TX-Pause ");
1345         if (rxpause)
1346                 len += snprintf(buf + len, sizeof(buf) - len, "RX-Pause ");
1347         if (nway)
1348                 len += snprintf(buf + len, sizeof(buf) - len, "nway ");
1349
1350         val->value.s = buf;
1351         val->len = len;
1352
1353         return 0;
1354 }
1355
1356 static int rtl8366_attr_get_vlan_info(struct switch_dev *dev,
1357                                       const struct switch_attr *attr,
1358                                       struct switch_val *val)
1359 {
1360         int i;
1361         char buf[1024];
1362         u32 len = 0;
1363         struct rtl8366s_vlanconfig vlanMC;
1364         struct rtl8366s_vlan4kentry vlan4K;
1365         struct rtl8366_smi *smi = to_rtl8366(dev);
1366
1367         if (val->port_vlan >= RTL8366_NUM_PORTS)
1368                 return -EINVAL;
1369
1370         memset(buf, '\0', sizeof(buf));
1371         memset(&vlanMC, '\0', sizeof(struct rtl8366s_vlanconfig));
1372         memset(&vlan4K, '\0', sizeof(struct rtl8366s_vlan4kentry));
1373
1374         rtl8366s_get_vlan_member_config(smi, val->port_vlan, &vlanMC);
1375         vlan4K.vid = vlanMC.vid;
1376         rtl8366s_get_vlan_4k_entry(smi, &vlan4K);
1377
1378         len += snprintf(buf + len, sizeof(buf) - len, "VLAN %d: Ports: ",
1379                         val->port_vlan);
1380
1381         for (i = 0; i < RTL8366_NUM_PORTS; ++i) {
1382                 int index = 0;
1383                 if (!rtl8366_get_port_vlan_index(smi, i, &index) &&
1384                     index == val->port_vlan)
1385                         len += snprintf(buf + len, sizeof(buf) - len, "%d", i);
1386         }
1387         len += snprintf(buf + len, sizeof(buf) - len, "\n");
1388
1389         len += snprintf(buf + len, sizeof(buf) - len,
1390                         "\t\t vid \t prio \t member \t untag \t fid\n");
1391         len += snprintf(buf + len, sizeof(buf) - len, "\tMC:\t");
1392         len += snprintf(buf + len, sizeof(buf) - len,
1393                         "%d \t %d \t 0x%04x \t 0x%04x \t %d\n",
1394                         vlanMC.vid, vlanMC.priority, vlanMC.member,
1395                         vlanMC.untag, vlanMC.fid);
1396         len += snprintf(buf + len, sizeof(buf) - len, "\t4K:\t");
1397         len += snprintf(buf + len, sizeof(buf) - len,
1398                         "%d \t  \t 0x%04x \t 0x%04x \t %d",
1399                         vlan4K.vid, vlan4K.member, vlan4K.untag, vlan4K.fid);
1400
1401         val->value.s = buf;
1402         val->len = len;
1403
1404         return 0;
1405 }
1406
1407 static int rtl8366_set_port_led(struct switch_dev *dev,
1408                                 const struct switch_attr *attr,
1409                                 struct switch_val *val)
1410 {
1411         u32 data = 0;
1412         struct rtl8366_smi *smi = to_rtl8366(dev);
1413         if (val->port_vlan >= RTL8366_NUM_PORTS ||
1414             (1 << val->port_vlan) == RTL8366_PORT_UNKNOWN)
1415                 return -EINVAL;
1416
1417         if (val->port_vlan == RTL8366_PORT_NUM_CPU) {
1418                 rtl8366_smi_read_reg(smi, RTL8366_LED_BLINKRATE_REG, &data);
1419                 data = (data & (~(0xF << 4))) | (val->value.i << 4);
1420                 rtl8366_smi_write_reg(smi, RTL8366_LED_BLINKRATE_REG, data);
1421         } else {
1422                 rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1423                 data = (data & (~(0xF << (val->port_vlan * 4)))) |
1424                         (val->value.i << (val->port_vlan * 4));
1425                 rtl8366_smi_write_reg(smi, RTL8366_LED_CTRL_REG, data);
1426         }
1427
1428         return 0;
1429 }
1430
1431 static int rtl8366_get_port_led(struct switch_dev *dev,
1432                                 const struct switch_attr *attr,
1433                                 struct switch_val *val)
1434 {
1435         u32 data = 0;
1436         struct rtl8366_smi *smi = to_rtl8366(dev);
1437         if (val->port_vlan >= RTL8366_NUM_LEDGROUPS)
1438                 return -EINVAL;
1439
1440         rtl8366_smi_read_reg(smi, RTL8366_LED_CTRL_REG, &data);
1441         val->value.i = (data >> (val->port_vlan * 4)) & 0x000F;
1442
1443         return 0;
1444 }
1445
1446 static int rtl8366_reset_port_mibs(struct switch_dev *dev,
1447                                    const struct switch_attr *attr,
1448                                    struct switch_val *val)
1449 {
1450         u32 data = 0;
1451         struct rtl8366_smi *smi = to_rtl8366(dev);
1452         if (val->port_vlan >= RTL8366_NUM_PORTS)
1453                 return -EINVAL;
1454
1455         rtl8366_smi_read_reg(smi, RTL8366S_MIB_CTRL_REG, &data);
1456         data |= (1 << (val->port_vlan + 3));
1457         rtl8366_smi_write_reg(smi, RTL8366S_MIB_CTRL_REG, data);
1458
1459         return 0;
1460 }
1461
1462 static int rtl8366_get_port_mib(struct switch_dev *dev,
1463                                 const struct switch_attr *attr,
1464                                 struct switch_val *val)
1465 {
1466         char buf[2048];
1467         int i, len = 0;
1468         unsigned long long counter = 0;
1469         struct rtl8366_smi *smi = to_rtl8366(dev);
1470         if (val->port_vlan >= RTL8366_NUM_PORTS)
1471                 return -EINVAL;
1472
1473         len += snprintf(buf + len, sizeof(buf) - len, "Port %d MIB counters\n",
1474                         val->port_vlan);
1475         for (i = 0; i < RTL8366S_MIB_COUNT; ++i) {
1476
1477                 len += snprintf(buf + len, sizeof(buf) - len,
1478                                 "%d:%s\t", i, MIBCOUNTERS[i]);
1479                 if (!rtl8366_get_mib_counter(smi, i, val->port_vlan, &counter))
1480                         len += snprintf(buf + len, sizeof(buf) - len,
1481                                         "[%llu]\n", counter);
1482                 else
1483                         len += snprintf(buf + len, sizeof(buf) - len,
1484                                         "[error]\n");
1485         }
1486
1487         val->value.s = buf;
1488         val->len = len;
1489         return 0;
1490 }
1491
1492 static int rtl8366_set_member(struct switch_dev *dev,
1493                               const struct switch_attr *attr,
1494                               struct switch_val *val)
1495 {
1496         struct rtl8366s_vlanconfig vlanMC;
1497         struct rtl8366s_vlan4kentry vlan4K;
1498         struct rtl8366_smi *smi = to_rtl8366(dev);
1499         memset(&vlanMC, '\0', sizeof(struct rtl8366s_vlanconfig));
1500         memset(&vlan4K, '\0', sizeof(struct rtl8366s_vlan4kentry));
1501
1502         if (val->port_vlan >= RTL8366_NUM_VLANS)
1503                 return -EINVAL;
1504
1505         rtl8366s_get_vlan_member_config(smi, val->port_vlan, &vlanMC);
1506
1507         vlan4K.vid = vlanMC.vid;
1508         rtl8366s_get_vlan_4k_entry(smi, &vlan4K);
1509
1510         vlan4K.member = vlanMC.member = val->value.i;
1511         rtl8366s_set_vlan_member_config(smi, val->port_vlan, &vlanMC);
1512         rtl8366s_set_vlan_4k_entry(smi, &vlan4K);
1513
1514         return 0;
1515 }
1516
1517 static int rtl8366_get_member(struct switch_dev *dev,
1518                               const struct switch_attr *attr,
1519                               struct switch_val *val)
1520 {
1521         struct rtl8366s_vlanconfig vlanMC;
1522         struct rtl8366s_vlan4kentry vlan4K;
1523         struct rtl8366_smi *smi = to_rtl8366(dev);
1524         memset(&vlanMC, '\0', sizeof(struct rtl8366s_vlanconfig));
1525         memset(&vlan4K, '\0', sizeof(struct rtl8366s_vlan4kentry));
1526
1527         if (val->port_vlan >= RTL8366_NUM_VLANS)
1528                 return -EINVAL;
1529
1530         rtl8366s_get_vlan_member_config(smi, val->port_vlan, &vlanMC);
1531
1532         vlan4K.vid = vlanMC.vid;
1533         rtl8366s_get_vlan_4k_entry(smi, &vlan4K);
1534
1535         val->value.i = vlanMC.member;
1536
1537         return 0;
1538 }
1539
1540 static int rtl8366_set_untag(struct switch_dev *dev,
1541                              const struct switch_attr *attr,
1542                              struct switch_val *val)
1543 {
1544         struct rtl8366s_vlanconfig vlanMC;
1545         struct rtl8366s_vlan4kentry vlan4K;
1546         struct rtl8366_smi *smi = to_rtl8366(dev);
1547         memset(&vlanMC, '\0', sizeof(struct rtl8366s_vlanconfig));
1548         memset(&vlan4K, '\0', sizeof(struct rtl8366s_vlan4kentry));
1549
1550         if (val->port_vlan >= RTL8366_NUM_VLANS)
1551                 return -EINVAL;
1552
1553         rtl8366s_get_vlan_member_config(smi, val->port_vlan, &vlanMC);
1554
1555         vlan4K.vid = vlanMC.vid;
1556         rtl8366s_get_vlan_4k_entry(smi, &vlan4K);
1557
1558         vlan4K.untag = vlanMC.untag = val->value.i;
1559         rtl8366s_set_vlan_member_config(smi, val->port_vlan, &vlanMC);
1560         rtl8366s_set_vlan_4k_entry(smi, &vlan4K);
1561
1562         return 0;
1563 }
1564
1565 static int rtl8366_get_untag(struct switch_dev *dev,
1566                              const struct switch_attr *attr,
1567                              struct switch_val *val)
1568 {
1569         struct rtl8366s_vlanconfig vlanMC;
1570         struct rtl8366s_vlan4kentry vlan4K;
1571         struct rtl8366_smi *smi = to_rtl8366(dev);
1572         memset(&vlanMC, '\0', sizeof(struct rtl8366s_vlanconfig));
1573         memset(&vlan4K, '\0', sizeof(struct rtl8366s_vlan4kentry));
1574
1575         if (val->port_vlan >= RTL8366_NUM_VLANS)
1576                 return -EINVAL;
1577
1578         rtl8366s_get_vlan_member_config(smi, val->port_vlan, &vlanMC);
1579         vlan4K.vid = vlanMC.vid;
1580         rtl8366s_get_vlan_4k_entry(smi, &vlan4K);
1581
1582
1583         val->value.i = vlanMC.untag;
1584
1585         return 0;
1586 }
1587
1588 static int rtl8366_get_port_pvid(struct switch_dev *dev, int port, int *val)
1589 {
1590         struct rtl8366_smi *smi = to_rtl8366(dev);
1591         return rtl8366_get_vlan_port_pvid(smi, port, val);
1592 }
1593
1594 static int rtl8366_set_port_pvid(struct switch_dev *dev, int port, int val)
1595 {
1596         struct rtl8366_smi *smi = to_rtl8366(dev);
1597         return rtl8366_set_vlan_port_pvid(smi, port, val);
1598 }
1599
1600 static int rtl8366_reset_switch(struct switch_dev *dev)
1601 {
1602         struct rtl8366_smi *smi = to_rtl8366(dev);
1603         rtl8366_smi_write_reg(smi, RTL8366_RESET_CTRL_REG,
1604                               RTL8366_CHIP_CTRL_RESET_HW);
1605         return 0;
1606 }
1607
1608 static struct switch_attr rtl8366_globals[] = {
1609         {
1610                 .type = SWITCH_TYPE_INT,
1611                 .name = "enable_vlan",
1612                 .description = "Enable VLAN mode",
1613                 .set = rtl8366_set_vlan,
1614                 .get = rtl8366_get_vlan,
1615                 .max = 1,
1616                 .ofs = 1
1617         },
1618         {
1619                 .type = SWITCH_TYPE_INT,
1620                 .name = "enable_vlan4k",
1621                 .description = "Enable VLAN 4K mode",
1622                 .set = rtl8366_set_vlan,
1623                 .get = rtl8366_get_vlan,
1624                 .max = 1,
1625                 .ofs = 2
1626         },
1627         {
1628                 .type = SWITCH_TYPE_INT,
1629                 .name = "init_vlan",
1630                 .description = "Initialize VLAN tables to defaults",
1631                 .set = rtl8366_init_vlan,
1632                 .get = NULL,
1633                 .max = 1
1634         },
1635
1636         {
1637                 .type = SWITCH_TYPE_INT,
1638                 .name = "reset_mibs",
1639                 .description = "Reset all MIB counters",
1640                 .set = rtl8366_global_reset_mibs,
1641                 .get = NULL,
1642                 .max = 1
1643         },
1644         {
1645                 .type = SWITCH_TYPE_INT,
1646                 .name = "blinkrate",
1647                 .description = "Get/Set LED blinking rate (0 = 43ms, 1 = 84ms,"
1648                 " 2 = 120ms, 3 = 170ms, 4 = 340ms, 5 = 670ms)",
1649                 .set = rtl8366_global_set_blinkrate,
1650                 .get = rtl8366_global_get_blinkrate,
1651                 .max = 5
1652         },
1653 };
1654
1655 static struct switch_attr rtl8366_port[] = {
1656         {
1657                 .type = SWITCH_TYPE_STRING,
1658                 .name = "link",
1659                 .description = "Get port link information",
1660                 .max = 1,
1661                 .set = NULL,
1662                 .get = rtl8366_attr_get_port_link
1663         },
1664         {
1665                 .type = SWITCH_TYPE_INT,
1666                 .name = "reset_mib",
1667                 .description = "Reset single port MIB counters",
1668                 .max = 1,
1669                 .set = rtl8366_reset_port_mibs,
1670                 .get = NULL
1671         },
1672         {
1673                 .type = SWITCH_TYPE_STRING,
1674                 .name = "mib",
1675                 .description = "Get MIB counters for port",
1676                 .max = 33,
1677                 .set = NULL,
1678                 .get = rtl8366_get_port_mib
1679         },
1680         {
1681                 .type = SWITCH_TYPE_INT,
1682                 .name = "led",
1683                 .description = "Get/Set port group (0 - 3) led mode (0 - 15)",
1684                 .max = 15,
1685                 .set = rtl8366_set_port_led,
1686                 .get = rtl8366_get_port_led
1687         },
1688 };
1689
1690 static struct switch_attr rtl8366_vlan[] = {
1691         {
1692                 .type = SWITCH_TYPE_INT,
1693                 .name = "untag",
1694                 .description = "Get/Set VLAN untag port set (bitmask)",
1695                 .set = rtl8366_set_untag,
1696                 .get = rtl8366_get_untag,
1697                 .max = 63,
1698         },
1699         {
1700                 .type = SWITCH_TYPE_INT,
1701                 .name = "member",
1702                 .description = "Get/Set VLAN member port set (bitmask)",
1703                 .set = rtl8366_set_member,
1704                 .get = rtl8366_get_member,
1705                 .max = 63,
1706         },
1707         {
1708                 .type = SWITCH_TYPE_STRING,
1709                 .name = "info",
1710                 .description = "Get vlan information",
1711                 .max = 1,
1712                 .set = NULL,
1713                 .get = rtl8366_attr_get_vlan_info
1714         },
1715 };
1716
1717
1718 /* template */
1719 static struct switch_dev rtldev = {
1720         .name = "RTL8366S",
1721         .cpu_port = RTL8366_PORT_NUM_CPU,
1722         .ports = RTL8366_NUM_PORTS,
1723         .vlans = RTL8366_NUM_VLANS,
1724         .attr_global = {
1725                 .attr = rtl8366_globals,
1726                 .n_attr = ARRAY_SIZE(rtl8366_globals),
1727         },
1728         .attr_port = {
1729                 .attr = rtl8366_port,
1730                 .n_attr = ARRAY_SIZE(rtl8366_port),
1731         },
1732         .attr_vlan = {
1733                 .attr = rtl8366_vlan,
1734                 .n_attr = ARRAY_SIZE(rtl8366_vlan),
1735         },
1736
1737         .get_port_pvid = rtl8366_get_port_pvid,
1738         .set_port_pvid = rtl8366_set_port_pvid,
1739         .reset_switch = rtl8366_reset_switch,
1740 };
1741
1742 static int rtl8366_smi_mii_read(struct mii_bus *bus, int addr, int reg)
1743 {
1744         struct rtl8366_smi *smi = bus->priv;
1745         u32 val = 0;
1746         int err;
1747
1748         err = rtl8366_smi_read_phy_reg(smi, addr, 0, reg, &val);
1749         if (err)
1750                 return 0xffff;
1751
1752         return val;
1753 }
1754
1755 static int rtl8366_smi_mii_write(struct mii_bus *bus, int addr, int reg,
1756                                      u16 val)
1757 {
1758         struct rtl8366_smi *smi = bus->priv;
1759         u32 t;
1760         int err;
1761
1762         err = rtl8366_smi_write_phy_reg(smi, addr, 0, reg, val);
1763         /* flush write */
1764         (void) rtl8366_smi_read_phy_reg(smi, addr, 0, reg, &t);
1765
1766         return err;
1767 }
1768
1769 static int rtl8366_smi_mii_init(struct rtl8366_smi *smi)
1770 {
1771         int ret;
1772         int i;
1773
1774         smi->mii_bus = mdiobus_alloc();
1775         if (smi->mii_bus == NULL) {
1776                 ret = -ENOMEM;
1777                 goto err;
1778         }
1779
1780         spin_lock_init(&smi->lock);
1781         smi->mii_bus->priv = (void *) smi;
1782         smi->mii_bus->name = "rtl8366-smi";
1783         smi->mii_bus->read = rtl8366_smi_mii_read;
1784         smi->mii_bus->write = rtl8366_smi_mii_write;
1785         snprintf(smi->mii_bus->id, MII_BUS_ID_SIZE, "%s",
1786                         dev_name(&smi->pdev->dev));
1787         smi->mii_bus->parent = &smi->pdev->dev;
1788         smi->mii_bus->phy_mask = ~(0x1f);
1789         smi->mii_bus->irq = smi->mii_irq;
1790         for (i = 0; i < PHY_MAX_ADDR; i++)
1791                 smi->mii_irq[i] = PHY_POLL;
1792
1793         ret = mdiobus_register(smi->mii_bus);
1794         if (ret)
1795                 goto err_free;
1796
1797         return 0;
1798
1799  err_free:
1800         mdiobus_free(smi->mii_bus);
1801  err:
1802         return ret;
1803 }
1804
1805 static void rtl8366_smi_mii_cleanup(struct rtl8366_smi *smi)
1806 {
1807         mdiobus_unregister(smi->mii_bus);
1808         mdiobus_free(smi->mii_bus);
1809 }
1810
1811 static int rtl8366_smi_setup(struct rtl8366_smi *smi)
1812 {
1813         u32 chip_id = 0;
1814         u32 chip_ver = 0;
1815         int ret;
1816
1817         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_ID_REG, &chip_id);
1818         if (ret) {
1819                 dev_err(&smi->pdev->dev, "unable to read chip id\n");
1820                 return ret;
1821         }
1822
1823         switch (chip_id) {
1824         case RTL8366S_CHIP_ID_8366:
1825                 break;
1826         default:
1827                 dev_err(&smi->pdev->dev, "unknown chip id (%04x)\n", chip_id);
1828                 return -ENODEV;
1829         }
1830
1831         ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_VERSION_CTRL_REG,
1832                                    &chip_ver);
1833         if (ret) {
1834                 dev_err(&smi->pdev->dev, "unable to read chip version\n");
1835                 return ret;
1836         }
1837
1838         dev_info(&smi->pdev->dev, "RTL%04x ver. %u chip found\n",
1839                  chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK);
1840
1841         rtl8366_debugfs_init(smi);
1842
1843         return 0;
1844 }
1845
1846 static int __init rtl8366_smi_probe(struct platform_device *pdev)
1847 {
1848         static int rtl8366_smi_version_printed;
1849         struct rtl8366_smi_platform_data *pdata;
1850         struct rtl8366_smi *smi;
1851         int err;
1852
1853         if (!rtl8366_smi_version_printed++)
1854                 printk(KERN_NOTICE RTL8366_SMI_DRIVER_DESC
1855                        " version " RTL8366_SMI_DRIVER_VER"\n");
1856
1857         pdata = pdev->dev.platform_data;
1858         if (!pdata) {
1859                 dev_err(&pdev->dev, "no platform data specified\n");
1860                 err = -EINVAL;
1861                 goto err_out;
1862         }
1863
1864         smi = kzalloc(sizeof(struct rtl8366_smi), GFP_KERNEL);
1865         if (!smi) {
1866                 dev_err(&pdev->dev, "no memory for private data\n");
1867                 err = -ENOMEM;
1868                 goto err_out;
1869         }
1870
1871         err = gpio_request(pdata->gpio_sda, dev_name(&pdev->dev));
1872         if (err) {
1873                 dev_err(&pdev->dev, "gpio_request failed for %u, err=%d\n",
1874                         pdata->gpio_sda, err);
1875                 goto err_free_smi;
1876         }
1877
1878         err = gpio_request(pdata->gpio_sck, dev_name(&pdev->dev));
1879         if (err) {
1880                 dev_err(&pdev->dev, "gpio_request failed for %u, err=%d\n",
1881                         pdata->gpio_sck, err);
1882                 goto err_free_sda;
1883         }
1884
1885         smi->pdev = pdev;
1886         smi->pdata = pdata;
1887         spin_lock_init(&smi->lock);
1888
1889         platform_set_drvdata(pdev, smi);
1890
1891         dev_info(&pdev->dev, "using GPIO pins %u (SDA) and %u (SCK)\n",
1892                  pdata->gpio_sda, pdata->gpio_sck);
1893
1894         err = rtl8366_smi_setup(smi);
1895         if (err)
1896                 goto err_clear_drvdata;
1897
1898         err = rtl8366_smi_mii_init(smi);
1899         if (err)
1900                 goto err_clear_drvdata;
1901
1902         return 0;
1903
1904  err_clear_drvdata:
1905         platform_set_drvdata(pdev, NULL);
1906         gpio_free(pdata->gpio_sck);
1907  err_free_sda:
1908         gpio_free(pdata->gpio_sda);
1909  err_free_smi:
1910         kfree(smi);
1911  err_out:
1912         return err;
1913 }
1914
1915 int rtl8366_phy_config_init(struct phy_device *phydev)
1916 {
1917         int err;
1918         struct net_device *netdev = phydev->attached_dev;
1919         struct rtl8366_smi *smi = phydev->bus->priv;
1920         struct switch_dev *dev = &smi->dev;
1921
1922         /* Only init the switch for the primary PHY */
1923         if (phydev->addr != 4) {
1924                 printk(KERN_INFO "Discarding address: %d\n", phydev->addr);
1925                 return 0;
1926         }
1927
1928         memcpy(&smi->dev, &rtldev, sizeof(struct switch_dev));
1929         dev->priv = smi;
1930         dev->netdev = netdev;
1931
1932         err = register_switch(dev, netdev);
1933         if (err < 0) {
1934                 printk(KERN_INFO "Switch registration failed\n");
1935                 return err;
1936         }
1937
1938         return 0;
1939 }
1940
1941 int rtl8366_phy_config_aneg(struct phy_device *phydev)
1942 {
1943         return 0;
1944 }
1945
1946 static struct phy_driver rtl8366_smi_phy_driver = {
1947         .phy_id         = 0x001cc960,
1948         .name           = "Realtek RTL8366",
1949         .phy_id_mask    = 0x1ffffff0,
1950         .features       = PHY_GBIT_FEATURES,
1951         .config_aneg    = rtl8366_phy_config_aneg,
1952         .config_init    = rtl8366_phy_config_init,
1953         .read_status    = genphy_read_status,
1954         .driver         = {
1955                 .owner = THIS_MODULE,
1956         },
1957 };
1958
1959 static int __devexit rtl8366_smi_remove(struct platform_device *pdev)
1960 {
1961         struct rtl8366_smi *smi = platform_get_drvdata(pdev);
1962
1963         if (smi) {
1964                 struct rtl8366_smi_platform_data *pdata;
1965
1966                 pdata = pdev->dev.platform_data;
1967
1968                 rtl8366_debugfs_remove(smi);
1969                 phy_driver_unregister(&rtl8366_smi_phy_driver);
1970                 rtl8366_smi_mii_cleanup(smi);
1971                 platform_set_drvdata(pdev, NULL);
1972                 gpio_free(pdata->gpio_sck);
1973                 gpio_free(pdata->gpio_sda);
1974                 kfree(smi);
1975         }
1976
1977         return 0;
1978 }
1979
1980 static struct platform_driver rtl8366_smi_driver = {
1981         .driver = {
1982                 .name           = RTL8366_SMI_DRIVER_NAME,
1983                 .owner          = THIS_MODULE,
1984         },
1985         .probe          = rtl8366_smi_probe,
1986         .remove         = __devexit_p(rtl8366_smi_remove),
1987 };
1988
1989 static int __init rtl8366_smi_init(void)
1990 {
1991         int ret;
1992         ret = platform_driver_register(&rtl8366_smi_driver);
1993         if (ret)
1994                 return ret;
1995
1996         ret = phy_driver_register(&rtl8366_smi_phy_driver);
1997         if (ret)
1998                 goto err_platform_unregister;
1999
2000         return 0;
2001
2002  err_platform_unregister:
2003         platform_driver_unregister(&rtl8366_smi_driver);
2004         return ret;
2005 }
2006 module_init(rtl8366_smi_init);
2007
2008 static void __exit rtl8366_smi_exit(void)
2009 {
2010         phy_driver_unregister(&rtl8366_smi_phy_driver);
2011         platform_driver_unregister(&rtl8366_smi_driver);
2012 }
2013 module_exit(rtl8366_smi_exit);
2014
2015 MODULE_DESCRIPTION(RTL8366_SMI_DRIVER_DESC);
2016 MODULE_VERSION(RTL8366_SMI_DRIVER_VER);
2017 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
2018 MODULE_AUTHOR("Antti Seppälä <a.seppala@gmail.com>");
2019 MODULE_LICENSE("GPL v2");
2020 MODULE_ALIAS("platform:" RTL8366_SMI_DRIVER_NAME);