2 * Atheros AP94 reference board PCI initialization
4 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/pci.h>
12 #include <linux/delay.h>
14 #include <asm/mach-ath79/ar71xx_regs.h>
15 #include <asm/mach-ath79/ath79.h>
16 #include <asm/mach-ath79/pci.h>
23 static int ath9k_num_fixups;
24 static struct ath9k_fixup ath9k_fixups[2];
26 static void ath9k_pci_fixup(struct pci_dev *dev)
35 for (i = 0; i < ath9k_num_fixups; i++) {
36 if (ath9k_fixups[i].cal_data == NULL)
39 if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn))
42 cal_data = ath9k_fixups[i].cal_data;
49 if (*cal_data != 0xa55a) {
50 pr_err("pci %s: invalid calibration data\n", pci_name(dev));
54 pr_info("pci %s: fixup device configuration\n", pci_name(dev));
56 mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
58 pr_err("pci %s: ioremap error\n", pci_name(dev));
62 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
65 case ATH79_SOC_AR7161:
66 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
69 case ATH79_SOC_AR7240:
70 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff);
73 case ATH79_SOC_AR7241:
74 case ATH79_SOC_AR7242:
75 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff);
82 pci_read_config_word(dev, PCI_COMMAND, &cmd);
83 cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
84 pci_write_config_word(dev, PCI_COMMAND, cmd);
86 /* set pointer to first reg address */
88 while (*cal_data != 0xffff) {
92 val |= (*cal_data++) << 16;
94 __raw_writel(val, mem + reg);
98 pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
99 dev->vendor = val & 0xffff;
100 dev->device = (val >> 16) & 0xffff;
102 pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
103 dev->revision = val & 0xff;
104 dev->class = val >> 8; /* upper 3 bytes */
106 pci_read_config_word(dev, PCI_COMMAND, &cmd);
107 cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
108 pci_write_config_word(dev, PCI_COMMAND, cmd);
110 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
114 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
116 void __init pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data)
118 if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
121 ath9k_fixups[ath9k_num_fixups].slot = slot;
122 ath9k_fixups[ath9k_num_fixups].cal_data = cal_data;