2 * MikroTik RouterBOARD 92X support
4 * Copyright (C) 2015 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/version.h>
12 #include <linux/phy.h>
13 #include <linux/delay.h>
14 #include <linux/platform_device.h>
15 #include <linux/ath9k_platform.h>
16 #include <linux/mtd/mtd.h>
17 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
18 #include <linux/mtd/nand.h>
20 #include <linux/mtd/rawnand.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/flash.h>
25 #include <linux/routerboot.h>
26 #include <linux/gpio.h>
27 #include <linux/platform_data/phy-at803x.h>
28 #include <linux/version.h>
31 #include <asm/mach-ath79/ath79.h>
32 #include <asm/mach-ath79/ar71xx_regs.h>
35 #include "dev-gpio-buttons.h"
37 #include "dev-leds-gpio.h"
38 #include "dev-m25p80.h"
42 #include "machtypes.h"
44 #include "routerboot.h"
46 #define RB922_GPIO_LED_USR 12
47 #define RB922_GPIO_USB_POWER 13
48 #define RB922_GPIO_FAN_CTRL 14
49 #define RB922_GPIO_BTN_RESET 20
50 #define RB922_GPIO_NAND_NCE 23
52 #define RB92X_FLAG_USB BIT(0)
53 #define RB92X_FLAG_USB_POWER BIT(1)
54 #define RB92X_FLAG_PCIE BIT(2)
56 #define RB922_PHY_ADDR 4
58 #define RB922_KEYS_POLL_INTERVAL 20 /* msecs */
59 #define RB922_KEYS_DEBOUNCE_INTERVAL (3 * RB922_KEYS_POLL_INTERVAL)
61 #define RB_ROUTERBOOT_OFFSET 0x0000
62 #define RB_ROUTERBOOT_MIN_SIZE 0xb000
63 #define RB_HARD_CFG_SIZE 0x1000
64 #define RB_BIOS_OFFSET 0xd000
65 #define RB_BIOS_SIZE 0x1000
66 #define RB_SOFT_CFG_OFFSET 0xf000
67 #define RB_SOFT_CFG_SIZE 0x1000
69 struct rb_board_info {
74 static struct mtd_partition rb922gs_spi_partitions[] = {
77 .offset = RB_ROUTERBOOT_OFFSET,
78 .mask_flags = MTD_WRITEABLE,
80 .name = "hard_config",
81 .size = RB_HARD_CFG_SIZE,
82 .mask_flags = MTD_WRITEABLE,
85 .offset = RB_BIOS_OFFSET,
87 .mask_flags = MTD_WRITEABLE,
89 .name = "soft_config",
90 .size = RB_SOFT_CFG_SIZE,
94 static void __init rb922gs_init_partitions(const struct rb_info *info)
96 rb922gs_spi_partitions[0].size = info->hard_cfg_offs;
97 rb922gs_spi_partitions[1].offset = info->hard_cfg_offs;
98 rb922gs_spi_partitions[3].offset = info->soft_cfg_offs;
101 static struct mtd_partition rb922gs_nand_partitions[] = {
105 .size = (256 * 1024),
106 .mask_flags = MTD_WRITEABLE,
110 .offset = (256 * 1024),
111 .size = (4 * 1024 * 1024) - (256 * 1024),
115 .offset = MTDPART_OFS_NXTBLK,
116 .size = MTDPART_SIZ_FULL,
120 static struct flash_platform_data rb922gs_spi_flash_data = {
121 .parts = rb922gs_spi_partitions,
122 .nr_parts = ARRAY_SIZE(rb922gs_spi_partitions),
125 static struct gpio_led rb922gs_leds[] __initdata = {
127 .name = "rb:green:user",
128 .gpio = RB922_GPIO_LED_USR,
133 static struct gpio_keys_button rb922gs_gpio_keys[] __initdata = {
135 .desc = "Reset button",
138 .debounce_interval = RB922_KEYS_DEBOUNCE_INTERVAL,
139 .gpio = RB922_GPIO_BTN_RESET,
144 static struct at803x_platform_data rb922gs_at803x_data = {
145 .disable_smarteee = 1,
148 static struct mdio_board_info rb922gs_mdio0_info[] = {
150 .bus_id = "ag71xx-mdio.0",
151 .mdio_addr = RB922_PHY_ADDR,
152 .platform_data = &rb922gs_at803x_data,
158 static void rb922gs_nand_select_chip(int chip_no)
162 gpio_set_value(RB922_GPIO_NAND_NCE, 0);
165 gpio_set_value(RB922_GPIO_NAND_NCE, 1);
171 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
172 static struct nand_ecclayout rb922gs_nand_ecclayout = {
174 .eccpos = { 8, 9, 10, 13, 14, 15 },
176 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
181 static int rb922gs_ooblayout_ecc(struct mtd_info *mtd, int section,
182 struct mtd_oob_region *oobregion)
186 oobregion->offset = 8;
187 oobregion->length = 3;
190 oobregion->offset = 13;
191 oobregion->length = 3;
198 static int rb922gs_ooblayout_free(struct mtd_info *mtd, int section,
199 struct mtd_oob_region *oobregion)
203 oobregion->offset = 0;
204 oobregion->length = 4;
207 oobregion->offset = 4;
208 oobregion->length = 1;
211 oobregion->offset = 6;
212 oobregion->length = 2;
215 oobregion->offset = 11;
216 oobregion->length = 2;
223 static const struct mtd_ooblayout_ops rb922gs_nand_ecclayout_ops = {
224 .ecc = rb922gs_ooblayout_ecc,
225 .free = rb922gs_ooblayout_free,
229 static int rb922gs_nand_scan_fixup(struct mtd_info *mtd)
231 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
232 struct nand_chip *chip = mtd->priv;
234 struct nand_chip *chip = mtd_to_nand(mtd);
237 if (mtd->writesize == 512) {
239 * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot
240 * will not be able to find the kernel that we load.
242 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
243 chip->ecc.layout = &rb922gs_nand_ecclayout;
245 mtd_set_ooblayout(mtd, &rb922gs_nand_ecclayout_ops);
249 chip->options = NAND_NO_SUBPAGE_WRITE;
254 static void __init rb922gs_nand_init(void)
256 gpio_request_one(RB922_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE");
258 ath79_nfc_set_scan_fixup(rb922gs_nand_scan_fixup);
259 ath79_nfc_set_parts(rb922gs_nand_partitions,
260 ARRAY_SIZE(rb922gs_nand_partitions));
261 ath79_nfc_set_select_chip(rb922gs_nand_select_chip);
262 ath79_nfc_set_swap_dma(true);
263 ath79_register_nfc();
266 #define RB_BOARD_INFO(_name, _flags) \
272 static const struct rb_board_info rb92x_boards[] __initconst = {
273 RB_BOARD_INFO("921GS-5HPacD r2", RB92X_FLAG_PCIE),
274 RB_BOARD_INFO("922UAGS-5HPacD", RB92X_FLAG_USB | RB92X_FLAG_USB_POWER | RB92X_FLAG_PCIE),
277 static u32 rb92x_get_flags(const struct rb_info *info)
281 for (i = 0; i < ARRAY_SIZE(rb92x_boards); i++) {
282 const struct rb_board_info *bi;
284 bi = &rb92x_boards[i];
285 if (strcmp(info->board_name, bi->name) == 0)
292 static void __init rb922gs_setup(void)
294 const struct rb_info *info;
298 info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000);
302 scnprintf(buf, sizeof(buf), "MikroTik RouterBOARD %s",
303 (info->board_name) ? info->board_name : "");
304 mips_set_machine_name(buf);
306 rb922gs_init_partitions(info);
307 ath79_register_m25p80(&rb922gs_spi_flash_data);
311 ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
313 ath79_register_mdio(0, 0x0);
315 mdiobus_register_board_info(rb922gs_mdio0_info,
316 ARRAY_SIZE(rb922gs_mdio0_info));
318 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
319 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
320 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
321 ath79_eth0_data.phy_mask = BIT(RB922_PHY_ADDR);
322 if (strcmp(info->board_name, "921GS-5HPacD r2") == 0 ||
323 strcmp(info->board_name, "922UAGS-5HPacD") == 0)
325 ath79_eth0_pll_data.pll_10 = 0xa0001313;
326 ath79_eth0_pll_data.pll_100 = 0xa0000101;
327 ath79_eth0_pll_data.pll_1000 = 0x8f000000;
330 ath79_eth0_pll_data.pll_10 = 0x81001313;
331 ath79_eth0_pll_data.pll_100 = 0x81000101;
332 ath79_eth0_pll_data.pll_1000 = 0x8f000000;
335 ath79_register_eth(0);
337 flags = rb92x_get_flags(info);
339 if (flags & RB92X_FLAG_USB)
340 ath79_register_usb();
342 if (flags & RB92X_FLAG_USB_POWER)
343 gpio_request_one(RB922_GPIO_USB_POWER, GPIOF_OUT_INIT_LOW |
344 GPIOF_EXPORT_DIR_FIXED, "USB power");
346 if (flags & RB92X_FLAG_PCIE)
347 ath79_register_pci();
349 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb922gs_leds), rb922gs_leds);
350 ath79_register_gpio_keys_polled(-1, RB922_KEYS_POLL_INTERVAL,
351 ARRAY_SIZE(rb922gs_gpio_keys),
355 * This only supports the RB911G-5HPacD board for now. For other boards
356 * more devices must be registered based on the hardware options which
357 * can be found in the hardware configuration of RouterBOOT.
361 MIPS_MACHINE_NONAME(ATH79_MACH_RB_922GS, "922gs", rb922gs_setup);