2 * OMYlink OMY-X1 board support
4 * Copyright (C) 2016 L. D. Pinney <ldpinney@gmail.com>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/gpio.h>
12 #include <linux/platform_device.h>
14 #include <asm/mach-ath79/ath79.h>
15 #include <asm/mach-ath79/ar71xx_regs.h>
19 #include "dev-gpio-buttons.h"
20 #include "dev-leds-gpio.h"
21 #include "dev-m25p80.h"
23 #include "machtypes.h"
27 #define OMY_X1_GPIO_LED_POWER 19
28 #define OMY_X1_GPIO_LED_WAN 22
30 #define OMY_X1_GPIO_BTN_RESET 17
32 #define OMY_X1_KEYS_POLL_INTERVAL 20 /* msecs */
33 #define OMY_X1_KEYS_DEBOUNCE_INTERVAL (3 * OMY_X1_KEYS_POLL_INTERVAL)
35 static const char *omy_x1_part_probes[] = {
40 static struct flash_platform_data omy_x1_flash_data = {
41 .part_probes = omy_x1_part_probes,
44 static struct gpio_led omy_x1_leds_gpio[] __initdata = {
46 .name = "omy:green:wan",
47 .gpio = OMY_X1_GPIO_LED_WAN,
50 .name = "omy:green:power",
51 .gpio = OMY_X1_GPIO_LED_POWER,
56 static struct gpio_keys_button omy_x1_gpio_keys[] __initdata = {
58 .desc = "Reset button",
61 .debounce_interval = OMY_X1_KEYS_DEBOUNCE_INTERVAL,
62 .gpio = OMY_X1_GPIO_BTN_RESET,
67 static void __init omy_x1_setup(void)
69 u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
70 u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
72 ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
73 AR934X_GPIO_FUNC_CLK_OBS4_EN);
75 ath79_register_m25p80(&omy_x1_flash_data);
77 ath79_register_leds_gpio(-1, ARRAY_SIZE(omy_x1_leds_gpio),
80 ath79_register_gpio_keys_polled(1, OMY_X1_KEYS_POLL_INTERVAL,
81 ARRAY_SIZE(omy_x1_gpio_keys),
84 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
86 ath79_register_mdio(1, 0x0);
88 ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1);
89 ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
91 ath79_switch_data.phy4_mii_en = 1;
92 ath79_switch_data.phy_poll_mask = BIT(0);
93 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
94 ath79_eth0_data.phy_mask = BIT(0);
95 ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
96 ath79_register_eth(0);
98 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
99 ath79_register_eth(1);
101 ath79_register_wmac(ee, mac);
105 MIPS_MACHINE(ATH79_MACH_OMY_X1, "OMY-X1", "OMYlink OMY-X1",