target/linux/ar71xx/files/arch/mips/ath79/mach-om5pac.c

   1 /*
   2  *  OpenMesh OM5P-AC support
   3  *
   4  *  Copyright (C) 2013 Marek Lindner <marek@open-mesh.com>
   5  *  Copyright (C) 2014 Sven Eckelmann <sven@open-mesh.com>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify it
   8  *  under the terms of the GNU General Public License version 2 as published
   9  *  by the Free Software Foundation.
  10  */
  11
  12 #include <linux/gpio.h>
  13 #include <linux/mtd/mtd.h>
  14 #include <linux/mtd/partitions.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/i2c.h>
  17 #include <linux/i2c-algo-bit.h>
  18 #include <linux/i2c-gpio.h>
  19 #include <linux/platform_data/phy-at803x.h>
  20
  21 #include <asm/mach-ath79/ar71xx_regs.h>
  22 #include <asm/mach-ath79/ath79.h>
  23
  24 #include "common.h"
  25 #include "dev-ap9x-pci.h"
  26 #include "dev-eth.h"
  27 #include "dev-leds-gpio.h"
  28 #include "dev-m25p80.h"
  29 #include "dev-wmac.h"
  30 #include "machtypes.h"
  31 #include "pci.h"
  32
  33 #define OM5PAC_GPIO_LED_POWER   18
  34 #define OM5PAC_GPIO_LED_GREEN   21
  35 #define OM5PAC_GPIO_LED_RED     23
  36 #define OM5PAC_GPIO_LED_YELLOW  22
  37 #define OM5PAC_GPIO_LED_LAN     20
  38 #define OM5PAC_GPIO_LED_WAN     19
  39 #define OM5PAC_GPIO_I2C_SCL     12
  40 #define OM5PAC_GPIO_I2C_SDA     11
  41
  42 #define OM5PAC_KEYS_POLL_INTERVAL       20      /* msecs */
  43 #define OM5PAC_KEYS_DEBOUNCE_INTERVAL   (3 * OM5PAC_KEYS_POLL_INTERVAL)
  44
  45 #define OM5PAC_WMAC_CALDATA_OFFSET      0x1000
  46
  47 static struct gpio_led om5pac_leds_gpio[] __initdata = {
  48         {
  49                 .name           = "om5pac:blue:power",
  50                 .gpio           = OM5PAC_GPIO_LED_POWER,
  51                 .active_low     = 1,
  52         }, {
  53                 .name           = "om5pac:red:wifi",
  54                 .gpio           = OM5PAC_GPIO_LED_RED,
  55                 .active_low     = 1,
  56         }, {
  57                 .name           = "om5pac:yellow:wifi",
  58                 .gpio           = OM5PAC_GPIO_LED_YELLOW,
  59                 .active_low     = 1,
  60         }, {
  61                 .name           = "om5pac:green:wifi",
  62                 .gpio           = OM5PAC_GPIO_LED_GREEN,
  63                 .active_low     = 1,
  64         }, {
  65                 .name           = "om5pac:blue:lan",
  66                 .gpio           = OM5PAC_GPIO_LED_LAN,
  67                 .active_low     = 1,
  68         }, {
  69                 .name           = "om5pac:blue:wan",
  70                 .gpio           = OM5PAC_GPIO_LED_WAN,
  71                 .active_low     = 1,
  72         }
  73 };
  74
  75 static struct flash_platform_data om5pac_flash_data = {
  76         .type = "mx25l12805d",
  77 };
  78
  79 static struct i2c_gpio_platform_data om5pac_i2c_device_platdata = {
  80         .sda_pin                = OM5PAC_GPIO_I2C_SDA,
  81         .scl_pin                = OM5PAC_GPIO_I2C_SCL,
  82         .udelay                 = 10,
  83         .sda_is_open_drain      = 1,
  84         .scl_is_open_drain      = 1,
  85 };
  86
  87 static struct platform_device om5pac_i2c_device = {
  88         .name           = "i2c-gpio",
  89         .id             = 0,
  90         .dev            = {
  91                 .platform_data  = &om5pac_i2c_device_platdata,
  92         },
  93 };
  94
  95 static struct i2c_board_info om5pac_i2c_devs[] __initdata = {
  96         {
  97                 I2C_BOARD_INFO("tmp423", 0x4c),
  98         },
  99 };
 100
 101 static struct at803x_platform_data om5pac_at803x_data = {
 102         .disable_smarteee = 1,
 103         .enable_rgmii_rx_delay = 1,
 104         .enable_rgmii_tx_delay = 1,
 105 };
 106
 107 static struct mdio_board_info om5pac_mdio0_info[] = {
 108         {
 109                 .bus_id = "ag71xx-mdio.0",
 110                 .phy_addr = 1,
 111                 .platform_data = &om5pac_at803x_data,
 112         },
 113         {
 114                 .bus_id = "ag71xx-mdio.0",
 115                 .phy_addr = 2,
 116                 .platform_data = &om5pac_at803x_data,
 117         },
 118 };
 119
 120 static void __init om5p_ac_setup_qca955x_eth_cfg(u32 mask,
 121                                                  unsigned int rxd,
 122                                                  unsigned int rxdv,
 123                                                  unsigned int txd,
 124                                                  unsigned int txe)
 125 {
 126         void __iomem *base;
 127         u32 t;
 128
 129         base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
 130
 131         t = mask;
 132         t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
 133         t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
 134         t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
 135         t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
 136
 137         __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
 138
 139         iounmap(base);
 140 }
 141
 142 static void __init om5p_ac_setup(void)
 143 {
 144         u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
 145         u8 mac[6];
 146
 147         /* temperature sensor */
 148         platform_device_register(&om5pac_i2c_device);
 149         i2c_register_board_info(0, om5pac_i2c_devs,
 150                                 ARRAY_SIZE(om5pac_i2c_devs));
 151
 152         ath79_gpio_output_select(OM5PAC_GPIO_LED_WAN, QCA955X_GPIO_OUT_GPIO);
 153
 154         ath79_register_m25p80(&om5pac_flash_data);
 155         ath79_register_leds_gpio(-1, ARRAY_SIZE(om5pac_leds_gpio),
 156                                  om5pac_leds_gpio);
 157
 158         ath79_init_mac(mac, art, 0x02);
 159         ath79_register_wmac(art + OM5PAC_WMAC_CALDATA_OFFSET, mac);
 160
 161         om5p_ac_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
 162         ath79_register_mdio(0, 0x0);
 163
 164         mdiobus_register_board_info(om5pac_mdio0_info,
 165                                     ARRAY_SIZE(om5pac_mdio0_info));
 166
 167         ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00);
 168         ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01);
 169
 170         /* GMAC0 is connected to the PHY1 */
 171         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 172         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
 173         ath79_eth0_data.phy_mask = BIT(1);
 174         ath79_eth0_pll_data.pll_1000 = 0x82000101;
 175         ath79_eth0_pll_data.pll_100 = 0x80000101;
 176         ath79_eth0_pll_data.pll_10 = 0x80001313;
 177         ath79_register_eth(0);
 178
 179         /* GMAC1 is connected to MDIO1 in SGMII mode */
 180         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
 181         ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev;
 182         ath79_eth1_data.phy_mask = BIT(2);
 183         ath79_eth1_pll_data.pll_1000 = 0x03000101;
 184         ath79_eth1_pll_data.pll_100 = 0x80000101;
 185         ath79_eth1_pll_data.pll_10 = 0x80001313;
 186         ath79_eth1_data.speed = SPEED_1000;
 187         ath79_eth1_data.duplex = DUPLEX_FULL;
 188         ath79_register_eth(1);
 189
 190         ath79_register_pci();
 191 }
 192
 193 MIPS_MACHINE(ATH79_MACH_OM5P_AC, "OM5P-AC", "OpenMesh OM5P AC", om5p_ac_setup);