target/linux/ar71xx/files/arch/mips/ath79/mach-e558-v2.c

   1 /*
   2  * Qxwlan E558 v2 board support
   3  *
   4  *  Copyright (C) 2017 Peng Zhang <sd20@qxwlan.com>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/phy.h>
  12 #include <linux/gpio.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/ath9k_platform.h>
  15 #include <linux/ar8216_platform.h>
  16
  17 #include <asm/mach-ath79/ar71xx_regs.h>
  18
  19 #include "common.h"
  20 #include "dev-ap9x-pci.h"
  21 #include "dev-eth.h"
  22 #include "dev-gpio-buttons.h"
  23 #include "dev-leds-gpio.h"
  24 #include "dev-m25p80.h"
  25 #include "dev-spi.h"
  26 #include "dev-usb.h"
  27 #include "dev-wmac.h"
  28 #include "machtypes.h"
  29 #include "pci.h"
  30
  31 #define E558_V2_GPIO_LED_WLAN   13
  32 #define E558_V2_GPIO_LED_SYSTEM 14
  33 #define E558_V2_GPIO_LED_QSS    15
  34
  35 #define E558_V2_GPIO_BTN_RESET  16
  36
  37 #define E558_V2_KEYS_POLL_INTERVAL      20      /* msecs */
  38 #define E558_V2_KEYS_DEBOUNCE_INTERVAL (3 * E558_V2_KEYS_POLL_INTERVAL)
  39
  40 static struct gpio_led e558_v2_leds_gpio[] __initdata = {
  41         {
  42                 .name           = "e558-v2:green:qss",
  43                 .gpio           = E558_V2_GPIO_LED_QSS,
  44                 .active_low     = 1,
  45         },
  46         {
  47                 .name           = "e558-v2:green:system",
  48                 .gpio           = E558_V2_GPIO_LED_SYSTEM,
  49                 .active_low     = 1,
  50         },
  51         {
  52                 .name           = "e558-v2:green:wlan",
  53                 .gpio           = E558_V2_GPIO_LED_WLAN,
  54                 .active_low     = 1,
  55         },
  56 };
  57
  58 static struct gpio_keys_button e558_v2_gpio_keys[] __initdata = {
  59         {
  60                 .desc           = "reset",
  61                 .type           = EV_KEY,
  62                 .code           = KEY_RESTART,
  63                 .debounce_interval = E558_V2_KEYS_DEBOUNCE_INTERVAL,
  64                 .gpio           = E558_V2_GPIO_BTN_RESET,
  65                 .active_low     = 1,
  66         },
  67 };
  68
  69 /* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
  70 static struct ar8327_pad_cfg e558_v2_ar8327_pad0_cfg = {
  71         .mode = AR8327_PAD_MAC_SGMII,
  72         .sgmii_delay_en = true,
  73 };
  74
  75 /* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
  76 static struct ar8327_pad_cfg e558_v2_ar8327_pad6_cfg = {
  77         .mode = AR8327_PAD_MAC_RGMII,
  78         .txclk_delay_en = true,
  79         .rxclk_delay_en = true,
  80         .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
  81         .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
  82 };
  83
  84 static const struct ar8327_led_info e558_v2_leds_qca8334[] = {
  85         AR8327_LED_INFO(PHY2_0, HW, "e558-v2:green:wan"),
  86         AR8327_LED_INFO(PHY3_0, HW, "e558-v2:green:lan1"),
  87         AR8327_LED_INFO(PHY4_0, HW, "e558-v2:green:lan2"),
  88 };
  89
  90 static struct ar8327_led_cfg e558_v2_ar8327_led_cfg = {
  91         .led_ctrl0 = 0xc737c737,
  92         .led_ctrl1 = 0x00000000,
  93         .led_ctrl2 = 0x00000000,
  94         .led_ctrl3 = 0x0030c300,
  95         .open_drain = false,
  96 };
  97
  98 static struct ar8327_platform_data e558_v2_ar8327_data = {
  99         .pad0_cfg = &e558_v2_ar8327_pad0_cfg,
 100         .pad6_cfg = &e558_v2_ar8327_pad6_cfg,
 101         .port0_cfg = {
 102                 .force_link = 1,
 103                 .speed = AR8327_PORT_SPEED_1000,
 104                 .duplex = 1,
 105                 .txpause = 1,
 106                 .rxpause = 1,
 107         },
 108         .port6_cfg = {
 109                 .force_link = 1,
 110                 .speed = AR8327_PORT_SPEED_1000,
 111                 .duplex = 1,
 112                 .txpause = 1,
 113                 .rxpause = 1,
 114         },
 115         .led_cfg = &e558_v2_ar8327_led_cfg,
 116         .leds = e558_v2_leds_qca8334,
 117         .num_leds = ARRAY_SIZE(e558_v2_leds_qca8334),
 118 };
 119
 120 static struct mdio_board_info e558_v2_mdio0_info[] = {
 121         {
 122                 .bus_id = "ag71xx-mdio.0",
 123                 .mdio_addr = 0,
 124                 .platform_data = &e558_v2_ar8327_data,
 125         },
 126 };
 127
 128 static void __init e558_v2_setup(void)
 129 {
 130         u8 *mac = (u8 *) KSEG1ADDR(0x1f050400);
 131         u8 *art = (u8 *) KSEG1ADDR(0x1f061000);
 132
 133         ath79_register_m25p80(NULL);
 134         ath79_register_leds_gpio(-1, ARRAY_SIZE(e558_v2_leds_gpio),
 135                                  e558_v2_leds_gpio);
 136
 137         ath79_register_gpio_keys_polled(-1, E558_V2_KEYS_POLL_INTERVAL,
 138                                         ARRAY_SIZE(e558_v2_gpio_keys),
 139                                         e558_v2_gpio_keys);
 140
 141         ath79_register_mdio(0, 0x0);
 142         mdiobus_register_board_info(e558_v2_mdio0_info,
 143                                     ARRAY_SIZE(e558_v2_mdio0_info));
 144
 145         ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
 146
 147         /* GMAC0 is connected to the RMGII interface */
 148         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 149         ath79_eth0_data.phy_mask = BIT(0);
 150         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
 151         ath79_eth0_pll_data.pll_1000 = 0x56000000;
 152         ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
 153         ath79_register_eth(0);
 154
 155         /* GMAC1 is connected to the SGMII interface */
 156         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
 157         ath79_eth1_data.speed = SPEED_1000;
 158         ath79_eth1_data.duplex = DUPLEX_FULL;
 159         ath79_eth1_pll_data.pll_1000 = 0x03000101;
 160         ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
 161         ath79_register_eth(1);
 162
 163         ath79_register_pci();
 164         ath79_register_usb();
 165         ath79_register_wmac(art, NULL);
 166 }
 167
 168 MIPS_MACHINE(ATH79_MACH_E558_V2, "E558-V2", "Qxwlan E558 v2",
 169                 e558_v2_setup);
 170