ar71xx: mach-rbspi: simplify reset button registration
[oweals/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-dr531.c
1 /*
2  * Wallys DR531 board support
3  *
4  * Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com>
5  *
6  * Based on mach-wpj531.c
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of the GNU General Public License version 2 as published
10  * by the Free Software Foundation.
11  */
12
13 #include <linux/pci.h>
14 #include <linux/gpio.h>
15 #include <linux/platform_device.h>
16
17 #include <asm/mach-ath79/ath79.h>
18 #include <asm/mach-ath79/ar71xx_regs.h>
19
20 #include "common.h"
21 #include "dev-ap9x-pci.h"
22 #include "dev-eth.h"
23 #include "dev-gpio-buttons.h"
24 #include "dev-leds-gpio.h"
25 #include "dev-m25p80.h"
26 #include "dev-usb.h"
27 #include "dev-wmac.h"
28 #include "machtypes.h"
29 #include "pci.h"
30
31 #define DR531_GPIO_BUZZER       4
32 #define DR531_GPIO_LED_WAN      11
33 #define DR531_GPIO_LED_LAN      14
34 #define DR531_GPIO_LED_SIG1     12
35 #define DR531_GPIO_LED_SIG2     16
36 #define DR531_GPIO_LED_SIG3     15
37 #define DR531_GPIO_LED_SIG4     13
38
39 #define DR531_GPIO_BTN_RESET    17
40
41 #define DR531_KEYS_POLL_INTERVAL        20      /* msecs */
42 #define DR531_KEYS_DEBOUNCE_INTERVAL    (3 * DR531_KEYS_POLL_INTERVAL)
43
44 #define DR531_MAC0_OFFSET               0x0
45 #define DR531_MAC1_OFFSET               0x8
46 #define DR531_WMAC_CALDATA_OFFSET       0x1000
47
48 static struct gpio_led dr531_leds_gpio[] __initdata = {
49         {
50                 .name           = "dr531:green:wan",
51                 .gpio           = DR531_GPIO_LED_WAN,
52                 .active_low     = 1,
53         },
54         {
55                 .name           = "dr531:green:lan",
56                 .gpio           = DR531_GPIO_LED_LAN,
57                 .active_low     = 1,
58         },
59         {
60                 .name           = "dr531:green:sig1",
61                 .gpio           = DR531_GPIO_LED_SIG1,
62                 .active_low     = 1,
63         },
64         {
65                 .name           = "dr531:green:sig2",
66                 .gpio           = DR531_GPIO_LED_SIG2,
67                 .active_low     = 1,
68         },
69         {
70                 .name           = "dr531:green:sig3",
71                 .gpio           = DR531_GPIO_LED_SIG3,
72                 .active_low     = 1,
73         },
74         {
75                 .name           = "dr531:green:sig4",
76                 .gpio           = DR531_GPIO_LED_SIG4,
77                 .active_low     = 1,
78         },
79         {
80                 .name           = "dr531:buzzer",
81                 .gpio           = DR531_GPIO_BUZZER,
82                 .active_low     = 0,
83         }
84 };
85
86 static struct gpio_keys_button dr531_gpio_keys[] __initdata = {
87         {
88                 .desc           = "reset",
89                 .type           = EV_KEY,
90                 .code           = KEY_RESTART,
91                 .debounce_interval = DR531_KEYS_DEBOUNCE_INTERVAL,
92                 .gpio           = DR531_GPIO_BTN_RESET,
93                 .active_low     = 1,
94         },
95 };
96
97 static void __init dr531_gpio_setup(void)
98 {
99         ath79_gpio_direction_select(DR531_GPIO_BUZZER, true);
100         ath79_gpio_direction_select(DR531_GPIO_LED_WAN, true);
101         ath79_gpio_direction_select(DR531_GPIO_LED_LAN, true);
102         ath79_gpio_direction_select(DR531_GPIO_LED_SIG1, true);
103         ath79_gpio_direction_select(DR531_GPIO_LED_SIG2, true);
104         ath79_gpio_direction_select(DR531_GPIO_LED_SIG3, true);
105         ath79_gpio_direction_select(DR531_GPIO_LED_SIG4, true);
106
107         ath79_gpio_output_select(DR531_GPIO_BUZZER, 0);
108         ath79_gpio_output_select(DR531_GPIO_LED_WAN, 0);
109         ath79_gpio_output_select(DR531_GPIO_LED_LAN, 0);
110
111         ath79_register_leds_gpio(-1, ARRAY_SIZE(dr531_leds_gpio),
112                                  dr531_leds_gpio);
113
114         ath79_register_gpio_keys_polled(-1, DR531_KEYS_POLL_INTERVAL,
115                                         ARRAY_SIZE(dr531_gpio_keys),
116                                         dr531_gpio_keys);
117 }
118
119 static void __init dr531_setup(void)
120 {
121         u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
122         u8 *mac = (u8 *) KSEG1ADDR(0x1f03f810);
123
124         ath79_register_m25p80(NULL);
125
126         dr531_gpio_setup();
127
128         ath79_setup_ar933x_phy4_switch(false, false);
129
130         ath79_register_mdio(0, 0x0);
131
132         /* LAN */
133         ath79_eth0_data.duplex = DUPLEX_FULL;
134         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
135         ath79_eth0_data.speed = SPEED_100;
136         ath79_eth0_data.phy_mask = BIT(4);
137         ath79_init_mac(ath79_eth0_data.mac_addr, mac + DR531_MAC1_OFFSET, 0);
138         ath79_register_eth(0);
139
140         /* WAN */
141         ath79_switch_data.phy4_mii_en = 1;
142         ath79_eth1_data.duplex = DUPLEX_FULL;
143         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
144         ath79_eth1_data.speed = SPEED_1000;
145         ath79_switch_data.phy_poll_mask |= BIT(4);
146         ath79_init_mac(ath79_eth1_data.mac_addr, mac + DR531_MAC0_OFFSET, 0);
147         ath79_register_eth(1);
148
149         ath79_register_wmac(art + DR531_WMAC_CALDATA_OFFSET, NULL);
150
151         ath79_register_pci();
152         ath79_register_usb();
153 }
154
155 MIPS_MACHINE(ATH79_MACH_DR531, "DR531", "Wallys DR531", dr531_setup);