2 * AirTight Networks C-60 board support
4 * Copyright (C) 2016 Christian Lamparter <chunkeey@googlemail.com>
6 * Based on AirTight Networks C-55 board support
8 * Copyright (C) 2014-2015 Chris Blake <chrisrblake93@gmail.com>
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
15 #include <linux/pci.h>
16 #include <linux/phy.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/nand.h>
19 #include <linux/mtd/partitions.h>
20 #include <linux/mtd/physmap.h>
21 #include <linux/platform_device.h>
22 #include <linux/platform/ar934x_nfc.h>
23 #include <linux/ar8216_platform.h>
24 #include <linux/ath9k_platform.h>
25 #include <linux/version.h>
27 #include <asm/mach-ath79/ar71xx_regs.h>
31 #include "dev-ap9x-pci.h"
33 #include "dev-gpio-buttons.h"
34 #include "dev-leds-gpio.h"
35 #include "dev-m25p80.h"
40 #include "machtypes.h"
42 #define C60_GPIO_LED_PWR_AMBER 11
43 #define C60_GPIO_LED_WLAN2_GREEN 12
44 #define C60_GPIO_LED_WLAN2_AMBER 13
45 #define C60_GPIO_LED_PWR_GREEN 16
47 #define C60_GPIO_BTN_RESET 17
49 /* GPIOs of the AR9300 PCIe chip */
50 #define C60_GPIO_WMAC_LED_WLAN1_AMBER 0
51 #define C60_GPIO_WMAC_LED_WLAN1_GREEN 3
53 #define C60_KEYS_POLL_INTERVAL 20 /* msecs */
54 #define C60_KEYS_DEBOUNCE_INTERVAL (3 * C60_KEYS_POLL_INTERVAL)
56 #define C60_ART_ADDR 0x1f7f0000
57 #define C60_ART_SIZE 0xffff
58 #define C60_MAC_OFFSET 0
59 #define C60_WMAC_CALDATA_OFFSET 0x1000
60 #define C60_PCIE_CALDATA_OFFSET 0x5000
62 static struct gpio_led c60_leds_gpio[] __initdata = {
64 .name = "c-60:amber:pwr",
65 .gpio = C60_GPIO_LED_PWR_AMBER,
69 .name = "c-60:green:pwr",
70 .gpio = C60_GPIO_LED_PWR_GREEN,
74 .name = "c-60:green:wlan2",
75 .gpio = C60_GPIO_LED_WLAN2_GREEN,
79 .name = "c-60:amber:wlan2",
80 .gpio = C60_GPIO_LED_WLAN2_AMBER,
85 static struct gpio_keys_button c60_gpio_keys[] __initdata = {
87 .desc = "Reset button",
90 .debounce_interval = C60_KEYS_DEBOUNCE_INTERVAL,
91 .gpio = C60_GPIO_BTN_RESET,
96 static struct ar8327_pad_cfg c60_ar8327_pad0_cfg = {
97 .mode = AR8327_PAD_MAC_RGMII,
98 .txclk_delay_en = true,
99 .rxclk_delay_en = true,
100 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
101 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
104 static struct ar8327_platform_data c60_ar8327_data = {
105 .pad0_cfg = &c60_ar8327_pad0_cfg,
108 .speed = AR8327_PORT_SPEED_1000,
115 static struct mdio_board_info c60_mdio0_info[] = {
117 .bus_id = "ag71xx-mdio.0",
119 .platform_data = &c60_ar8327_data,
123 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
124 static struct nand_ecclayout c60_nand_ecclayout = {
126 .eccpos = { 4, 8, 9, 10, 13, 14, 15 },
128 .oobfree = { { 0, 3 }, { 6, 2 }, { 11, 2 }, }
133 static int c60_ooblayout_ecc(struct mtd_info *mtd, int section,
134 struct mtd_oob_region *oobregion)
138 oobregion->offset = 4;
139 oobregion->length = 1;
142 oobregion->offset = 8;
143 oobregion->length = 3;
146 oobregion->offset = 13;
147 oobregion->length = 3;
154 static int c60_ooblayout_free(struct mtd_info *mtd, int section,
155 struct mtd_oob_region *oobregion)
159 oobregion->offset = 0;
160 oobregion->length = 3;
163 oobregion->offset = 6;
164 oobregion->length = 2;
167 oobregion->offset = 11;
168 oobregion->length = 2;
175 static const struct mtd_ooblayout_ops c60_nand_ecclayout_ops = {
176 .ecc = c60_ooblayout_ecc,
177 .free = c60_ooblayout_free,
181 static int c60_nand_scan_fixup(struct mtd_info *mtd)
183 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
184 struct nand_chip *chip = mtd->priv;
186 struct nand_chip *chip = mtd_to_nand(mtd);
189 chip->ecc.size = 512;
190 chip->ecc.strength = 4;
191 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
192 chip->ecc.layout = &c60_nand_ecclayout;
194 mtd_set_ooblayout(mtd, &c60_nand_ecclayout_ops);
199 static struct gpio_led c60_wmac0_leds_gpio[] = {
201 .name = "c-60:amber:wlan1",
202 .gpio = C60_GPIO_WMAC_LED_WLAN1_AMBER,
206 .name = "c-60:green:wlan1",
207 .gpio = C60_GPIO_WMAC_LED_WLAN1_GREEN,
212 static void __init c60_setup(void)
215 u8 *art = (u8 *) KSEG1ADDR(C60_ART_ADDR);
218 ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_SOFT_BCH);
219 ath79_nfc_set_scan_fixup(c60_nand_scan_fixup);
220 ath79_register_nfc();
223 ath79_register_m25p80(NULL);
225 /* AR8327 Switch Ethernet */
227 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
229 mdiobus_register_board_info(c60_mdio0_info,
230 ARRAY_SIZE(c60_mdio0_info));
232 ath79_register_mdio(0, 0x0);
234 /* GMAC0 is connected to an AR8327N switch */
235 ath79_init_mac(ath79_eth0_data.mac_addr, art + C60_MAC_OFFSET, 0);
236 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
237 ath79_eth0_data.phy_mask = BIT(0);
238 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
239 ath79_eth0_pll_data.pll_1000 = 0x06000000;
240 ath79_register_eth(0);
243 ath79_register_leds_gpio(-1, ARRAY_SIZE(c60_leds_gpio),
245 ath79_register_gpio_keys_polled(-1, C60_KEYS_POLL_INTERVAL,
246 ARRAY_SIZE(c60_gpio_keys),
248 ap9x_pci_setup_wmac_leds(0, c60_wmac0_leds_gpio,
249 ARRAY_SIZE(c60_wmac0_leds_gpio));
251 ath79_register_usb();
254 ath79_init_mac(tmpmac, art + C60_MAC_OFFSET, 1);
255 ap91_pci_init(art + C60_PCIE_CALDATA_OFFSET, tmpmac);
256 ath79_init_mac(tmpmac, art + C60_MAC_OFFSET, 2);
257 ath79_register_wmac(art + C60_WMAC_CALDATA_OFFSET, tmpmac);
259 MIPS_MACHINE(ATH79_MACH_C60, "C-60", "AirTight Networks C-60",