2 * Buffalo BHR-4GRV2 board support
4 * Copyright (c) 2012 Qualcomm Atheros
5 * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (c) 2016 FUKAUMI Naoki <naobsd@gmail.com>
8 * Based on mach-ap136.c and mach-wzr-450hp2.c
10 * Permission to use, copy, modify, and/or distribute this software for any
11 * purpose with or without fee is hereby granted, provided that the above
12 * copyright notice and this permission notice appear in all copies.
14 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
15 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
17 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
18 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
19 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
20 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
24 #include <linux/platform_device.h>
25 #include <linux/ar8216_platform.h>
27 #include <asm/mach-ath79/ar71xx_regs.h>
31 #include "dev-gpio-buttons.h"
32 #include "dev-leds-gpio.h"
33 #include "dev-m25p80.h"
34 #include "machtypes.h"
36 #define BHR_4GRV2_GPIO_LED_VPN_RED 3
37 #define BHR_4GRV2_GPIO_LED_VPN_GREEN 18
38 #define BHR_4GRV2_GPIO_LED_POWER_GREEN 19
39 #define BHR_4GRV2_GPIO_LED_DIAG_RED 20
41 #define BHR_4GRV2_GPIO_BTN_RESET 17
42 #define BHR_4GRV2_GPIO_BTN_ECO 21
44 #define BHR_4GRV2_KEYS_POLL_INTERVAL 20 /* msecs */
45 #define BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL (3 * BHR_4GRV2_KEYS_POLL_INTERVAL)
46 #define BHR_4GRV2_MAC0_OFFSET 0
47 #define BHR_4GRV2_MAC1_OFFSET 6
49 static struct gpio_led bhr_4grv2_leds_gpio[] __initdata = {
51 .name = "buffalo:red:vpn",
52 .gpio = BHR_4GRV2_GPIO_LED_VPN_RED,
56 .name = "buffalo:green:vpn",
57 .gpio = BHR_4GRV2_GPIO_LED_VPN_GREEN,
61 .name = "buffalo:green:power",
62 .gpio = BHR_4GRV2_GPIO_LED_POWER_GREEN,
66 .name = "buffalo:red:diag",
67 .gpio = BHR_4GRV2_GPIO_LED_DIAG_RED,
72 static struct gpio_keys_button bhr_4grv2_gpio_keys[] __initdata = {
74 .desc = "Reset button",
77 .debounce_interval = BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL,
78 .gpio = BHR_4GRV2_GPIO_BTN_RESET,
85 .debounce_interval = BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL,
86 .gpio = BHR_4GRV2_GPIO_BTN_ECO,
91 /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */
92 static struct ar8327_pad_cfg bhr_4grv2_ar8327_pad0_cfg = {
93 .mode = AR8327_PAD_MAC_SGMII,
94 .sgmii_delay_en = true,
97 /* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */
98 static struct ar8327_pad_cfg bhr_4grv2_ar8327_pad6_cfg = {
99 .mode = AR8327_PAD_MAC_RGMII,
100 .txclk_delay_en = true,
101 .rxclk_delay_en = true,
102 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
103 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
106 static struct ar8327_platform_data bhr_4grv2_ar8327_data = {
107 .pad0_cfg = &bhr_4grv2_ar8327_pad0_cfg,
108 .pad6_cfg = &bhr_4grv2_ar8327_pad6_cfg,
111 .speed = AR8327_PORT_SPEED_1000,
118 .speed = AR8327_PORT_SPEED_1000,
125 static struct mdio_board_info bhr_4grv2_mdio0_info[] = {
127 .bus_id = "ag71xx-mdio.0",
129 .platform_data = &bhr_4grv2_ar8327_data,
133 static void __init bhr_4grv2_setup(void)
135 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
137 ath79_register_m25p80(NULL);
139 ath79_register_leds_gpio(-1, ARRAY_SIZE(bhr_4grv2_leds_gpio),
140 bhr_4grv2_leds_gpio);
141 ath79_register_gpio_keys_polled(-1, BHR_4GRV2_KEYS_POLL_INTERVAL,
142 ARRAY_SIZE(bhr_4grv2_gpio_keys),
143 bhr_4grv2_gpio_keys);
145 mdiobus_register_board_info(bhr_4grv2_mdio0_info,
146 ARRAY_SIZE(bhr_4grv2_mdio0_info));
147 ath79_register_mdio(0, 0x0);
149 ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
151 /* GMAC0 is connected to the RGMII interface */
152 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
153 ath79_eth0_data.phy_mask = BIT(0);
154 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
155 ath79_eth0_pll_data.pll_1000 = 0x56000000;
157 ath79_init_mac(ath79_eth0_data.mac_addr, art + BHR_4GRV2_MAC0_OFFSET, 0);
158 ath79_register_eth(0);
160 /* GMAC1 is connected to the SGMII interface */
161 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
162 ath79_eth1_data.speed = SPEED_1000;
163 ath79_eth1_data.duplex = DUPLEX_FULL;
164 ath79_eth1_pll_data.pll_1000 = 0x03000101;
166 ath79_init_mac(ath79_eth1_data.mac_addr, art + BHR_4GRV2_MAC1_OFFSET, 0);
167 ath79_register_eth(1);
170 MIPS_MACHINE(ATH79_MACH_BHR_4GRV2, "BHR-4GRV2",
171 "Buffalo BHR-4GRV2", bhr_4grv2_setup);