2 * ALFA Network AP96 board support
4 * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/init.h>
12 #include <linux/bitops.h>
13 #include <linux/gpio.h>
14 #include <linux/platform_device.h>
15 #include <linux/mmc/host.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/mmc_spi.h>
19 #include <asm/mach-ath79/ath79.h>
20 #include <asm/mach-ath79/ar71xx_regs.h>
24 #include "dev-gpio-buttons.h"
27 #include "machtypes.h"
30 #define ALFA_AP96_GPIO_PCIE_RESET 2
31 #define ALFA_AP96_GPIO_SIM_DETECT 3
32 #define ALFA_AP96_GPIO_MICROSD_CD 4
33 #define ALFA_AP96_GPIO_PCIE_W_DISABLE 5
35 #define ALFA_AP96_GPIO_BUTTON_RESET 11
37 #define ALFA_AP96_KEYS_POLL_INTERVAL 20 /* msecs */
38 #define ALFA_AP96_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP96_KEYS_POLL_INTERVAL)
40 static struct gpio_keys_button alfa_ap96_gpio_keys[] __initdata = {
42 .desc = "Reset button",
45 .debounce_interval = ALFA_AP96_KEYS_DEBOUNCE_INTERVAL,
46 .gpio = ALFA_AP96_GPIO_BUTTON_RESET,
51 static struct mmc_spi_platform_data alfa_ap96_mmc_data = {
52 .flags = MMC_SPI_USE_CD_GPIO,
53 .cd_gpio = ALFA_AP96_GPIO_MICROSD_CD,
55 .caps = MMC_CAP_NEEDS_POLL,
56 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
59 static struct ath79_spi_controller_data ap96_spi0_cdata = {
60 .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
65 static struct ath79_spi_controller_data ap96_spi1_cdata = {
66 .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
70 static struct ath79_spi_controller_data ap96_spi2_cdata = {
71 .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
75 static struct spi_board_info alfa_ap96_spi_info[] = {
79 .max_speed_hz = 25000000,
81 .controller_data = &ap96_spi0_cdata
85 .max_speed_hz = 25000000,
86 .modalias = "mmc_spi",
87 .platform_data = &alfa_ap96_mmc_data,
88 .controller_data = &ap96_spi1_cdata
92 .max_speed_hz = 6250000,
93 .modalias = "rtc-pcf2123",
94 .controller_data = &ap96_spi2_cdata
98 static struct ath79_spi_platform_data alfa_ap96_spi_data = {
103 static void __init alfa_ap96_gpio_setup(void)
105 ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
106 AR71XX_GPIO_FUNC_SPI_CS2_EN);
108 gpio_request(ALFA_AP96_GPIO_MICROSD_CD, "microSD CD");
109 gpio_direction_input(ALFA_AP96_GPIO_MICROSD_CD);
110 gpio_request(ALFA_AP96_GPIO_PCIE_RESET, "PCIe reset");
111 gpio_direction_output(ALFA_AP96_GPIO_PCIE_RESET, 1);
112 gpio_request(ALFA_AP96_GPIO_PCIE_W_DISABLE, "PCIe write disable");
113 gpio_direction_output(ALFA_AP96_GPIO_PCIE_W_DISABLE, 1);
116 #define ALFA_AP96_WAN_PHYMASK BIT(4)
117 #define ALFA_AP96_LAN_PHYMASK BIT(5)
118 #define ALFA_AP96_MDIO_PHYMASK (ALFA_AP96_LAN_PHYMASK | ALFA_AP96_WAN_PHYMASK)
120 static void __init alfa_ap96_init(void)
122 alfa_ap96_gpio_setup();
124 ath79_register_mdio(0, ~ALFA_AP96_MDIO_PHYMASK);
126 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
127 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
128 ath79_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK;
129 ath79_eth1_pll_data.pll_1000 = 0x110000;
131 ath79_register_eth(0);
133 ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
134 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
135 ath79_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK;
136 ath79_eth1_pll_data.pll_1000 = 0x110000;
138 ath79_register_eth(1);
140 ath79_register_pci();
141 ath79_register_spi(&alfa_ap96_spi_data, alfa_ap96_spi_info,
142 ARRAY_SIZE(alfa_ap96_spi_info));
144 ath79_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL,
145 ARRAY_SIZE(alfa_ap96_gpio_keys),
146 alfa_ap96_gpio_keys);
147 ath79_register_usb();
150 MIPS_MACHINE(ATH79_MACH_ALFA_AP96, "ALFA-AP96", "ALFA Network AP96",