2 * Atheros AR71xx SoC platform devices
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Parts of this file are based on Atheros' 2.6.15 BSP
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/platform_device.h>
19 #include <linux/serial_8250.h>
21 #include <asm/mips_machine.h>
22 #include <asm/mach-ar71xx/ar71xx.h>
23 #include <asm/mach-ar71xx/platform.h>
25 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
28 * OHCI (USB full speed host controller)
30 static struct resource ar71xx_usb_ohci_resources[] = {
32 .start = AR71XX_OHCI_BASE,
33 .end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
34 .flags = IORESOURCE_MEM,
37 .start = AR71XX_MISC_IRQ_OHCI,
38 .end = AR71XX_MISC_IRQ_OHCI,
39 .flags = IORESOURCE_IRQ,
43 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
44 static struct platform_device ar71xx_usb_ohci_device = {
45 .name = "ar71xx-ohci",
47 .resource = ar71xx_usb_ohci_resources,
48 .num_resources = ARRAY_SIZE(ar71xx_usb_ohci_resources),
50 .dma_mask = &ar71xx_ohci_dmamask,
51 .coherent_dma_mask = DMA_BIT_MASK(32),
56 * EHCI (USB full speed host controller)
58 static struct resource ar71xx_usb_ehci_resources[] = {
60 .start = AR71XX_EHCI_BASE,
61 .end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
62 .flags = IORESOURCE_MEM,
65 .start = AR71XX_CPU_IRQ_USB,
66 .end = AR71XX_CPU_IRQ_USB,
67 .flags = IORESOURCE_IRQ,
71 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
72 static struct platform_device ar71xx_usb_ehci_device = {
73 .name = "ar71xx-ehci",
75 .resource = ar71xx_usb_ehci_resources,
76 .num_resources = ARRAY_SIZE(ar71xx_usb_ehci_resources),
78 .dma_mask = &ar71xx_ehci_dmamask,
79 .coherent_dma_mask = DMA_BIT_MASK(32),
83 #define AR71XX_USB_RESET_MASK \
84 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
85 | RESET_MODULE_USB_OHCI_DLL)
87 void __init ar71xx_add_device_usb(void)
89 ar71xx_device_stop(AR71XX_USB_RESET_MASK);
91 ar71xx_device_start(AR71XX_USB_RESET_MASK);
93 /* Turning on the Buff and Desc swap bits */
94 ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
96 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
97 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
101 platform_device_register(&ar71xx_usb_ohci_device);
102 platform_device_register(&ar71xx_usb_ehci_device);
105 #ifdef CONFIG_AR71XX_EARLY_SERIAL
106 static void __init ar71xx_add_device_uart(void) {};
108 static struct resource ar71xx_uart_resources[] = {
110 .start = AR71XX_UART_BASE,
111 .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
112 .flags = IORESOURCE_MEM,
116 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
117 static struct plat_serial8250_port ar71xx_uart_data[] = {
119 .mapbase = AR71XX_UART_BASE,
120 .irq = AR71XX_MISC_IRQ_UART,
121 .flags = AR71XX_UART_FLAGS,
122 .iotype = UPIO_MEM32,
125 /* terminating entry */
129 static struct platform_device ar71xx_uart_device = {
130 .name = "serial8250",
131 .id = PLAT8250_DEV_PLATFORM,
132 .resource = ar71xx_uart_resources,
133 .num_resources = ARRAY_SIZE(ar71xx_uart_resources),
135 .platform_data = ar71xx_uart_data
139 static void __init ar71xx_add_device_uart(void)
141 ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
142 platform_device_register(&ar71xx_uart_device);
144 #endif /* CONFIG_AR71XX_EARLY_SERIAL */
146 static struct resource ar71xx_mdio_resources[] = {
149 .flags = IORESOURCE_MEM,
150 .start = AR71XX_GE0_BASE + 0x20,
151 .end = AR71XX_GE0_BASE + 0x38 - 1,
155 static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
156 .phy_mask = 0xffffffff,
159 static struct platform_device ar71xx_mdio_device = {
160 .name = "ag71xx-mdio",
162 .resource = ar71xx_mdio_resources,
163 .num_resources = ARRAY_SIZE(ar71xx_mdio_resources),
165 .platform_data = &ar71xx_mdio_data,
169 void __init ar71xx_add_device_mdio(u32 phy_mask)
171 ar71xx_mdio_data.phy_mask = phy_mask;
172 platform_device_register(&ar71xx_mdio_device);
175 static struct resource ar71xx_eth0_resources[] = {
178 .flags = IORESOURCE_MEM,
179 .start = AR71XX_GE0_BASE,
180 .end = AR71XX_GE0_BASE + 0x20 - 1,
183 .flags = IORESOURCE_MEM,
184 .start = AR71XX_GE0_BASE + 0x38,
185 .end = AR71XX_GE0_BASE + 0x200 - 1,
188 .flags = IORESOURCE_MEM,
189 .start = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
190 .end = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
193 .flags = IORESOURCE_IRQ,
194 .start = AR71XX_CPU_IRQ_GE0,
195 .end = AR71XX_CPU_IRQ_GE0,
199 static struct ag71xx_platform_data ar71xx_eth0_data = {
200 .reset_bit = RESET_MODULE_GE0_MAC,
201 .flush_reg = DDR_REG_FLUSH_GE0,
204 static struct platform_device ar71xx_eth0_device = {
207 .resource = ar71xx_eth0_resources,
208 .num_resources = ARRAY_SIZE(ar71xx_eth0_resources),
210 .platform_data = &ar71xx_eth0_data,
214 static struct resource ar71xx_eth1_resources[] = {
217 .flags = IORESOURCE_MEM,
218 .start = AR71XX_GE1_BASE,
219 .end = AR71XX_GE1_BASE + 0x20 - 1,
222 .flags = IORESOURCE_MEM,
223 .start = AR71XX_GE1_BASE + 0x38,
224 .end = AR71XX_GE1_BASE + 0x200 - 1,
227 .flags = IORESOURCE_MEM,
228 .start = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
229 .end = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
232 .flags = IORESOURCE_IRQ,
233 .start = AR71XX_CPU_IRQ_GE1,
234 .end = AR71XX_CPU_IRQ_GE1,
238 static struct ag71xx_platform_data ar71xx_eth1_data = {
239 .reset_bit = RESET_MODULE_GE1_MAC,
240 .flush_reg = DDR_REG_FLUSH_GE1,
243 static struct platform_device ar71xx_eth1_device = {
246 .resource = ar71xx_eth1_resources,
247 .num_resources = ARRAY_SIZE(ar71xx_eth1_resources),
249 .platform_data = &ar71xx_eth1_data,
253 static int ar71xx_eth_instance __initdata;
254 void __init ar71xx_add_device_eth(unsigned int id, phy_interface_t phy_if_mode,
257 struct platform_device *pdev;
261 switch (phy_if_mode) {
262 case PHY_INTERFACE_MODE_MII:
263 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
265 case PHY_INTERFACE_MODE_GMII:
266 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
268 case PHY_INTERFACE_MODE_RGMII:
269 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
271 case PHY_INTERFACE_MODE_RMII:
272 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
277 memcpy(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, ETH_ALEN);
278 ar71xx_eth0_data.mac_addr[5] += ar71xx_eth_instance;
279 ar71xx_eth0_data.phy_if_mode = phy_if_mode;
280 ar71xx_eth0_data.phy_mask = phy_mask;
281 pdev = &ar71xx_eth0_device;
284 switch (phy_if_mode) {
285 case PHY_INTERFACE_MODE_RMII:
286 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
288 case PHY_INTERFACE_MODE_RGMII:
289 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
294 memcpy(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, ETH_ALEN);
295 ar71xx_eth1_data.mac_addr[5] += ar71xx_eth_instance;
296 ar71xx_eth1_data.phy_if_mode = phy_if_mode;
297 ar71xx_eth1_data.phy_mask = phy_mask;
298 pdev = &ar71xx_eth1_device;
306 platform_device_register(pdev);
307 ar71xx_eth_instance++;
311 static struct resource ar71xx_spi_resources[] = {
313 .start = AR71XX_SPI_BASE,
314 .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
315 .flags = IORESOURCE_MEM,
319 static struct platform_device ar71xx_spi_device = {
320 .name = "ar71xx-spi",
322 .resource = ar71xx_spi_resources,
323 .num_resources = ARRAY_SIZE(ar71xx_spi_resources),
326 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
327 struct spi_board_info const *info,
330 ar71xx_gpio_function_enable(GPIO_FUNC_SPI_EN);
332 spi_register_board_info(info, n);
333 ar71xx_spi_device.dev.platform_data = pdata;
334 platform_device_register(&ar71xx_spi_device);
337 void __init ar71xx_set_mac_base(char *mac_str)
342 t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
343 &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
346 memcpy(ar71xx_mac_base, tmp, ETH_ALEN);
348 printk(KERN_DEBUG "AR71XX: failed to parse mac address "
349 "\"%s\"\n", mac_str);
352 static int __init ar71xx_machine_setup(void)
354 ar71xx_print_cmdline();
358 ar71xx_add_device_uart();
360 mips_machine_setup();
364 arch_initcall(ar71xx_machine_setup);